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Class Information
Number: 257/371
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Insulated gate field effect transistor in integrated circuit > Complementary insulated gate field effect transistors > Complementary transistors in wells of opposite conductivity types more heavily doped than the substrate region in which they are formed, e.g., twin wells
Description: Subject matter wherein the complementary IGFETs are located in wells of semiconductor material with electrical conductivity opposite to that of the respective transistors and wherein the wells contain a higher concentration of dopant ions than the semiconductor substrate in which they are located (e.g., twin wells).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5164801 |
A P channel MIS type semiconductor device |
Nov. 17, 1992 |
| 5157281 |
Level-shifter circuit for integrated circuits |
Oct. 20, 1992 |
| 5146112 |
Semiconductor integrated circuit with analogue signal processing circuit and digital signal processing circuit formed on single semiconductor substrate |
Sep. 8, 1992 |
| 5138420 |
Semiconductor device having first and second type field effect transistors separated by a barrier |
Aug. 11, 1992 |
| 5136355 |
Interconnecting layer on a semiconductor substrate |
Aug. 4, 1992 |
| 5128739 |
MIS type semiconductor device formed in a semiconductor substrate having a well region |
Jul. 7, 1992 |
| 5110754 |
Method of making a DRAM capacitor for use as an programmable antifuse for redundancy repair/options on a DRAM |
May. 5, 1992 |
| 5100815 |
Fabrication method for BiMOS semiconductor devices with improved speed and reliability |
Mar. 31, 1992 |
| 5097310 |
Complementary semiconductor device having improved device isolating region |
Mar. 17, 1992 |
| 5066995 |
Double level conductor structure |
Nov. 19, 1991 |
| 5059549 |
Method of manufacturing a Bi-MOS device with a polycrystalline resistor |
Oct. 22, 1991 |
| 5045912 |
Bi-CMOS integrated circuit device having a high speed lateral bipolar transistor |
Sep. 3, 1991 |
| 5043788 |
Semiconductor device with functional portions having different operating voltages on one semiconductor substrate |
Aug. 27, 1991 |
| 5031019 |
Method for manufacturing a semiconductor device having isolated islands and its resulting structure |
Jul. 9, 1991 |
| 5024960 |
Dual LDD submicron CMOS process for making low and high voltage transistors with common gate |
Jun. 18, 1991 |
| 5014104 |
Semiconductor integrated circuit having CMOS inverters |
May. 7, 1991 |
| 5014105 |
Semiconductor device of complementary integrated circuit |
May. 7, 1991 |
| 4985746 |
Semiconductor device and method of production |
Jan. 15, 1991 |
| 4975764 |
High density BiCMOS circuits and methods of making same |
Dec. 4, 1990 |
| 4975756 |
SRAM with local interconnect |
Dec. 4, 1990 |
| 4968639 |
Process for manufacturing CMOS integrated devices with reduced gate lengths |
Nov. 6, 1990 |
| 4949154 |
Thin dielectrics over polysilicon |
Aug. 14, 1990 |
| 4945070 |
Method of making cmos with shallow source and drain junctions |
Jul. 31, 1990 |
| 4942448 |
Structure for isolating semiconductor components on an integrated circuit and a method of manufacturing therefor |
Jul. 17, 1990 |
| 4931850 |
Semiconductor device including a channel stop region |
Jun. 5, 1990 |
| 4929565 |
High/low doping profile for twin well process |
May. 29, 1990 |
| 4929992 |
MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions |
May. 29, 1990 |
| 4924277 |
MIS transistor device |
May. 8, 1990 |
| 4921811 |
Semiconductor integrated circuit device and a method for manufacturing the same |
May. 1, 1990 |
| 4914051 |
Method for making a vertical power DMOS transistor with small signal bipolar transistors |
Apr. 3, 1990 |
| 4908327 |
Counter-doped transistor |
Mar. 13, 1990 |
| 4906588 |
Enclosed buried channel transistor |
Mar. 6, 1990 |
| 4907058 |
Complementary semiconductor device having a double well |
Mar. 6, 1990 |
| 4905065 |
High density dram trench capacitor isolation employing double epitaxial layers |
Feb. 27, 1990 |
| 4905073 |
Integrated circuit with improved tub tie |
Feb. 27, 1990 |
| 4892837 |
Method for manufacturing semiconductor integrated circuit device |
Jan. 9, 1990 |
| 4893164 |
Complementary semiconductor device having high switching speed and latchup-free capability |
Jan. 9, 1990 |
| 4889825 |
High/low doping profile for twin well process |
Dec. 26, 1989 |
| 4888628 |
Dynamic memory in integrated circuit form |
Dec. 19, 1989 |
| 4878096 |
Semiconductor device IC with DMOS using self-aligned back gate region |
Oct. 31, 1989 |
| 4862240 |
Complementary semiconductor device |
Aug. 29, 1989 |
| 4859624 |
Manufacturing method of semiconductor device having CCD and peripheral circuit |
Aug. 22, 1989 |
| 4855245 |
Method of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrate |
Aug. 8, 1989 |
| 4825275 |
Integrated bipolar-CMOS circuit isolation for providing different backgate and substrate bias |
Apr. 25, 1989 |
| 4819043 |
MOSFET with reduced short channel effect |
Apr. 4, 1989 |
| 4819045 |
MOS transistor for withstanding a high voltage |
Apr. 4, 1989 |
| 4811078 |
Integrated circuit device and process with tin capacitors |
Mar. 7, 1989 |
| 4811076 |
Device and process with doubled capacitors |
Mar. 7, 1989 |
| 4808861 |
Integrated circuit to reduce switching noise |
Feb. 28, 1989 |
| 4785199 |
Programmable complementary transistors |
Nov. 15, 1988 |
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