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Class Information
Number: 257/368
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Insulated gate field effect transistor in integrated circuit
Description: Subject matter wherein the device is an insulated gate field effect transistor located in a single monolithic semiconductor chip circuit.
Sub-classes under this class:
| Class Number |
Class Name |
Patents |
| 257/378 |
Combined with bipolar transistor |
534 |
| 257/379 |
Combined with passive components (e.g., resistors) |
609 |
| 257/369 |
Complementary insulated gate field effect transistors |
1,327 |
| 257/393 |
Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor |
282 |
| 257/392 |
Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode) |
396 |
| 257/390 |
Matrix or array of field effect transistors (e.g., array of fets only some of which are completed, or structure for mask programmed read-only memory (rom)) |
838 |
| 257/382 |
With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide) |
715 |
| 257/394 |
With means to prevent parasitic conduction channels |
169 |
| 257/386 |
With means to reduce parasitic capacitance |
155 |
| 257/401 |
With specified physical layout (e.g., ring gate, source/drain regions shared between plural fets, plural sections connected in parallel to form power mosfet) |
1,493 |
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6140685 |
Static memory cell and method of manufacturing a static memory cell |
Oct. 31, 2000 |
| 6140684 |
SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers |
Oct. 31, 2000 |
| 6140677 |
Semiconductor topography for a high speed MOSFET having an ultra narrow gate |
Oct. 31, 2000 |
| 6136677 |
Method of fabricating semiconductor chips with silicide and implanted junctions |
Oct. 24, 2000 |
| 6127705 |
Static random access memory cell suitable for high integration density and cell stabilization |
Oct. 3, 2000 |
| 6118152 |
Semiconductor device and method of manufacturing the same |
Sep. 12, 2000 |
| 6107665 |
Semiconductor device having a fixed state by injected impurity |
Aug. 22, 2000 |
| 6107664 |
Self-locking static micro-circuit breaker |
Aug. 22, 2000 |
| 6104072 |
Analogue MISFET with threshold voltage adjuster |
Aug. 15, 2000 |
| 6104040 |
Liquid crystal display having a transistor with doped region in an active semiconductor layer |
Aug. 15, 2000 |
| 6104056 |
Semiconductor element and semiconductor memory device using the same |
Aug. 15, 2000 |
| 6100554 |
High-frequency semiconductor device |
Aug. 8, 2000 |
| 6100563 |
Semiconductor device formed on SOI substrate |
Aug. 8, 2000 |
| 6101120 |
Semiconductor memory device |
Aug. 8, 2000 |
| 6097075 |
Semiconductor structure for driver circuits with level shifting |
Aug. 1, 2000 |
| 6093967 |
Self-aligned silicide contacts formed from deposited silicon |
Jul. 25, 2000 |
| 6091630 |
Radiation hardened semiconductor memory |
Jul. 18, 2000 |
| 6084273 |
Analogue misfet with threshold voltage adjuster |
Jul. 4, 2000 |
| 6064096 |
Semiconductor LDD device having halo impurity regions |
May. 16, 2000 |
| 6063699 |
Methods for making high-aspect ratio holes in semiconductor and its application to a gate damascene process for sub- 0.05 micron mosfets |
May. 16, 2000 |
| 6064097 |
Wiring layers for a semiconductor integrated circuit device |
May. 16, 2000 |
| 6060731 |
Insulated-gate semiconductor device having a contact region in electrical contact with a body region and a source region |
May. 9, 2000 |
| 6054742 |
Structure for cross coupled thin film transistors and static random access memory cell |
Apr. 25, 2000 |
| 6046478 |
P-channel thin film transistor having a gate on the drain region of a field effect transistor |
Apr. 4, 2000 |
| 6043540 |
Static RAM having cell transistors with longer gate electrodes than transistors in the periphery of the cell |
Mar. 28, 2000 |
| 6043538 |
Device structure for high voltage tolerant transistor on a 3.3 volt process |
Mar. 28, 2000 |
| 6040605 |
Semiconductor memory device |
Mar. 21, 2000 |
| 6033963 |
Method of forming a metal gate for CMOS devices using a replacement gate process |
Mar. 7, 2000 |
| 6030548 |
SRAM memory device having reduced size |
Feb. 29, 2000 |
| 6028340 |
Static random access memory cell having a field region |
Feb. 22, 2000 |
| 6025635 |
Short channel transistor having resistive gate extensions |
Feb. 15, 2000 |
| 6018184 |
Semiconductor structure useful in a self-aligned contact having multiple insulation layers of non-uniform thickness |
Jan. 25, 2000 |
| 6013569 |
One step salicide process without bridging |
Jan. 11, 2000 |
| 6005296 |
Layout for SRAM structure |
Dec. 21, 1999 |
| 5998827 |
Semiconductor memory device and method of manufacturing the same |
Dec. 7, 1999 |
| 5990516 |
MOSFET with a thin gate insulating film |
Nov. 23, 1999 |
| 5986309 |
Semiconductor integrated circuit apparatus having a plurality of well bias voltage supply circuits |
Nov. 16, 1999 |
| 5976926 |
Static memory cell and method of manufacturing a static memory cell |
Nov. 2, 1999 |
| 5973368 |
Monolithic class D amplifier |
Oct. 26, 1999 |
| 5962900 |
High-density diode-based read-only memory device |
Oct. 5, 1999 |
| 5963803 |
Method of making N-channel and P-channel IGFETs with different gate thicknesses and spacer widths |
Oct. 5, 1999 |
| 5952720 |
Buried contact structure |
Sep. 14, 1999 |
| 5949111 |
Semiconductor device and fabrication process therefor |
Sep. 7, 1999 |
| 5949092 |
Ultra-high-density pass gate using dual stacked transistors having a gate structure with planarized upper surface in relation to interlayer insulator |
Sep. 7, 1999 |
| 5949110 |
DRAM having peripheral circuitry in which source-drain interconnection contact of a MOS transistor is made small by utilizing a pad layer and manufacturing method thereof |
Sep. 7, 1999 |
| 5945715 |
Semiconductor memory device having a memory cell region and a peripheral circuit region and method of manufacturing the same |
Aug. 31, 1999 |
| 5945698 |
Field effect transistor assemblies and transistor gate block stacks |
Aug. 31, 1999 |
| 5936285 |
Gate array layout to accommodate multi-angle ion implantation |
Aug. 10, 1999 |
| 5932918 |
ESD protection clamp for mixed voltage I/O stages using NMOS transistors |
Aug. 3, 1999 |
| 5929492 |
Contact structure of column gate and data line |
Jul. 27, 1999 |
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