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Class Information
Number: 257/349
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Single crystal semiconductor layer on insulating substrate (soi) > With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate
Description: Subject matter wherein the SOI device includes means to prevent undesirable stray current to flow along the interface between the semiconductor layer and the insulating substrate.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622774 |
Method of manufacturing semiconductor device and semiconductor device |
Nov. 24, 2009 |
| 7598570 |
Semiconductor device, SRAM and manufacturing method of semiconductor device |
Oct. 6, 2009 |
| 7592671 |
Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer |
Sep. 22, 2009 |
| 7582934 |
Isolation spacer for thin SOI devices |
Sep. 1, 2009 |
| 7579655 |
Transistor structure having interconnect to side of diffusion and related method |
Aug. 25, 2009 |
| 7579636 |
MIS-type field-effect transistor |
Aug. 25, 2009 |
| 7573126 |
Matching circuits on optoelectronic devices |
Aug. 11, 2009 |
| 7566630 |
Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same |
Jul. 28, 2009 |
| 7544999 |
SOI semiconductor device having enhanced, self-aligned dielectric regions in the bulk silicon substrate |
Jun. 9, 2009 |
| 7528447 |
Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory |
May. 5, 2009 |
| 7525155 |
High voltage transistor structure for semiconductor device |
Apr. 28, 2009 |
| 7521760 |
Integrated circuit chip with FETs having mixed body thickness and method of manufacture thereof |
Apr. 21, 2009 |
| 7521776 |
Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers |
Apr. 21, 2009 |
| 7514732 |
Image pickup apparatus and image pickup system having plural semiconductor regions of a same conductivity type, with one of the semiconductor regions having a higher impurity concentration tha |
Apr. 7, 2009 |
| 7507988 |
Semiconductor heterostructure including a substantially relaxed, low defect density SiGe layer |
Mar. 24, 2009 |
| 7501674 |
Semiconductor device having fin transistor and planar transistor and associated methods of manufacture |
Mar. 10, 2009 |
| 7498636 |
Semiconductor device and method of manufacturing the same |
Mar. 3, 2009 |
| 7491964 |
Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process |
Feb. 17, 2009 |
| 7492009 |
Semiconductor device having silicon on insulator structure and method of fabricating the same |
Feb. 17, 2009 |
| 7470951 |
Hybrid-FET and its application as SRAM |
Dec. 30, 2008 |
| 7456476 |
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication |
Nov. 25, 2008 |
| 7456474 |
Semiconductor device having insulating film |
Nov. 25, 2008 |
| 7453122 |
SOI MOSFET device with reduced polysilicon loading on active area |
Nov. 18, 2008 |
| 7442958 |
Thin film semiconductor device |
Oct. 28, 2008 |
| 7439585 |
Silicon-on-insulator device |
Oct. 21, 2008 |
| 7432552 |
Body biasing structure of SOI |
Oct. 7, 2008 |
| 7423313 |
NAND-type semiconductor storage device and method for manufacturing same |
Sep. 9, 2008 |
| 7423324 |
Double-gate MOS transistor, double-gate CMOS transistor, and method for manufacturing the same |
Sep. 9, 2008 |
| 7423321 |
Double gate MOSFET device |
Sep. 9, 2008 |
| 7420249 |
Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer |
Sep. 2, 2008 |
| 7414289 |
SOI Device with charging protection and methods of making same |
Aug. 19, 2008 |
| 7394130 |
Transistor and method for manufacturing the same |
Jul. 1, 2008 |
| 7382024 |
Low threshold voltage PMOS apparatus and method of fabricating the same |
Jun. 3, 2008 |
| RE40339 |
Silicon-on-insulator chip having an isolation barrier for reliability |
May. 27, 2008 |
| 7372106 |
Semiconductor device and method for manufacturing semiconductor device |
May. 13, 2008 |
| 7358569 |
Semiconductor device with semiconductor layer having various thickness |
Apr. 15, 2008 |
| 7358571 |
Isolation spacer for thin SOI devices |
Apr. 15, 2008 |
| 7355247 |
Silicon on diamond-like carbon devices |
Apr. 8, 2008 |
| 7339237 |
Connection, configuration, and production of a buried semiconductor layer |
Mar. 4, 2008 |
| 7335950 |
Semiconductor device and method of making thereof |
Feb. 26, 2008 |
| 7332777 |
STI liner for SOI structure |
Feb. 19, 2008 |
| 7326975 |
Buried channel type transistor having a trench gate and method of manufacturing the same |
Feb. 5, 2008 |
| 7323753 |
MOS transistor circuit and voltage-boosting booster circuit |
Jan. 29, 2008 |
| 7323716 |
Manufacturing method of thin film transistor substrate |
Jan. 29, 2008 |
| 7306998 |
Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect |
Dec. 11, 2007 |
| 7301219 |
Electrically erasable programmable read only memory (EEPROM) cell and method for making the same |
Nov. 27, 2007 |
| 7288819 |
Stable PD-SOI devices and methods |
Oct. 30, 2007 |
| 7271456 |
Semiconductor devices including stress inducing layers |
Sep. 18, 2007 |
| 7271447 |
Semiconductor device |
Sep. 18, 2007 |
| 7271442 |
Transistor structure having stressed regions of opposite types underlying channel and source/drain regions |
Sep. 18, 2007 |
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