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Class Information
Number: 257/347
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Field effect device > Having insulated electrode (e.g., mosfet, mos diode) > Single crystal semiconductor layer on insulating substrate (soi)
Description: Subject matter wherein the field effect device has a single crystal semiconductor layer located on a substrate made of electrically insulating material.










Sub-classes under this class:

Class Number Class Name Patents
257/348 Depletion mode field effect transistor 382
257/350 Insulated electrode device is combined with diverse type device (e.g., complementary mosfets, fet with resistor, etc.) 1,449
257/352 Substrate is single crystal insulator (e.g., sapphire or spinel) 349
257/349 With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate 578


Patents under this class:

Patent Number Title Of Patent Date Issued
8710619 Semiconductor device and manufacturing method thereof Apr. 29, 2014
8710588 Implant free extremely thin semiconductor devices Apr. 29, 2014
8710556 Semiconductor device comprising a Fin and method for manufacturing the same Apr. 29, 2014
8710502 Thin film transistor and flat panel display device including the same Apr. 29, 2014
8709903 Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure Apr. 29, 2014
8704306 Strained Ge-on-insulator structure and method for forming the same Apr. 22, 2014
8704305 Thin film transistor Apr. 22, 2014
8704229 Partial poly amorphization for channeling prevention Apr. 22, 2014
8703557 Methods of removing dummy fin structures when forming finFET devices Apr. 22, 2014
8703556 Method of making a FinFET device Apr. 22, 2014
8686519 MEMS accelerometer using capacitive sensing and production method thereof Apr. 1, 2014
8686423 Thin film transistor substrate and manufacturing method thereof Apr. 1, 2014
8686417 Oxide semiconductor device formed by using multi-tone mask Apr. 1, 2014
8685847 Semiconductor device having localized extremely thin silicon on insulator channel region Apr. 1, 2014
8685836 Method for forming a silicon layer on any substrate using light irradiation Apr. 1, 2014
8685806 Silicon-on-insulator substrate with built-in substrate junction Apr. 1, 2014
8685799 RRAM structure at STI with Si-based selector Apr. 1, 2014
8680628 Raised source/drain field effect transistor Mar. 25, 2014
8680619 Method of fabricating hybrid impact-ionization semiconductor device Mar. 25, 2014
8680617 Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS Mar. 25, 2014
8680522 Oxide semiconductor film and semiconductor device Mar. 25, 2014
8679932 System and method for manufacturing thin film resistors using a trench and chemical mechanical polishing Mar. 25, 2014
8674481 Active device on a cleaved silicon substrate Mar. 18, 2014
8674468 Imaging array with dual height semiconductor and method of making same Mar. 18, 2014
8674456 High-K transistors with low threshold voltage Mar. 18, 2014
8674444 Structure and method of forming a transistor with asymmetric channel and source/drain regions Mar. 18, 2014
8674443 Substrate provided with a semi-conducting area associated with two counter-electrodes and device comprising one such substrate Mar. 18, 2014
8674438 Semiconductor devices having stressor regions and related fabrication methods Mar. 18, 2014
8674359 TFT, array substrate for display apparatus including TFT, and methods of manufacturing TFT and array substrate Mar. 18, 2014
8673731 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices Mar. 18, 2014
8673704 FinFET and method for manufacturing the same Mar. 18, 2014
8673701 Semiconductor structure and method for manufacturing the same Mar. 18, 2014
8673699 Semiconductor structure having NFET extension last implants Mar. 18, 2014
8673694 Thin film transistor array panel and method of manufacturing the same Mar. 18, 2014
8669616 Method for forming N-shaped bottom stress liner Mar. 11, 2014
8669615 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Mar. 11, 2014
8669551 Transistor including insertion layer and channel layer with different work functions and method of manufacturing the same Mar. 11, 2014
8669167 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Mar. 11, 2014
8669163 Tunnel field-effect transistors with superlattice channels Mar. 11, 2014
8664721 FET with FUSI gate and reduced source/drain contact resistance Mar. 4, 2014
8664720 High voltage semiconductor devices Mar. 4, 2014
8664712 Flash memory cell on SeOI having a second control gate buried under the insulating layer Mar. 4, 2014
8664653 Semiconductor device and method for manufacturing semiconductor device Mar. 4, 2014
8664648 N-type organic thin film transistor, ambipolar field-effect transistor, and method of fabricating the same Mar. 4, 2014
8664639 Display apparatus Mar. 4, 2014
8664060 Semiconductor structure and method of fabricating the same Mar. 4, 2014
8664050 Structure and method to improve ETSOI MOSFETS with back gate Mar. 4, 2014
8659091 Embedded stressors for multigate transistor devices Feb. 25, 2014
8659090 Resistive memory and methods for forming the same Feb. 25, 2014
8659084 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices Feb. 25, 2014











 
 
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