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Browse by Category: Main > Physics
Class Information
Number: 257/206
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Gate arrays > Having specific type of active device (e.g., cmos) > Particular layout of complementary fets with regard to each other
Description: Subject matter wherein the CMOS device includes a plurality of CMOS field effect transistors specifically arranged with regard to each other.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8710552 Semiconductor device Apr. 29, 2014
8710553 Method and apparatus for connecting signal lines of multiple layers to certain contacts while preventing connections with other contacts Apr. 29, 2014
8692316 Isolation structures for FinFET semiconductor devices Apr. 8, 2014
8692333 Semiconductor device for word line driver with efficient routing of conductor for decreased gate resistance Apr. 8, 2014
8680583 Integrated circuit including cross-coupled transistors having gate electrodes formed within at least nine gate level feature layout channels Mar. 25, 2014
8680584 MOS transistor structure with easy access to all nodes Mar. 25, 2014
8669596 Semiconductor device Mar. 11, 2014
8669595 Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position, alignment, and offset specifications Mar. 11, 2014
8669594 Integrated circuit including cross-coupled transistors having gate electrodes formed within at least twelve gate level feature layout channels Mar. 11, 2014
8664055 Fin field-effect transistor structure and manufacturing process thereof Mar. 4, 2014
8653565 Mixed mode multiple switch integration of multiple compound semiconductor FET devices Feb. 18, 2014
8648392 Semiconductor integrated circuit Feb. 11, 2014
8618608 Lateral silicon controlled rectifier structure Dec. 31, 2013
8618579 Semiconductor integrated circuit device and a method of manufacturing the same Dec. 31, 2013
8614496 Method to scale down IC layout Dec. 24, 2013
8609489 Methods of forming memory; and methods of forming vertical structures Dec. 17, 2013
8598632 Integrated circuit having pitch reduced patterns relative to photoithography features Dec. 3, 2013
8592872 Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposi Nov. 26, 2013
8587341 Integrated circuit having high pattern regularity Nov. 19, 2013
8587034 Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts and electrical connecti Nov. 19, 2013
8586437 Semiconductor device and method of manufacturing the semiconductor device Nov. 19, 2013
8587097 Semiconductor device that suppresses malfunctions due to noise generated in internal circuit Nov. 19, 2013
8581303 Integrated circuit including cross-coupled trasistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset relationsh Nov. 12, 2013
8581304 Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset and align Nov. 12, 2013
8575703 Semiconductor device layout reducing imbalance characteristics of paired transistors Nov. 5, 2013
8569801 Three-dimensional CMOS circuit on two offset substrates and method for making same Oct. 29, 2013
8541271 Monolithic integration of multiple compound semiconductor FET devices Sep. 24, 2013
8542337 Pixel structure of active matrix organic light emitting display and manufacturing thereof Sep. 24, 2013
8536681 CMOS integrated circuit Sep. 17, 2013
8513707 RF CMOS transistor design Aug. 20, 2013
8487658 Compact and robust level shifter layout design Jul. 16, 2013
8482039 Memory and interconnect design in fine pitch Jul. 9, 2013
8476678 CMOS Transistor with dual high-k gate dielectric Jul. 2, 2013
8470674 Structure, method and system for complementary strain fill for integrated circuit chips Jun. 25, 2013
8471299 Layout and pad floor plan of power transistor for good performance of SPU and STOG Jun. 25, 2013
8445943 Semiconductor integrated circuit device May. 21, 2013
8443306 Planar compatible FDSOI design architecture May. 14, 2013
8436400 Semiconductor device with gate level including gate electrode conductors for transistors of first type and transistors of second type with some gate electrode conductors of different length May. 7, 2013
8432003 Semiconductor device Apr. 30, 2013
8432016 Stacked body-contacted field effect transistor Apr. 30, 2013
8421125 Semiconductor device with deviation compensation and method for fabricating the same Apr. 16, 2013
8410526 Semiconductor integrated circuit device with reduced cell size Apr. 2, 2013
8405129 Structure for high density stable static random access memory Mar. 26, 2013
8390330 Base cell for implementing an engineering change order (ECO) Mar. 5, 2013
8390034 Methods for isolating portions of a loop of pitch-multiplied material and related structures Mar. 5, 2013
8390033 Metal structure for memory device Mar. 5, 2013
8367430 Shape characterization with elliptic fourier descriptor for contact or any closed structures on the chip Feb. 5, 2013
8357955 Semiconductor integrated circuit Jan. 22, 2013
8354697 Semiconductor integrated circuit device and a method of manufacturing the same Jan. 15, 2013
8344427 Standard cell, semiconductor device having standard cells, and method for laying out and wiring the standard cell Jan. 1, 2013

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