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Class Information
Number: 257/202
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Gate arrays
Description: Subject matter comprising a repeating geometric arrangement of individual structural units of solid-state devices, the solid-state devices of each individual structural unit being connectable into various different types of logic circuits in one integrated, monolithic chip.










Sub-classes under this class:

Class Number Class Name Patents
257/204 Having specific type of active device (e.g., cmos) 545
257/203 With particular chip input/output means 447
257/207 With particular power supply distribution means 675
257/208 With particular signal path connections 814


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13

Patent Number Title Of Patent Date Issued
6816399 Semiconductor memory device including ferroelectric memory formed using ferroelectric capacitor Nov. 9, 2004
6812506 Polysilicon linewidth measurement structure with embedded transistor Nov. 2, 2004
6808996 Method for protecting gate edges from charge gain/loss in semiconductor device Oct. 26, 2004
6806515 Layout of a decoder and the method thereof Oct. 19, 2004
6806514 Modular digital pixel sensor system Oct. 19, 2004
6802043 Semiconductor device having a function block provided in a macro and operating independently of the macro and method for designing the same Oct. 5, 2004
6800884 Inter-tile buffer system for a field programmable gate array Oct. 5, 2004
6791353 Enhanced field programmable gate array Sep. 14, 2004
6784558 Semiconductor device inlcluding optimized driver layout for integrated circuit with staggered bond pads Aug. 31, 2004
6781162 Light emitting device and method of manufacturing the same Aug. 24, 2004
6777725 NROM memory circuit with recessed bitline Aug. 17, 2004
6768142 Circuit component placement Jul. 27, 2004
6768143 Structure and method of making three finger folded field effect transistors having shared junctions Jul. 27, 2004
6765245 Gate array core cell for VLSI ASIC devices Jul. 20, 2004
6759748 Wiring structure of semiconductor device Jul. 6, 2004
6753209 Gate array architecture Jun. 22, 2004
6753547 Method and apparatus for wafer level testing of semiconductor using sacrificial on die power and ground metalization Jun. 22, 2004
6750494 Semiconductor buried contact with a removable spacer Jun. 15, 2004
6727532 Semiconductor integrated circuit device Apr. 27, 2004
6713886 Semiconductor device Mar. 30, 2004
6710405 Non-uniform power semiconductor device Mar. 23, 2004
6703641 Structure for detecting charging effects in device processing Mar. 9, 2004
6700142 Semiconductor wafer on which is fabricated an integrated circuit including an array of discrete functional modules Mar. 2, 2004
6693313 Field effect transistors, field effect transistor assemblies, and integrated circuitry Feb. 17, 2004
6693309 Mask ROM and method for manufacturing the same Feb. 17, 2004
6690076 Stitched circuits larger than the maximum reticle size in sub-micron process Feb. 10, 2004
6690073 Semiconductor integrated circuit making use of standard cells Feb. 10, 2004
6661040 Semiconductor device with insulating gate surrounded by impurity layers Dec. 9, 2003
6657318 Semiconductor integrated circuit device and method for mounting circuit blocks in semiconductor integrated circuit device Dec. 2, 2003
6653671 Semiconductor device Nov. 25, 2003
6646294 Circuit configuration with a plurality of transistors of two different conductivity types Nov. 11, 2003
6642555 Semiconductor memory device Nov. 4, 2003
6617620 Gate array with border element Sep. 9, 2003
6611009 Cross-coupled transistor pair Aug. 26, 2003
6608349 Narrow/short high performance MOSFET device design Aug. 19, 2003
6603157 Field effect transistor having differing power dissipation across an array of transistors Aug. 5, 2003
6603158 Semiconductor integrated circuit having high-density base cell array Aug. 5, 2003
6600341 Integrated circuit and associated design method using spare gate islands Jul. 29, 2003
6600180 Semiconductor device, method of manufacturing the same and exposure mask for implantation Jul. 29, 2003
6601224 Layout to minimize gate orientation related skew effects Jul. 29, 2003
6593201 Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying me Jul. 15, 2003
6593606 Staggered bitline strapping of a non-volatile memory cell Jul. 15, 2003
6590237 Layout structure for dynamic random access memory Jul. 8, 2003
6580103 Array of flash memory cells and data program and erase methods of the same Jun. 17, 2003
6563148 Semiconductor device with dummy patterns May. 13, 2003
6559476 Method and structure for measuring bridge induced by mask layout amendment May. 6, 2003
6555853 Semiconductor device having embedded array Apr. 29, 2003
6552372 Integrated circuit having improved ESD protection Apr. 22, 2003
6548884 Semiconductor device Apr. 15, 2003
6545310 Non-volatile memory with a serial transistor structure with isolated well and method of operation Apr. 8, 2003

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