| Class Number |
Class Name |
No. of Patents |
| 257/797 |
Alignment marks |
962 |
| 257/E25.001 |
Assemblies consisting of plurality of individual semiconductor or other solid-state devices (epo) |
19 |
| 257/E25.002 |
All devices being of same type, e.g., assemblies of rectifier diodes (epo) |
12 |
| 257/E25.022 |
Devices having separate containers (epo) |
52 |
| 257/E25.023 |
Device consisting of plurality of semiconductor or other solid-state devices or components formed in or on common substrate, e.g., integrated circuit device (epo) |
843 |
| 257/E25.028 |
Incoherent light-emitting semiconductor devices having potential or surface barrier (epo) |
129 |
| 257/E25.024 |
Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) |
10 |
| 257/E25.026 |
Devices being arranged next to each other (epo) |
120 |
| 257/E25.025 |
Mixed assemblies (epo) |
81 |
| 257/E25.027 |
Stacked arrangements of devices (epo) |
227 |
| 257/E25.003 |
Devices not having separate containers (epo) |
10 |
| 257/E25.01 |
Device consisting of plurality of semiconductor or other solid state devices or components formed in or on common substrate, e.g., integrated circuit device (epo) |
95 |
| 257/E25.011 |
Devices being arranged next and on each other, i.e., mixed assemblies (epo) |
489 |
| 257/E25.012 |
Devices being arranged next to each other (epo) |
488 |
| 257/E25.013 |
Stacked arrangements of devices (epo) |
1563 |
| 257/E25.004 |
Devices responsive or sensitive to electromagnetic radiation, e.g., infrared radiation, adapted for conversion of radiation into electrical energy or for control of electrical energy by such radiation (epo) |
21 |
| 257/E25.005 |
Devices being arranged next to each other (epo) |
91 |
| 257/E25.006 |
Stacked arrangements of devices (epo) |
260 |
| 257/E25.007 |
Devices being solar cells (epo) |
81 |
| 257/E25.019 |
Incoherent light-emitting semiconductor devices having potential or surface barrier (epo) |
31 |
| 257/E25.02 |
Devices being arranged next to each other (epo) |
371 |
| 257/E25.021 |
Stacked arrangements of devices (epo) |
171 |
| 257/E25.008 |
Organic solid-state devices (epo) |
60 |
| 257/E25.009 |
Devices responsive or sensitive to electromagnetic radiation, e.g., infrared radiation, adapted for conversion of radiation into electrical energy or for control of electrical energy by such radiation, e.g., photovoltaic modules based on organic solar cells (epo) |
46 |
| 257/E25.014 |
Semiconductor devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) |
19 |
| 257/E25.017 |
Apertured devices mounted on one or more rods passed through apertures (epo) |
21 |
| 257/E25.015 |
Devices being arranged next and on each other, i.e., mixed assemblies (epo) |
49 |
| 257/E25.016 |
Devices being arranged next to each other (epo) |
352 |
| 257/E25.018 |
Stacked arrangements of nonapertured devices (epo) |
127 |
| 257/E25.029 |
Devices being of two or more types, e.g., forming hybrid circuits (epo) |
353 |
| 257/E25.032 |
Comprising optoelectronic devices, e.g., led, photodiodes (epo) |
465 |
| 257/E25.031 |
Containers (epo) |
163 |
| 257/E25.03 |
Devices being mounted on two or more different substrates (epo) |
159 |
| 257/603 |
Avalanche diode (e.g., so-called "zener" diode having breakdown voltage greater than 6 volts) |
257 |
| 257/604 |
Microwave transit time device (e.g., impatt diode) |
73 |
| 257/605 |
With means to limit area of breakdown (e.g., guard ring having higher breakdown voltage) |
105 |
| 257/606 |
Subsurface breakdown |
74 |
| 257/565 |
Bipolar transistor structure |
587 |
| 257/589 |
Avalanche transistor |
25 |
| 257/577 |
Including additional component in same, non-isolated structure (e.g., transistor with diode, transistor with resistor, etc.) |
400 |
| 257/566 |
Plural non-isolated transistor structures in same structure |
146 |
| 257/574 |
Complementary transistors share common active region (e.g., integrated injection logic, i 2 l) |
93 |
| 257/575 |
Including lateral bipolar transistor structure |
200 |
| 257/576 |
With contacts of refractory material (e.g., polysilicon, silicide of refractory or platinum group metal) |
85 |
| 257/567 |
Darlington configuration (i.e., emitter to collector current of input transistor supplied to base region of output transistor) |
57 |
| 257/569 |
Complementary darlington-connected transistors |
20 |
| 257/568 |
More than two darlington-connected transistors |
26 |
| 257/571 |
Non-planar structure (e.g., mesa emitter, or having a groove to define resistor) |
71 |
| 257/570 |
With active components in addition to darlington transistors (e.g., antisaturation diode, bleeder diode connected antiparallel to input transistor base-emitter junction, etc.) |
49 |
| 257/573 |
With housing or contact structure or configuration |
33 |
| 257/572 |
With resistance means connected between transistor base regions |
44 |
| 257/592 |
With base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base)) |
507 |
| 257/591 |
With emitter region having specified doping concentration profile (e.g., high-low concentration step) |
140 |
| 257/578 |
With enlarged emitter area (e.g., power device) |
165 |
| 257/582 |
With current ballasting means (e.g., emitter ballasting resistors or base current ballasting resistors) |
70 |
| 257/584 |
With housing or contact (i.e., electrode) means |
137 |
| 257/583 |
With means to reduce transistor action in selected portions of transistor (e.g., heavy base region doping under central web of emitter to prevent secondary breakdown) |
70 |
| 257/579 |
With separate emitter areas connected in parallel |
130 |
| 257/580 |
With current ballasting means (e.g., emitter ballasting resistors or base current ballasting means) |
67 |
| 257/581 |
Thin film ballasting means (e.g., polysilicon resistor) |
37 |
| 257/593 |
With means to increase current gain or operating frequency |
244 |
| 257/585 |
With means to increase inverse gain |
44 |
| 257/590 |
With means to reduce minority carrier lifetime (e.g., region of deep level dopant or region of crystal damage) |
81 |
| 257/586 |
With non-planar semiconductor surface (e.g., groove, mesa, bevel, etc.) |
369 |
| 257/587 |
With specified electrode means |
318 |
| 257/588 |
Including polycrystalline semiconductor as connection |
341 |
| 257/925 |
Bridge rectifier module |
25 |
| 257/1 |
Bulk effect device |
139 |
| 257/2 |
Bulk effect switching in amorphous material |
861 |
| 257/5 |
In array |
574 |
| 257/3 |
With means to localize region of conduction (e.g., "pore" structure) |
691 |
| 257/4 |
With specified electrode composition or configuration |
967 |
| 257/6 |
Intervalley transfer (e.g., gunn effect) |
55 |
| 257/7 |
In monolithic integrated circuit |
33 |
| 257/8 |
Three or more terminal device |
41 |
| 257/E47.001 |
Bulk negative resistance effect devices, e.g., gunn-effect devices, processes, or apparatus peculiar to manufacture or treatment of such devices, or of parts thereof (epo) |
116 |
| 257/E47.002 |
Gunn-effect devices or transferred electron devices (epo) |
19 |
| 257/E47.003 |
Controlled by electromagnetic radiation (epo) |
2 |
| 257/E47.004 |
Gunn diodes (epo) |
26 |
| 257/E47.005 |
Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (epo) |
16 |
| 257/912 |
Charge transfer device using both electron and hole signal carriers |
25 |
| 257/734 |
Combined with electrical contact or lead |
1218 |
| 257/780 |
Ball or nail head type contact, lead, or bond |
1709 |
| 257/781 |
Layered contact, lead or bond |
893 |
| 257/735 |
Beam leads (i.e., leads that extend beyond the ends or sides of a chip component) |
480 |
| 257/736 |
Layered |
239 |
| 257/737 |
Bump leads |
2703 |
| 257/738 |
Ball shaped |
2292 |
| 257/785 |
By pressure alone |
243 |
| 257/777 |
Chip mounted on chip |
2969 |
| 257/786 |
Configuration or pattern of bonds |
2134 |
| 257/782 |
Die bond |
747 |
| 257/783 |
With adhesive means |
1216 |
| 257/778 |
Flip chip |
3448 |
| 257/773 |
Of specified configuration |
2825 |
| 257/776 |
Cross-over arrangement, component or structure |
887 |
| 257/775 |
Varying width or thickness of conductor |
941 |
| 257/774 |
Via (interconnection hole) shape |
3462 |
| 257/741 |
Of specified material other than unalloyed aluminum |
397 |
| 257/771 |
Alloy containing aluminum |
274 |
| 257/749 |
At least portion of which is transparent to ultraviolet, visible or infrared light |
153 |
| 257/746 |
Composite material (e.g., fibers or strands embedded in solid matrix) |
178 |
| 257/744 |
For compound semiconductor material |
172 |
| 257/745 |
Contact for iii-v material |
237 |
| 257/750 |
Layered |
1270 |
| 257/766 |
At least one layer containing chromium or nickel |
414 |
| 257/762 |
At least one layer containing silver or copper |
1135 |
| 257/761 |
At least one layer containing vanadium, hafnium, niobium, zirconium, or tantalum |
354 |
| 257/751 |
At least one layer forms a diffusion barrier |
1557 |
| 257/765 |
At least one layer of an alloy containing aluminum |
490 |
| 257/763 |
At least one layer of molybdenum, titanium, or tungsten |
952 |
| 257/764 |
Alloy containing molybdenum, titanium, or tungsten |
599 |
| 257/754 |
At least one layer of silicide or polycrystalline silicon |
595 |
| 257/756 |
Multiple polysilicon layers |
210 |
| 257/755 |
Polysilicon laminated with silicide |
336 |
| 257/757 |
Silicide of refractory or platinum group metal |
339 |
| 257/758 |
Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit) |
3766 |
| 257/759 |
Including organic insulating material between metal levels |
791 |
| 257/760 |
Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride) |
1018 |
| 257/752 |
Planarized to top of insulating layer |
546 |
| 257/753 |
With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer |
454 |
| 257/768 |
Refractory or platinum group metal or alloy or silicide thereof |
402 |
| 257/770 |
Molybdenum, tungsten, or titanium or their silicides |
350 |
| 257/769 |
Platinum group metal or silicide thereof |
204 |
| 257/767 |
Resistive to electromigration or diffusion of the contact or lead material |
462 |
| 257/772 |
Solder composition |
429 |
| 257/742 |
With a semiconductor conductivity substitution type dopant (e.g., germanium in the case of a gallium arsenide semiconductor) in a contact metal) |
75 |
| 257/743 |
For compound semiconductor material |
81 |
| 257/747 |
With thermal expansion matching of contact or lead material to semiconductor active device |
162 |
| 257/748 |
Plural layers of specified contact or lead material |
214 |
| 257/779 |
Solder wettable contact, lead, or bond |
1184 |
| 257/784 |
Wire contact, lead, or bond |
2324 |
| 257/740 |
With means to prevent contact from penetrating shallow pn junction (e.g., prevention of aluminum "spiking") |
76 |
| 257/739 |
With textured surface |
181 |
| 257/212 |
Conductivity modulation device (e.g., unijunction transistor, double-base diode, conductivity-modulated transistor) |
106 |
| 257/920 |
Conductor layers on different levels connected in parallel (e.g., to reduce resistance) |
51 |
| 257/665 |
Contacts or leads including fusible link means or noise suppression means |
351 |
| 257/E27.001 |
Device consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate, e.g., integrated circuit device (epo) |
103 |
| 257/E27.122 |
Including active semiconductor component sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (epo) |
60 |
| 257/E27.127 |
Device controlled by radiation (epo) |
50 |
| 257/E27.13 |
Imager including structural or functional details of the device (epo) |
202 |
| 257/E27.149 |
Bipolar transistor imager (epo) |
109 |
| 257/E27.15 |
Charge coupled imager (epo) |
161 |
| 257/E27.162 |
Anti-blooming (epo) |
231 |
| 257/E27.154 |
Area ccd imager (epo) |
507 |
| 257/E27.157 |
Frame transfer (epo) |
43 |
| 257/E27.155 |
Frame-interline transfer (epo) |
8 |
| 257/E27.156 |
Interline transfer (epo) |
74 |
| 257/E27.159 |
Ccd or cid color imager (epo) |
98 |
| 257/E27.158 |
Charge injection device (cid) imager (epo) |
37 |
| 257/E27.163 |
Including a photoconductive layer deposited on the ccd structure (epo) |
19 |
| 257/E27.16 |
Infrared ccd or cid imager (epo) |
97 |
| 257/E27.161 |
Of the hybrid type (e.g., chip-on-chip, bonded substrates) (epo) |
137 |
| 257/E27.153 |
Linear ccd imager (epo) |
99 |
| 257/E27.151 |
Structural or functional details (epo) |
178 |
| 257/E27.152 |
Geometry or disposition of pixel-elements, address lines or gate-electrodes (epo) |
161 |
| 257/E27.147 |
Contact-type imager (e.g., contacts document surface) (epo) |
39 |
| 257/E27.131 |
Geometry or disposition of pixel-elements, address-lines, or gate-electrodes (epo) |
344 |
| 257/E27.141 |
Imager using a photoconductor layer (e.g., single photoconductor layer for all pixels) (epo) |
272 |
| 257/E27.145 |
Anti-blooming (epo) |
22 |
| 257/E27.142 |
Color imager (epo) |
33 |
| 257/E27.143 |
Infrared imager (epo) |
54 |
| 257/E27.144 |
Of the hybrid type (e.g., chip-on-chip, bonded substrates) (epo) |
68 |
| 257/E27.146 |
X-ray, gamma-ray, or high energy radiation imagers (epo) |
97 |
| 257/E27.148 |
Junction field effect transistor (jfet) imager or static induction transistor (sit) imager (epo) |
91 |
| 257/E27.133 |
Photodiode array or mos imager (epo) |
1070 |
| 257/E27.139 |
Anti-blooming (epo) |
82 |
| 257/E27.134 |
Color imager (epo) |
180 |
| 257/E27.135 |
Multicolor imager having a stacked pixel-element structure, e.g. npn, npnpn or mqw elements (epo) |
68 |
| 257/E27.136 |
Infrared imager (epo) |
133 |
| 257/E27.138 |
Multispectral infrared imager having a stacked pixel-element structure, e.g., npn, npnpn or mqw structures (epo) |
29 |
| 257/E27.137 |
Of the hybrid type (e.g., chip-on-chip, bonded substrates) (epo) |
169 |
| 257/E27.14 |
X-ray, gamma-ray, or high energy radiation imager (measuring x-, gamma- or corpuscular radiation) (epo) |
89 |
| 257/E27.132 |
Pixel-elements with integrated switching, control, storage, or amplification elements (epo) |
662 |
| 257/E27.128 |
With at least one potential barrier or surface barrier (epo) |
300 |
| 257/E27.129 |
In a repetitive configuration (epo) |
173 |
| 257/E27.123 |
Energy conversion device (epo) |
77 |
| 257/E27.124 |
In a repetitive configuration, e.g. planar multi-junction solar cells (epo) |
90 |
| 257/E27.126 |
Including multiple vertical junction or v-groove junction solar cells formed in a semiconductor substrate (epo) |
42 |
| 257/E27.125 |
Including only thin film solar cells deposited on a substrate (epo) |
274 |
| 257/E27.002 |
Including bulk negative resistance effect component (epo) |
18 |
| 257/E27.003 |
Including gunn-effect device (epo) |
3 |
| 257/E27.005 |
Including component using galvano-magnetic effects, e.g. hall effect (epo) |
408 |
| 257/E27.114 |
Including only passive thin-film or thick-film elements on a common insulating substrate (epo) |
52 |
| 257/E27.115 |
Thick-film circuits (epo) |
43 |
| 257/E27.116 |
Thin-film circuits (epo) |
116 |
| 257/E27.117 |
Including organic material in active region |
52 |
| 257/E27.118 |
Including semiconductor components sensitive to infrared radiation, light, or electromagnetic radiation of a shorter wavelength (epo) |
6 |
| 257/E27.119 |
Including semiconductor components with at least one potential barrier, surface barrier, or recombination zone adapted for light emission (epo) |
46 |
| 257/E27.006 |
Including piezo-electric, electro-resistive, or magneto-resistive component (epo) |
217 |
| 257/E27.12 |
Including semiconductor component with at least one potential barrier or surface barrier adapted for light emission structurally associated with controlling devices having a variable impedance and not being light sensitive (epo) |
250 |
| 257/E27.121 |
In a repetitive configuration (epo) |
223 |
| 257/E27.009 |
Including semiconductor component with at least one potential barrier or surface barrier adapted for rectifying, oscillating, amplifying, or switching, or including integrated passive circuit elements (epo) |
116 |
| 257/E27.111 |
Substrate comprising other than a semiconductor material, e.g. insulating substrate or layered substrate including a non-semiconductor layer (epo) |
1963 |
| 257/E27.113 |
Combined with thin-film or thick-film passive component (epo) |
79 |
| 257/E27.112 |
Including insulator on semiconductor, e.g. soi (silicon on insulator) (epo) |
1787 |
| 257/E27.01 |
With semiconductor substrate only (epo) |
44 |
| 257/E27.011 |
Including a plurality of components in a non-repetitive configuration (epo) |
51 |
| 257/E27.028 |
Including component having an active region in common (epo) |
13 |
| 257/E27.029 |
Including component of the field-effect type (epo) |
67 |
| 257/E27.03 |
In combination with bipolar transistor and diode, capacitor, or resistor (epo) |
22 |
| 257/E27.032 |
In combination with lateral bipolar transistor and diode, capacitor, or resistor (epo) |
50 |
| 257/E27.031 |
In combination with vertical bipolar transistor and diode, capacitor, or resistor (epo) |
129 |
| 257/E27.033 |
In combination with diode, capacitor, or resistor (epo) |
124 |
| 257/E27.034 |
In combination with capacitor only (epo) |
56 |
| 257/E27.035 |
In combination with resistor only (epo) |
38 |
| 257/E27.036 |
With component other than field-effect type (epo) |
14 |
| 257/E27.037 |
Bipolar transistor in combination with diode, capacitor, or resistor (epo) |
23 |
| 257/E27.043 |
Lateral bipolar transistor in combination with diode, capacitor, or resistor (epo) |
8 |
| 257/E27.038 |
Vertical bipolar transistor in combination with diode, capacitor, or resistor (epo) |
41 |
| 257/E27.042 |
Vertical bipolar transistor in combination with capacitor only (epo) |
13 |
| 257/E27.039 |
Vertical bipolar transistor in combination with diode only (epo) |
45 |
| 257/E27.04 |
With schottky diode only (epo) |
61 |
| 257/E27.041 |
Vertical bipolar transistor in combination with resistor only (epo) |
44 |
| 257/E27.044 |
Including combination of diode, capacitor, or resistor (epo) |
17 |
| 257/E27.045 |
Combination of capacitor and resistor (epo) |
17 |
| 257/E27.026 |
Integrated circuit having a three-dimensional layout (epo) |
720 |
| 257/E27.027 |
Including components formed on opposite sides of a semiconductor substrate (epo) |
20 |
| 257/E27.013 |
Integrated circuit having a two-dimensional layout of components without a common active region (epo) |
34 |
| 257/E27.014 |
Including a field-effect type component (epo) |
96 |
| 257/E27.015 |
In combination with bipolar transistor (epo) |
631 |
| 257/E27.017 |
In combination with bipolar transistor and diode, resistor, or capacitor (epo) |
125 |
| 257/E27.016 |
In combination with diode, resistor, or capacitor (epo) |
684 |
| 257/E27.018 |
With component other than field-effect type (epo) |
23 |
| 257/E27.019 |
Bipolar transistor in combination with diode, capacitor, or resistor (epo) |
46 |
| 257/E27.023 |
Lateral bipolar transistor in combination with diode, capacitor, or resistor (epo) |
17 |
| 257/E27.02 |
Vertical bipolar transistor in combination with diode, capacitor, or resistor (epo) |
44 |
| 257/E27.022 |
Vertical bipolar transistor in combination with diode only (epo) |
45 |
| 257/E27.021 |
Vertical bipolar transistor in combination with resistor or capacitor only (epo) |
56 |
| 257/E27.024 |
Including combination of diode, capacitor, or resistor (epo) |
70 |
| 257/E27.025 |
Including combination of capacitor or resistor only (epo) |
42 |
| 257/E27.012 |
Made of compound semiconductor material, e.g. iii-v material (epo) |
421 |
| 257/E27.07 |
Including a plurality of individual components in a repetitive configuration (epo) |
101 |
| 257/E27.072 |
Including bipolar component (epo) |
3 |
| 257/E27.074 |
Including bipolar transistor (epo) |
21 |
| 257/E27.076 |
Array of single bipolar transistors only, e.g. read only memory structure (epo) |
21 |
| 257/E27.075 |
Bipolar dynamic random access memory structure (epo) |
38 |
| 257/E27.078 |
Bipolar electrically programmable memory structure (epo) |
84 |
| 257/E27.077 |
Static bipolar memory cell structure (epo) |
86 |
| 257/E27.073 |
Including diode only (epo) |
138 |
| 257/E27.079 |
Thyristor (epo) |
38 |
| 257/E27.08 |
Unijunction transistor, i.e., three terminal device with only one p-n junction having a negative resistance region in the i-v characteristic (epo) |
5 |
| 257/E27.081 |
Including field-effect component (epo) |
1335 |
| 257/E27.084 |
Dynamic random access memory, dram, structure (epo) |
675 |
| 257/E27.085 |
One-transistor memory cell structure, i.e., each memory cell containing only one transistor (epo) |
556 |
| 257/E27.095 |
Capacitor and transistor in common trench (epo) |
37 |
| 257/E27.096 |
Vertical transistor (epo) |
294 |
| 257/E27.09 |
Capacitor extending under the transistor (epo) |
75 |
| 257/E27.092 |
Capacitor in trench (epo) |
444 |
| 257/E27.093 |
Capacitor extending under or around the transistor (epo) |
120 |
| 257/E27.094 |
Having storage electrode extension stacked over the transistor (epo) |
86 |
| 257/E27.086 |
Storage electrode stacked over the transistor |
623 |
| 257/E27.089 |
Storage electrode having multiple wings (epo) |
698 |
| 257/E27.087 |
With bit line higher than capacitor (epo) |
215 |
| 257/E27.088 |
With capacitor higher than bit line level (epo) |
422 |
| 257/E27.091 |
Transistor in trench (epo) |
261 |
| 257/E27.097 |
Peripheral structure (epo) |
404 |
| 257/E27.082 |
Including bucket brigade type charge coupled device (c.c.d) (epo) |
33 |
| 257/E27.083 |
Including charge coupled device (c.c.d) or charge injection device (c.i.d) (epo) |
131 |
| 257/E27.102 |
Read-only memory, rom, structure (epo) |
683 |
| 257/E27.103 |
Electrically programmable rom (epo) |
3215 |
| 257/E27.104 |
Ferroelectric non-volatile memory structure (epo) |
902 |
| 257/E27.098 |
Static random access memory, sram, structure (epo) |
498 |
| 257/E27.099 |
Load element being a mosfet transistor (epo) |
601 |
| 257/E27.1 |
Load element being a thin film transistor (epo) |
390 |
| 257/E27.101 |
Load element being a resistor (epo) |
424 |
| 257/E27.071 |
Including resistor or capacitor only (epo) |
149 |
| 257/E27.105 |
Masterslice integrated circuit (epo) |
251 |
| 257/E27.11 |
Input and output buffer/driver (epo) |
163 |
| 257/E27.106 |
Using bipolar structure (epo) |
53 |
| 257/E27.109 |
Using combined field-effect/bipolar structure (epo) |
45 |
| 257/E27.107 |
Using field-effect structure (epo) |
124 |
| 257/E27.108 |
Cmos gate array (epo) |
443 |
| 257/E27.046 |
Including only semiconductor components of a single kind, e.g., all bipolar transistors, all diodes, or all cmos (epo) |
427 |
| 257/E27.053 |
Bipolar component only (epo) |
83 |
| 257/E27.054 |
Combination of lateral and vertical transistors only (epo) |
106 |
| 257/E27.055 |
Vertical bipolar transistor only (epo) |
60 |
| 257/E27.058 |
Combination of direct and inverse vertical transistors (e.g., collector acts as emitter) (epo) |
17 |
| 257/E27.057 |
Vertical complementary transistor (epo) |
130 |
| 257/E27.056 |
Vertical direct transistor of the same conductivity type having different characteristics, (e.g. darlington transistor) (epo) |
98 |
| 257/E27.048 |
Capacitor only (epo) |
505 |
| 257/E27.05 |
Metal-insulated-semiconductor (mis) diode (epo) |
35 |
| 257/E27.049 |
Varactor diode (epo) |
66 |
| 257/E27.051 |
Diode only (epo) |
165 |
| 257/E27.059 |
Including field-effect component only (epo) |
64 |
| 257/E27.06 |
Field-effect transistor with insulated gate (epo) |
840 |
| 257/E27.061 |
Combination of depletion and enhancement field-effect transistors (epo) |
116 |
| 257/E27.062 |
Complementary mis (epo) |
720 |
| 257/E27.064 |
Combination of complementary transistors having a different structure, e.g. stacked cmos, high-voltage and low-voltage cmos (epo) |
482 |
| 257/E27.066 |
Including a p-well only in the substrate (epo) |
72 |
| 257/E27.065 |
Including an n-well only in the substrate (epo) |
62 |
| 257/E27.067 |
Including both n- and p- wells in the substrate, e.g. twin-tub (epo) |
425 |
| 257/E27.063 |
Means for preventing a parasitic bipolar action between the different transistor regions, e.g. latch-up prevention (epo) |
294 |
| 257/E27.069 |
Pn junction gate field-effect transistor |
55 |
| 257/E27.068 |
Schottky barrier gate field-effect transistor (epo) |
105 |
| 257/E27.047 |
Resistor only (epo) |
293 |
| 257/E27.052 |
Thyristor only (epo) |
67 |
| 257/E27.004 |
Including solid state component for rectifying, amplifying, or switching without a potential barrier or surface barrier (epo) |
342 |
| 257/E27.007 |
Including superconducting component (epo) |
62 |
| 257/E27.008 |
Including thermo-electric or thermo-magnetic component with or without a junction of dissimilar material or thermo-magnetic component (epo) |
88 |
| 257/E39.001 |
Devices using superconductivity, processes, or apparatus peculiar to manufacture or treatment of such devices, or of parts thereof (epo) |
14 |
| 257/E39.004 |
Characterized by current path (epo) |
3 |
| 257/E39.006 |
Characterized by material (epo) |
66 |
| 257/E39.009 |
Ceramic materials (epo) |
23 |
| 257/E39.01 |
Comprising copper oxide (epo) |
272 |
| 257/E39.011 |
Multilayered structures, e.g., super lattices (epo) |
35 |
| 257/E39.007 |
Organic materials (epo) |
71 |
| 257/E39.008 |
Fullerene superconductors, e.g., soccerball-shaped allotrope of carbon, e.g., c60, c94 (epo) |
12 |
| 257/E39.005 |
Characterized by shape of element (epo) |
7 |
| 257/E39.002 |
Containers or mountings (epo) |
14 |
| 257/E39.003 |
For josephson devices (epo) |
10 |
| 257/E39.012 |
Devices comprising junction of dissimilar materials, e.g., josephson-effect devices (epo) |
22 |
| 257/E39.014 |
Josephson-effect devices (epo) |
95 |
| 257/E39.015 |
Comprising high tc ceramic materials (epo) |
141 |
| 257/E39.013 |
Single electron tunnelling devices (epo) |
9 |
| 257/E39.016 |
Three or more electrode devices, e.g., transistor-like structures (epo) |
69 |
| 257/E39.017 |
Permanent superconductor devices (epo) |
123 |
| 257/E39.018 |
Comprising high tc ceramic materials (epo) |
230 |
| 257/E39.019 |
Three or more electrode devices (epo) |
12 |
| 257/E39.02 |
Field-effect devices (epo) |
68 |
| 257/927 |
Different doping levels in different parts of pn junction to produce shaped depletion layer |
28 |
| 257/910 |
Diode arrays (e.g., diode read-only memory array) |
83 |
| 257/908 |
Dram configuration with transistors and capacitors of pairs of cells along a straight line between adjacent bit lines |
128 |
| 257/906 |
Dram with capacitor electrodes used for accessing (e.g., bit line is capacitor plate) |
174 |
| 257/919 |
Elements of similar construction connected in series or parallel to average out manufacturing variations in characteristics |
28 |
| 257/926 |
Elongated lead extending axially through another elongated lead |
91 |
| 257/787 |
Encapsulated |
2367 |
| 257/796 |
With heat sink embedded in encapsulant |
608 |
| 257/788 |
With specified encapsulant |
571 |
| 257/793 |
Including epoxide |
324 |
| 257/794 |
Including glass |
141 |
| 257/792 |
Including polyimide |
204 |
| 257/791 |
Including polysiloxane (e.g., silicone resin) |
212 |
| 257/790 |
Plural encapsulating layers |
440 |
| 257/789 |
With specified filler material |
394 |
| 257/795 |
With specified filler material |
317 |
| 257/903 |
Fet configuration adapted for use as static memory cell |
696 |
| 257/904 |
With passive components, (e.g., polysilicon resistors) |
305 |
| 257/902 |
Fet with metal source region |
30 |
| 257/213 |
Field effect device |
521 |
| 257/214 |
Charge injection device |
111 |
| 257/215 |
Charge transfer device |
227 |
| 257/240 |
Changing width or direction of channel (e.g., meandering channel) |
153 |
| 257/243 |
Channel confinement |
137 |
| 257/244 |
Comprising a groove |
75 |
| 257/235 |
Electrical input |
78 |
| 257/238 |
Input signal responsive to signal charge in charge transfer device (e.g., regeneration or feedback) |
82 |
| 257/236 |
Signal applied to field effect electrode |
208 |
| 257/237 |
Charge-presetting/linear input type (e.g., fill and spill) |
77 |
| 257/216 |
Majority signal carrier (e.g., buried or bulk channel, or peristaltic) |
116 |
| 257/224 |
Channel confinement |
111 |
| 257/217 |
Having a conductive means in direct contact with channel (e.g., non-insulated gate) |
89 |
| 257/218 |
High resistivity channel (e.g., accumulation mode) or surface channel (e.g., transfer of signal charge occurs at the surface of the semiconductor) or minority carriers at input (i.e., surface channel input) |
54 |
| 257/219 |
Impurity concentration variation |
109 |
| 257/221 |
Along the length of the channel (e.g., doping variations for transfer directionality) |
135 |
| 257/220 |
Vertically within channel (e.g., profiled) |
75 |
| 257/222 |
Responsive to non-electrical external signal (e.g., imager) |
456 |
| 257/223 |
Having structure to improve output signal (e.g., antiblooming drain) |
329 |
| 257/241 |
Multiple channels (e.g., converging or diverging or parallel channels) |
273 |
| 257/225 |
Non-electrical input responsive (e.g., light responsive imager, input programmed by size of storage sites for use as a read-only memory, etc.) |
350 |
| 257/231 |
2-dimensional area architecture |
288 |
| 257/232 |
Having alternating strips of sensor structures and register structures (e.g., interline imager) |
370 |
| 257/233 |
Sensors not overlaid by electrode (e.g., photodiodes) |
637 |
| 257/229 |
Having structure to improve output signal (e.g., exposure control structure) |
283 |
| 257/230 |
With blooming suppression structure |
192 |
| 257/228 |
Light responsive, back illuminated |
135 |
| 257/226 |
Sensor element and charge transfer device are of different materials or on different substrates (e.g., "hybrid") |
153 |
| 257/234 |
Single strip of sensors (e.g., linear imager) |
180 |
| 257/227 |
With specified dopant (e.g., photoionizable, "extrinsic" detectors for infrared) |
74 |
| 257/239 |
Signal charge detection type (e.g., floating diffusion or floating gate non-destructive output) |
450 |
| 257/245 |
Structure for applying electric field into device (e.g., resistive electrode, acoustic traveling wave in channel) |
164 |
| 257/249 |
Electrode structures or materials |
282 |
| 257/250 |
Plural gate levels |
300 |
| 257/246 |
Phase structure (e.g., doping variations to provide asymmetry for 2-phase operation; more than four phases or "electrode per bit") |
146 |
| 257/248 |
2-phase |
146 |
| 257/247 |
Uniphase or virtual phase structure |
86 |
| 257/251 |
Substantially incomplete signal charge transfer (e.g., bucket brigade) |
46 |
| 257/242 |
Vertical charge transfer |
87 |
| 257/288 |
Having insulated electrode (e.g., mosfet, mos diode) |
1579 |
| 257/412 |
Gate electrode of refractory material (e.g., polysilicon or a silicide of a refractory or platinum group metal) |
1004 |
| 257/413 |
Polysilicon laminated with silicide |
501 |
| 257/410 |
Gate insulator includes material (including air or vacuum) other than sio 2 |
867 |
| 257/411 |
Composite or layered gate insulator (e.g., mixture such as silicon oxynitride) |
916 |
| 257/408 |
Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, ldd device) |
1220 |
| 257/296 |
Insulated gate capacitor or insulated gate transistor combined with capacitor (e.g., dynamic memory cell) |
3171 |
| 257/300 |
Capacitor coupled to, or forms gate of, insulated gate field effect transistor (e.g., non-destructive readout dynamic memory cell structure) |
851 |
| 257/298 |
Capacitor for signal storage in combination with non-volatile storage means |
626 |
| 257/301 |
Capacitor in trench |
1227 |
| 257/303 |
Stacked capacitor |
997 |
| 257/304 |
Storage node isolated by dielectric from semiconductor substrate |
526 |
| 257/302 |
Vertical transistor |
795 |
| 257/305 |
With means to insulate adjacent storage nodes (e.g., channel stops or field oxide) |
353 |
| 257/313 |
Inversion layer capacitor |
163 |
| 257/306 |
Stacked capacitor |
1989 |
| 257/307 |
Parallel interleaved capacitor electrode pairs (e.g., interdigitized) |
357 |
| 257/308 |
With capacitor electrodes connection portion located centrally thereof (e.g., fin electrodes with central post) |
459 |
| 257/309 |
With increased effective electrode surface area (e.g., tortuous path, corrugated, or textured electrodes) |
689 |
| 257/311 |
Storage node isolated by dielectric from semiconductor substrate |
435 |
| 257/299 |
Structure configured for voltage converter (e.g., charge pump, substrate bias generator) |
180 |
| 257/312 |
Voltage variable capacitor (i. e., capacitance varies with applied voltage) |
192 |
| 257/310 |
With high dielectric constant insulator (e.g., ta 2 o 5 ) |
1105 |
| 257/297 |
With means for preventing charge leakage due to minority carrier generation (e.g., alpha generated soft error protection or "dark current" leakage protection) |
297 |
| 257/367 |
Insulated gate controlled breakdown of pn junction (e.g., field plate diode) |
136 |
| 257/368 |
Insulated gate field effect transistor in integrated circuit |
1188 |
| 257/378 |
Combined with bipolar transistor |
584 |
| 257/379 |
Combined with passive components (e.g., resistors) |
742 |
| 257/380 |
Polysilicon resistor |
272 |
| 257/381 |
With multiple levels of polycrystalline silicon |
114 |
| 257/369 |
Complementary insulated gate field effect transistors |
1921 |
| 257/370 |
Combined with bipolar transistor |
649 |
| 257/371 |
Complementary transistors in wells of opposite conductivity types more heavily doped than the substrate region in which they are formed, e.g., twin wells |
761 |
| 257/372 |
With means to prevent latchup or parasitic conduction channels |
412 |
| 257/373 |
With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action |
160 |
| 257/374 |
Dielectric isolation means (e.g., dielectric layer in vertical grooves) |
572 |
| 257/376 |
With barrier region of reduced minority carrier lifetime (e.g., heavily doped p+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region) |
218 |
| 257/375 |
With means to reduce substrate spreading resistance (e.g., heavily doped substrate) |
81 |
| 257/377 |
With polysilicon interconnections to source or drain regions (e.g., polysilicon laminated with silicide) |
374 |
| 257/393 |
Insulated gate field effect transistor adapted to function as load element for switching insulated gate field effect transistor |
332 |
| 257/392 |
Insulated gate field effect transistors of different threshold voltages in same integrated circuit (e.g., enhancement and depletion mode) |
544 |
| 257/390 |
Matrix or array of field effect transistors (e.g., array of fets only some of which are completed, or structure for mask programmed read-only memory (rom)) |
1042 |
| 257/391 |
Selected groups of complete field effect devices having different threshold voltages (e.g., different channel dopant concentrations) |
401 |
| 257/382 |
With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide) |
835 |
| 257/383 |
Contact of refractory or platinum group metal (e.g., molybdenum, tungsten, or titanium) |
345 |
| 257/384 |
Including silicide |
627 |
| 257/385 |
Multiple polysilicon layers |
167 |
| 257/394 |
With means to prevent parasitic conduction channels |
194 |
| 257/395 |
Thick insulator portion |
146 |
| 257/399 |
Combined with heavily doped channel stop portion |
113 |
| 257/396 |
Recessed into semiconductor surface |
299 |
| 257/398 |
Combined with heavily doped channel stop portion |
146 |
| 257/397 |
In vertical-walled groove |
230 |
| 257/400 |
With heavily doped channel stop portion |
103 |
| 257/386 |
With means to reduce parasitic capacitance |
180 |
| 257/387 |
Gate electrode overlaps at least one of source or drain by no more than depth of source or drain (e.g., self-aligned gate) |
193 |
| 257/388 |
Gate electrode consists of refractory or platinum group metal or silicide |
264 |
| 257/389 |
With thick insulator over source or drain region |
173 |
| 257/401 |
With specified physical layout (e.g., ring gate, source/drain regions shared between plural fets, plural sections connected in parallel to form power mosfet) |
2092 |
| 257/290 |
Light responsive or combined with light responsive device |
661 |
| 257/291 |
Imaging array |
1245 |
| 257/292 |
Photodiodes accessed by fets |
1616 |
| 257/293 |
Photoresistors accessed by fets, or photodetectors separate from fet chip |
268 |
| 257/294 |
With shield, filter, or lens |
526 |
| 257/327 |
Short channel insulated gate field effect transistor |
648 |
| 257/335 |
Active channel region has a graded dopant concentration decreasing with distance from source region (e.g., double diffused device, dmos transistor) |
909 |
| 257/343 |
All contacts on same surface (e.g., lateral structure) |
609 |
| 257/337 |
In integrated circuit structure |
312 |
| 257/338 |
With complementary field effect transistor |
258 |
| 257/341 |
Plural sections connected in parallel (e.g., power mosfet) |
1364 |
| 257/342 |
With means to reduce on resistance |
515 |
| 257/336 |
With lightly doped portion of drain region adjacent channel (e.g., ldd structure) |
890 |
| 257/340 |
With means (other than self-alignment of the gate electrode) to decrease gate capacitance (e.g., shield electrode) |
184 |
| 257/339 |
With means to increase breakdown voltage |
666 |
| 257/329 |
Gate controls vertical charge flow portion of channel (e.g., vmos device) |
1043 |
| 257/330 |
Gate electrode in groove |
1857 |
| 257/332 |
Gate electrode self-aligned with groove |
659 |
| 257/334 |
In integrated circuit structure |
422 |
| 257/331 |
Plural gate electrodes or grid shaped gate electrode |
970 |
| 257/333 |
With thick insulator to reduce gate capacitance in non-channel areas (e.g., thick oxide over source or drain region) |
362 |
| 257/346 |
Gate electrode overlaps the source or drain by no more than depth of source or drain (e.g., self-aligned gate) |
346 |
| 257/328 |
Vertical channel or double diffused insulated gate field effect device provided with means to protect against excess voltage (e.g., gate protection diode) |
1128 |
| 257/344 |
With lightly doped portion of drain region adjacent channel (e.g., ldd structure) |
1106 |
| 257/345 |
With means to prevent sub-surface currents, or with non-uniform channel doping |
393 |
| 257/289 |
Significant semiconductor chemical compound in bulk crystal (e.g., gaas) |
209 |
| 257/347 |
Single crystal semiconductor layer on insulating substrate (soi) |
3176 |
| 257/348 |
Depletion mode field effect transistor |
371 |
| 257/350 |
Insulated electrode device is combined with diverse type device (e.g., complementary mosfets, fet with resistor, etc.) |
1370 |
| 257/351 |
Complementary field effect transistor structures only (i.e., not including bipolar transistors, resistors, or other components) |
880 |
| 257/352 |
Substrate is single crystal insulator (e.g., sapphire or spinel) |
342 |
| 257/353 |
Single crystal islands of semiconductor layer containing only one active device |
375 |
| 257/354 |
Including means to eliminate island edge effects (e.g., insulating filling between islands, or ions in island edges) |
319 |
| 257/349 |
With means (e.g., a buried channel stop layer) to prevent leakage current along the interface of the semiconductor layer and the insulating substrate |
566 |
| 257/314 |
Variable threshold (e.g., floating gate memory device) |
1831 |
| 257/324 |
Multiple insulator layers (e.g., mnos structure) |
1352 |
| 257/325 |
Non-homogeneous composition insulator layer (e.g., graded composition layer or layer with inclusions) |
293 |
| 257/326 |
With additional, non-memory control electrode or channel portion (e.g., accessing field effect transistor structure) |
495 |
| 257/315 |
With floating gate electrode |
2591 |
| 257/316 |
With additional contacted control electrode |
2425 |
| 257/318 |
Additional control electrode is doped region in semiconductor substrate |
390 |
| 257/319 |
Plural additional contacted control electrodes |
463 |
| 257/320 |
Separate control electrodes for charging and for discharging floating electrode |
417 |
| 257/322 |
With charging or discharging by control voltage applied to source or drain region (e.g., by avalanche breakdown of drain junction) |
293 |
| 257/317 |
With irregularities on electrode to facilitate charging or discharging of floating electrode |
667 |
| 257/321 |
With thin insulator region for charging or discharging floating electrode by quantum mechanical tunneling |
1212 |
| 257/323 |
With means to facilitate light erasure |
93 |
| 257/295 |
With ferroelectric material layer |
2099 |
| 257/409 |
With means to increase breakdown voltage (e.g., field shield electrode, guard ring, etc.) |
704 |
| 257/355 |
With overvoltage protective means |
1644 |
| 257/356 |
For protecting against gate insulator breakdown |
594 |
| 257/357 |
In complementary field effect transistor integrated circuit |
553 |
| 257/358 |
Including resistor element |
331 |
| 257/359 |
As thin film structure (e.g., polysilicon resistor) |
232 |
| 257/363 |
Including resistor element |
324 |
| 257/360 |
Protection device includes insulated gate transistor structure (e.g., combined with resistor element) |
791 |
| 257/361 |
For operation as bipolar or punchthrough element |
315 |
| 257/362 |
Punchthrough or bipolar element |
391 |
| 257/402 |
With permanent threshold adjustment (e.g., depletion mode) |
317 |
| 257/403 |
With channel conductivity dopant same type as that of source and drain |
166 |
| 257/404 |
Non-uniform channel doping |
164 |
| 257/407 |
With gate electrode of controlled workfunction material (e.g., low workfunction gate material) |
319 |
| 257/405 |
With gate insulator containing specified permanent charge |
94 |
| 257/406 |
Plural gate insulator layers |
174 |
| 257/365 |
With plural, separately connected, gate electrodes in same device |
635 |
| 257/366 |
Overlapping gate electrodes |
197 |
| 257/364 |
With resistive gate electrode |
100 |
| 257/256 |
Junction field effect transistor (unipolar transistor) |
202 |
| 257/262 |
Combined with insulated gate field effect transistor (igfet) |
165 |
| 257/259 |
Elongated active region acts as transmission line or distributed active element (e.g., "transmission line" field effect transistor) |
82 |
| 257/268 |
Enhancement mode |
78 |
| 257/269 |
With means to adjust barrier height (e.g., doping profile) |
43 |
| 257/272 |
Junction field effect transistor in integrated circuit |
192 |
| 257/274 |
Complementary junction field effect transistors |
135 |
| 257/275 |
Microwave integrated circuit (e.g., microstrip type) |
204 |
| 257/277 |
With capacitive or inductive elements |
153 |
| 257/276 |
With contact or heat sink extending through hole in semiconductor substrate, or with electrode suspended over substrate (e.g., air bridge) |
205 |
| 257/273 |
With bipolar device |
195 |
| 257/278 |
With devices vertically spaced in different layers of semiconductor material (e.g., "3-dimensional" integrated circuit) |
88 |
| 257/261 |
Junction gate region free of direct electrical connection (e.g., floating junction gate memory cell structure) |
117 |
| 257/257 |
Light responsive or combined with light responsive device |
291 |
| 257/258 |
In imaging array |
252 |
| 257/271 |
Load element or constant current source (e.g., with source to gate connection) |
35 |
| 257/270 |
Plural, separately connected, gates control same channel region |
176 |
| 257/279 |
Pn junction gate in compound semiconductor material (e.g., gaas) |
109 |
| 257/260 |
Same channel controlled by both junction and insulated gate electrodes, or by both schottky barrier and pn junction gates (e.g., "taper isolated" memory cell) |
112 |
| 257/263 |
Vertical controlled current path |
175 |
| 257/264 |
Enhancement mode or with high resistivity channel (e.g., doping of 10 15 cm -3 or less) |
144 |
| 257/265 |
In integrated circuit |
55 |
| 257/266 |
With multiple parallel current paths (e.g., grid gate) |
170 |
| 257/267 |
With schottky barrier gate |
58 |
| 257/287 |
With multiple channels or channel segments connected in parallel, or with channel much wider than length between source and drain (e.g., power jfet) |
243 |
| 257/286 |
With non-uniform channel thickness or width |
96 |
| 257/285 |
With profiled channel dopant concentration or profiled gate region dopant concentration (e.g., maximum dopant concentration below surface) |
171 |
| 257/280 |
With schottky gate |
450 |
| 257/282 |
Gate closely aligned to source region |
102 |
| 257/283 |
With groove or overhang for alignment |
116 |
| 257/284 |
Schottky gate in groove |
203 |
| 257/281 |
Schottky gate to silicon semiconductor |
122 |
| 257/252 |
Responsive to non-optical, non-electrical signal |
157 |
| 257/253 |
Chemical (e.g., isfet, chemfet) |
361 |
| 257/254 |
Physical deformation (e.g., strain sensor, acoustic wave detector) |
244 |
| 257/255 |
With current flow along specified crystal axis (e.g., axis of maximum carrier mobility) |
111 |
| 257/907 |
Folded bit line dram configuration |
75 |
| 257/202 |
Gate arrays |
569 |
| 257/204 |
Having specific type of active device (e.g., cmos) |
512 |
| 257/206 |
Particular layout of complementary fets with regard to each other |
557 |
| 257/205 |
With bipolar transistors or with fets of only one channel conductivity type (e.g., enhancement-depletion fets) |
144 |
| 257/203 |
With particular chip input/output means |
427 |
| 257/207 |
With particular power supply distribution means |
649 |
| 257/208 |
With particular signal path connections |
778 |
| 257/211 |
Multi-level metallization |
764 |
| 257/209 |
Programmable signal paths (e.g., with fuse elements, laser programmable, etc) |
588 |
| 257/210 |
With wiring channel area |
287 |
| 257/183 |
Heterojunction device |
380 |
| 257/199 |
Avalanche diode (e.g., so-called "zener" diode having breakdown voltage greater than 6 volts, including heterojunction impatt type microwave diodes) |
126 |
| 257/201 |
Between different group iv-vi or ii-vi or iii-v compounds other than gaas/gaalas |
488 |
| 257/197 |
Bipolar transistor |
884 |
| 257/198 |
Wide band gap emitter |
434 |
| 257/196 |
Both semiconductors of the heterojunction are the same conductivity type (i.e., either n or p) |
98 |
| 257/183.1 |
Charge transfer device |
70 |
| 257/192 |
Field effect transistor |
1296 |
| 257/194 |
Doping on side of heterojunction with lower carrier affinity (e.g., high electron mobility transistor (hemt)) |
993 |
| 257/195 |
Combined with diverse type device |
229 |
| 257/191 |
Having graded composition |
346 |
| 257/200 |
Heterojunction formed between semiconductor materials which differ in that they belong to different periodic table groups (e.g., ge (group iv) - gaas (group iii-v) or inp (group iii-v) - cdte (group ii-vi)) |
620 |
| 257/184 |
Light responsive structure |
839 |
| 257/186 |
Avalanche photodetection structure |
260 |
| 257/188 |
Having narrow energy band gap ( |
142 |
| 257/189 |
Layer is a group iii-v semiconductor compound |
319 |
| 257/187 |
Having transistor structure |
256 |
| 257/185 |
Staircase (including graded composition) device |
185 |
| 257/190 |
With lattice constant mismatch (e.g., with buffer layer to accommodate mismatch) |
681 |
| 257/678 |
Housing or package |
2277 |
| 257/727 |
Device held in place by clamping |
658 |
| 257/708 |
Entirely of metal except for feedthrough |
160 |
| 257/711 |
With raised portion of base for mounting semiconductor chip |
189 |
| 257/709 |
With specified insulator to isolate device from housing |
132 |
| 257/710 |
With specified means (e.g., lip) to seal base to cap |
372 |
| 257/728 |
For high frequency (e.g., microwave) device |
777 |
| 257/723 |
For plural devices |
2606 |
| 257/724 |
With discrete components |
1635 |
| 257/725 |
With electrical isolation means |
361 |
| 257/726 |
Devices held in place by clamping |
300 |
| 257/687 |
Housing or package filled with solid or liquid electrically insulating material |
749 |
| 257/701 |
Insulating material |
1026 |
| 257/704 |
Cap or lid |
1132 |
| 257/703 |
Composite ceramic, or single ceramic with metal |
418 |
| 257/705 |
Of high thermal conductivity ceramic (e.g., beo) |
258 |
| 257/702 |
Of insulating material other than ceramic |
440 |
| 257/706 |
With heat sink |
1785 |
| 257/707 |
Directly attached to semiconductor device |
1358 |
| 257/685 |
Multiple housings |
994 |
| 257/686 |
Stacked arrangement |
3357 |
| 257/730 |
Outside periphery of package having specified shape or configuration |
795 |
| 257/729 |
Portion of housing of specific materials |
295 |
| 257/679 |
Smart (e.g., credit) card package |
606 |
| 257/690 |
With contact or lead |
1702 |
| 257/691 |
Having power distribution means (e.g., bus structure) |
1422 |
| 257/700 |
Multiple contact layers separated from each other by insulator means and forming part of a package or housing (e.g., plural ceramic layer package) |
1653 |
| 257/692 |
With particular lead geometry |
1723 |
| 257/693 |
External connection to housing |
1074 |
| 257/694 |
Axial leads |
115 |
| 257/696 |
Bent (e.g., j-shaped) lead |
686 |
| 257/695 |
Fanned/radial leads |
123 |
| 257/697 |
Pin grid type |
447 |
| 257/698 |
With specific electrical feedthrough structure |
1814 |
| 257/699 |
Housing entirely of metal except for feedthrough structure |
142 |
| 257/682 |
With desiccant, getter, or gas filling |
152 |
| 257/731 |
With housing mount |
240 |
| 257/732 |
Flanged mount |
135 |
| 257/733 |
Stud mount |
117 |
| 257/688 |
With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, e.g., ring |
371 |
| 257/689 |
Rigid electrode portion |
187 |
| 257/683 |
With means to prevent explosion of package |
56 |
| 257/712 |
With provision for cooling the housing or its contents |
1816 |
| 257/713 |
For integrated circuit |
1561 |
| 257/720 |
Heat dissipating element has high thermal conductivity insert (e.g., copper slug in aluminum heat sink) |
704 |
| 257/718 |
Heat dissipating element held in place by clamping or spring means |
1010 |
| 257/719 |
Pressed against semiconductor element |
1210 |
| 257/717 |
Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer) |
761 |
| 257/714 |
Liquid coolant |
1011 |
| 257/715 |
Boiling (evaporative) liquid |
596 |
| 257/716 |
Cryogenic liquid coolant |
91 |
| 257/721 |
With gas coolant |
194 |
| 257/722 |
With fins |
863 |
| 257/684 |
With semiconductor element forming part (e.g., base, of housing) |
773 |
| 257/680 |
With window means |
805 |
| 257/681 |
For erasing eprom |
73 |
| 257/617 |
Including region containing crystal damage |
215 |
| 257/613 |
Including semiconductor material other than silicon or gallium arsenide (gaas) (e.g., pb x sn 1-x te) |
278 |
| 257/616 |
Containing germanium, ge |
425 |
| 257/614 |
Group ii-vi compound (e.g., cdte, hg x cd 1-x te) |
141 |
| 257/615 |
Group iii-v compound (e.g., inp) |
430 |
| 257/79 |
Incoherent light emitter structure |
2227 |
| 257/86 |
Active layer of indirect band gap semiconductor |
227 |
| 257/87 |
With means to facilitate electron-hole recombination (e.g., isoelectronic traps such as nitrogen in gap) |
123 |
| 257/100 |
Encapsulated |
1348 |
| 257/80 |
In combination with or also constituting light responsive device |
620 |
| 257/84 |
Combined in integrated structure |
489 |
| 257/85 |
With heterojunction |
291 |
| 257/83 |
Light coupled transistor structure |
311 |
| 257/81 |
With specific housing or contact structure |
1006 |
| 257/82 |
Discrete light emitting and light responsive devices |
731 |
| 257/88 |
Plural light emitting devices (e.g., matrix, 7-segment array) |
1477 |
| 257/92 |
Alphanumeric segmented array |
73 |
| 257/89 |
Multi-color emission |
698 |
| 257/90 |
With heterojunction |
211 |
| 257/93 |
With electrical isolation means in integrated circuit structure |
272 |
| 257/91 |
With shaped contacts or opaque masking |
417 |
| 257/94 |
With heterojunction |
1469 |
| 257/96 |
Plural heterojunctions in same device |
853 |
| 257/97 |
More than two heterojunctions in same device |
601 |
| 257/95 |
With contoured external surface (e.g., dome shape to facilitate light emission) |
544 |
| 257/99 |
With housing or contact structure |
3111 |
| 257/101 |
With particular dopant concentration or concentration profile (e.g., graded junction) |
449 |
| 257/102 |
With particular dopant material (e.g., zinc as dopant in gaas) |
623 |
| 257/103 |
With particular semiconductor material |
2444 |
| 257/98 |
With reflector, opaque mask, or optical element (e.g., lens, optical fiber, index of refraction matching layer, luminescent material layer, filter) integral with device or device enclosure or package |
3910 |
| 257/499 |
Integrated circuit structure with electrically isolated components |
458 |
| 257/506 |
Including dielectric isolation means |
1004 |
| 257/522 |
Air isolation (e.g., beam lead supported semiconductor islands) |
358 |
| 257/509 |
Combined with pn junction isolation (e.g., isoplanar, locos) |
220 |
| 257/510 |
Dielectric in groove |
915 |
| 257/520 |
Conductive filling in dielectric-lined groove (e.g., polysilicon backfill) |
312 |
| 257/519 |
Including heavily doped channel stop region adjacent groove |
173 |
| 257/521 |
Sides of grooves along major crystal planes (e.g., (111), (100) planes, etc.) |
82 |
| 257/513 |
Vertical walled groove |
376 |
| 257/514 |
With active junction abutting groove (e.g., "walled emitter") |
128 |
| 257/515 |
With active junction abutting groove (e.g., "walled emitter") |
117 |
| 257/517 |
With bipolar transistor structure |
265 |
| 257/518 |
With polycrystalline connecting region (e.g., polysilicon base contact) |
176 |
| 257/511 |
With complementary (npn and pnp) bipolar transistor structures |
163 |
| 257/512 |
Complementary devices share common active region (e.g., integrated injection logic, i 2 l) |
82 |
| 257/516 |
With passive component (e.g., resistor, capacitor, etc.) |
271 |
| 257/524 |
Full dielectric isolation with polycrystalline semiconductor substrate |
171 |
| 257/525 |
With complementary (npn and pnp) bipolar transistor structures |
71 |
| 257/523 |
Isolation by region of intrinsic (undoped) semiconductor material (e.g., including region physically damaged by proton bombardment) |
92 |
| 257/526 |
With bipolar transistor structure |
146 |
| 257/527 |
Sides of isolated semiconductor islands along major crystal planes (e.g., (111), (100) planes, etc.) |
52 |
| 257/508 |
With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer) |
455 |
| 257/507 |
With single crystal insulating substrate (e.g., sapphire) |
133 |
| 257/500 |
Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit |
432 |
| 257/502 |
High power or high voltage device extends completely through semiconductor substrate (e.g., backside collector contact) |
160 |
| 257/501 |
Including dielectric isolation means |
351 |
| 257/504 |
Including means for establishing a depletion region throughout a semiconductor layer for isolating devices in different portions of the layer (e.g., "jfet" isolation) |
75 |
| 257/557 |
Lateral bipolar transistor structure |
256 |
| 257/559 |
With active region formed along groove or exposed edge in semiconductor |
76 |
| 257/558 |
With base region doping concentration step or gradient or with means to increase current gain |
70 |
| 257/560 |
With multiple collectors or emitters |
100 |
| 257/562 |
With auxiliary collector/re-emitter between emitter and output collector (e.g., "current hogging logic" device) |
26 |
| 257/561 |
With different emitter to collector spacings or facing areas |
48 |
| 257/528 |
Passive components in ics |
648 |
| 257/532 |
Including capacitor component |
1742 |
| 257/535 |
Both terminals of capacitor isolated from substrate |
276 |
| 257/533 |
Combined with resistor to form rc filter structure |
199 |
| 257/534 |
With means to increase surface area (e.g., grooves, ridges, etc.) |
264 |
| 257/531 |
Including inductive element |
731 |
| 257/529 |
Including programmable passive component (e.g., fuse) |
1082 |
| 257/530 |
Anti-fuse |
795 |
| 257/536 |
Including resistive element |
695 |
| 257/539 |
Combined with bipolar transistor |
138 |
| 257/543 |
Lightly doped junction isolated resistor (e.g., ion implanted resistor) |
48 |
| 257/541 |
Pinch resistor |
45 |
| 257/542 |
Resistor has same doping as emitter or collector of bipolar transistor |
37 |
| 257/540 |
With compensation for non-linearity (e.g., dynamic isolation pocket bias) |
23 |
| 257/537 |
Using specific resistive material |
338 |
| 257/538 |
Polycrystalline silicon (doped or undoped) |
303 |
| 257/503 |
With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit) |
245 |
| 257/563 |
With multiple separately connected emitter, collector, or base regions in same transistor structure |
91 |
| 257/564 |
Multiple base or collector regions |
70 |
| 257/544 |
With pn junction isolation |
250 |
| 257/548 |
At least three regions of alternating conductivity types with dopant concentration gradients decreasing from surface of semiconductor (e.g., "triple-diffused" integrated circuit) |
89 |
| 257/551 |
Including voltage reference element (e.g., avalanche diode, so-called "zener diode" with breakdown voltage greater than 6 volts or with positive temperature coefficient of breakdown voltage) |
165 |
| 257/552 |
With bipolar transistor structure |
214 |
| 257/555 |
Complementary bipolar transistor structures (e.g., integrated injection logic, i 2 l) |
110 |
| 257/556 |
Including lateral bipolar transistor structure |
127 |
| 257/553 |
Transistors of same conductivity type (e.g., npn) having different current gain or different operating voltage characteristics |
43 |
| 257/554 |
With connecting region made of polycrystalline semiconductor material (e.g., polysilicon base contact) |
65 |
| 257/550 |
With lightly doped surface layer of one conductivity type on substrate of opposite conductivity type, having plural heavily doped portions of the one conductivity type between the layer and substrate, different ones of the heavily doped portions having differing depths or physical extent |
71 |
| 257/545 |
With means to control isolation junction capacitance (e.g., lightly doped layer at isolation junction to increase depletion layer width) |
43 |
| 257/547 |
With structural means to control parasitic transistor action or leakage current |
175 |
| 257/546 |
With structural means to protect against excess or reversed polarity voltage |
255 |
| 257/549 |
With substrate and lightly doped surface layer of same conductivity type, separated by subsurface heavily doped region of opposite conductivity type (e.g., "collector diffused isolation" integrated circuit) |
96 |
| 257/505 |
With polycrystalline semiconductor isolation region in direct contact with single crystal active semiconductor material |
86 |
| 257/666 |
Lead frame |
2730 |
| 257/677 |
Of specified material other than copper (e.g., kovar (t.m.)) |
236 |
| 257/668 |
On insulating carrier other than a printed circuit board |
1124 |
| 257/672 |
Small lead frame (e.g., "spider" frame) for connecting a large lead frame to a semiconductor chip |
440 |
| 257/673 |
With bumps on ends of lead fingers to connect to semiconductor |
533 |
| 257/667 |
With dam or vent for encapsulant |
447 |
| 257/675 |
With heat sink means |
837 |
| 257/674 |
With means for controlling lead tension |
328 |
| 257/670 |
With separate tie bar element or plural tie bars |
512 |
| 257/671 |
Of insulating material |
152 |
| 257/669 |
With stress relief |
552 |
| 257/676 |
With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for led) |
2228 |
| 257/918 |
Light emitting regenerative switching device (e.g., light emitting scr) arrays, circuitry, etc. |
100 |
| 257/E33.001 |
Light emitting semiconductor devices having a potential or a surface barrier, processes or apparatus peculiar to the manufacture or treatment of such devices, or of parts thereof |
514 |
| 257/E33.055 |
Detail of nonsemiconductor component other than light-emitting semiconductor device (epo) |
105 |
| 257/E33.06 |
Coatings (epo) |
227 |
| 257/E33.061 |
Comprising luminescent material (e.g., fluorescent) (epo) |
551 |
| 257/E33.066 |
Electrical contact or lead (e.g., lead frame) (epo) |
572 |
| 257/E33.062 |
Electrodes (epo) |
231 |
| 257/E33.063 |
Characterized by material (epo) |
341 |
| 257/E33.064 |
Comprising transparent conductive layers (e.g., transparent conductive oxides (tco), indium tin oxide (ito)) (epo) |
275 |
| 257/E33.065 |
Characterized by shape (epo) |
425 |
| 257/E33.067 |
Means for light extraction or guiding (epo) |
455 |
| 257/E33.068 |
Integrated with device (e.g., back surface reflector, lens) (epo) |
625 |
| 257/E33.069 |
Comprising resonant cavity structure (e.g., bragg reflector pair) (epo) |
230 |
| 257/E33.07 |
Comprising window layer (epo) |
134 |
| 257/E33.071 |
Not integrated with device (epo) |
43 |
| 257/E33.072 |
Reflective means (epo) |
339 |
| 257/E33.073 |
Refractive means (e.g., lens) (epo) |
200 |
| 257/E33.074 |
Scattering means (e.g., surface roughening) (epo) |
233 |
| 257/E33.077 |
Monolithic integration with photosensitive device (epo) |
48 |
| 257/E33.056 |
Packaging (epo) |
343 |
| 257/E33.057 |
Adapted for surface mounting (epo) |
334 |
| 257/E33.059 |
Encapsulation (epo) |
561 |
| 257/E33.058 |
Housing (epo) |
366 |
| 257/E33.075 |
With means for cooling or heating (epo) |
414 |
| 257/E33.076 |
With means for light detecting (e.g., photodetector) (epo) |
191 |
| 257/E33.002 |
Device characterized by semiconductor body (epo) |
63 |
| 257/E33.013 |
Material of active region (epo) |
83 |
| 257/E33.037 |
Comprising compound other than group ii-vi, iii-v, and iv compound (epo) |
37 |
| 257/E33.041 |
Characterized by doping material (epo) |
9 |
| 257/E33.04 |
Comprising only group i-iii-vi compound (epo) |
16 |
| 257/E33.039 |
Comprising only group ii-iv-vi compound (epo) |
6 |
| 257/E33.038 |
Comprising only group iv-vi compound (epo) |
4 |
| 257/E33.042 |
Comprising only group iv-vi or ii-iv-vi compound (epo) |
0 |
| 257/E33.019 |
Comprising only group ii-vi compound (epo) |
81 |
| 257/E33.022 |
Characterized by doping material (epo) |
63 |
| 257/E33.02 |
Ternary or quaternary compound (e.g., cdhgte) (epo) |
25 |
| 257/E33.021 |
With heterojunction (epo) |
98 |
| 257/E33.023 |
Comprising only group iii-v compound (epo) |
121 |
| 257/E33.024 |
Binary compound (e.g., gaas) (epo) |
34 |
| 257/E33.025 |
Including nitride (e.g., gan) (epo) |
238 |
| 257/E33.029 |
Characterized by doping material (epo) |
131 |
| 257/E33.03 |
Nitride compound (epo) |
152 |
| 257/E33.031 |
Including ternary or quaternary compound (e.g., algaas) (epo) |
23 |
| 257/E33.033 |
Comprising nitride compound (e.g., algan) (epo) |
85 |
| 257/E33.034 |
With heterojunction (e.g., algan/gan) (epo) |
140 |
| 257/E33.032 |
With heterojunction (e.g., algaas/gaas) (epo) |
39 |
| 257/E33.026 |
Ternary or quaternary compound (e.g., algaas) (epo) |
67 |
| 257/E33.028 |
Including nitride (e.g., algan) (epo) |
680 |
| 257/E33.027 |
With heterojunction (epo) |
328 |
| 257/E33.035 |
Comprising only group iv compound (e.g., sic) (epo) |
54 |
| 257/E33.036 |
Characterized by doping material (epo) |
12 |
| 257/E33.015 |
Comprising only group iv element (epo) |
56 |
| 257/E33.017 |
Characterized by doping material (epo) |
30 |
| 257/E33.018 |
Including porous si (epo) |
77 |
| 257/E33.016 |
With heterojunction (epo) |
34 |
| 257/E33.014 |
In different regions (epo) |
25 |
| 257/E33.003 |
Particular crystalline orientation or structure (epo) |
203 |
| 257/E33.004 |
Comprising amorphous semiconductor (epo) |
104 |
| 257/E33.043 |
Physical imperfections (e.g., particular concentration or distribution of impurity) (epo) |
163 |
| 257/E33.005 |
Shape or structure (e.g., shape of epitaxial layer) (epo) |
425 |
| 257/E33.011 |
For current confinement (epo) |
103 |
| 257/E33.012 |
Multiple active regions between two electrodes (e.g., stacks) (epo) |
142 |
| 257/E33.008 |
Multiple quantum well structure (epo) |
445 |
| 257/E33.01 |
Doped superlattice (e.g., nipi superlattice) (epo) |
29 |
| 257/E33.009 |
Including, apart from doping materials or other only impurities, group iv element (e.g., si-sige superlattice) (epo) |
32 |
| 257/E33.007 |
Shape of potential barrier (epo) |
124 |
| 257/E33.006 |
Shape of semiconductor body (epo) |
310 |
| 257/E33.044 |
Device characterized by their operation (epo) |
70 |
| 257/E33.053 |
Characterized by field-effect operation (epo) |
131 |
| 257/E33.054 |
Device being superluminescent diode (epo) |
84 |
| 257/E33.048 |
Having heterojunction or graded gap (epo) |
47 |
| 257/E33.05 |
Comprising only group ii-iv compound (epo) |
13 |
| 257/E33.049 |
Comprising only group iii-v compound (epo) |
236 |
| 257/E33.052 |
Having mis barrier layer (epo) |
26 |
| 257/E33.045 |
Having p-n or hi-lo junction (epo) |
113 |
| 257/E33.047 |
Having at least two p-n junctions (epo) |
54 |
| 257/E33.046 |
P-i-n device (epo) |
41 |
| 257/E33.051 |
Having schottky barrier (epo) |
33 |
| 257/911 |
Light sensitive array adapted to be scanned by electron beam (e.g.,vidicon device) |
31 |
| 257/909 |
Macrocell arrays (e.g., gate arrays with variable size or configuration of cells) |
91 |
| 257/798 |
Miscellaneous |
223 |
| 257/901 |
Mosfet substrate bias |
88 |
| 257/900 |
Mosfet type gate sidewall insulating spacer |
497 |
| 257/916 |
Narrow band gap semiconductor material (>>1ev) |
42 |
| 257/49 |
Non-single crystal, or recrystallized, semiconductor material forms part of active junction (including field-induced active junction) |
289 |
| 257/52 |
Amorphous semiconductor material |
350 |
| 257/63 |
Amorphous semiconductor is alloy or contains material to change band gap (e.g., si x ge 1-x , sin y ) |
166 |
| 257/57 |
Field effect device in amorphous semiconductor material |
768 |
| 257/59 |
In array having structure for use as imager or display, or with transparent electrode |
3484 |
| 257/60 |
With field electrode under or on a side edge of amorphous semiconductor material (e.g., vertical current path) |
160 |
| 257/61 |
With heavily doped regions contacting amorphous semiconductor material (e.g., heavily doped source and drain) |
177 |
| 257/58 |
With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
76 |
| 257/53 |
Responsive to nonelectrical external signals (e.g., light) |
556 |
| 257/55 |
Amorphous semiconductor is alloy or contains material to change band gap (e.g., si x ge 1-x , sin y ) |
252 |
| 257/56 |
With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
135 |
| 257/54 |
With schottky barrier to amorphous material |
92 |
| 257/62 |
With impurity other than hydrogen to passivate dangling bonds (e.g., halide) |
73 |
| 257/66 |
Field effect device in non-single crystal, or recrystallized, semiconductor material |
1344 |
| 257/72 |
In array having structure for use as imager or display, or with transparent electrode |
3451 |
| 257/71 |
In combination with capacitor element (e.g., dram) |
335 |
| 257/67 |
In combination with device formed in single crystal semiconductor material (e.g., stacked fets) |
364 |
| 257/68 |
Capacitor element in single crystal semiconductor (e.g., dram) |
293 |
| 257/69 |
Field effect transistor in single crystal material, complementary to that in non-single crystal, or recrystallized, material (e.g., cmos) |
425 |
| 257/70 |
Recrystallized semiconductor material |
205 |
| 257/50 |
Non-single crystal, or recrystallized, active junction adapted to be electrically shorted (e.g., "anti-fuse" element) |
323 |
| 257/65 |
Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., ge x si 1- x, polycrystalline silicon with dangling bond modifier) |
304 |
| 257/51 |
Non-single crystal, or recrystallized, material forms active junction with single crystal material (e.g., monocrystal to polycrystal pn junction or heterojunction) |
230 |
| 257/64 |
Non-single crystal, or recrystallized, material with specified crystal structure (e.g., specified crystal size or orientation) |
399 |
| 257/74 |
Plural recrystallized semiconductor layers (e.g., "3-dimensional integrated circuit") |
162 |
| 257/75 |
Recrystallized semiconductor material |
229 |
| 257/73 |
Schottky barrier to polycrystalline semiconductor material |
79 |
| 257/40 |
Organic semiconductor material |
3600 |
| 257/E51.001 |
Organic solid state devices, processes or apparatus peculiar to manufacture or treatment of such devices or of parts thereof |
291 |
| 257/E51.024 |
Selection of material for organic solid-state device (epo) |
65 |
| 257/E51.045 |
Biomolecule or macromolecule (e.g., proteins, atp, chlorophyl, beta-carotene, lipids, enzymes) (epo) |
33 |
| 257/E51.038 |
Carbon-containing materials (epo) |
53 |
| 257/E51.04 |
Carbon nanotubes (epo) |
274 |
| 257/E51.039 |
Fullerenes (epo) |
63 |
| 257/E51.041 |
Coordination compound (e.g., porphyrin, phthalocyanine, metal(ii) polypyridine complexes) (epo) |
301 |
| 257/E51.043 |
Metal complexes comprising group iiib metal (al, ga, in, or ti) (e.g., tris (8-hydroxyquinoline) aluminium (alq3)) (epo) |
416 |
| 257/E51.042 |
Phthalocyanine (epo) |
195 |
| 257/E51.044 |
Transition metal complexes (e.g., ru(ii) polypyridine complexes) (epo) |
391 |
| 257/E51.025 |
For organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (epo) |
35 |
| 257/E51.026 |
For radiation-sensitive or light-emitting organic solid-state device with potential or surface barrier (epo) |
113 |
| 257/E51.052 |
Langmuir blodgett film (epo) |
24 |
| 257/E51.047 |
Macromolecular system with low molecular weight (e.g., cyanine dyes, coumarine dyes, tetrathiafulvalene) (epo) |
426 |
| 257/E51.051 |
Amine compound having at least two aryl on amine-nitrogen atom (e.g., triphenylamine) (epo) |
630 |
| 257/E51.048 |
Charge transfer complexes (epo) |
64 |
| 257/E51.049 |
Polycondensed aromatic or heteroaromatic compound (e.g., pyrene, perylene, pentacene) (epo) |
469 |
| 257/E51.05 |
Aromatic compound containing heteroatom (e.g., perylenetetracarboxylic dianhydride, perylene tetracarboxylic diimide) (epo) |
235 |
| 257/E51.027 |
Organic polymer or oligomer (epo) |
129 |
| 257/E51.033 |
Comprising aliphatic or olefinic chains (e.g., polyn-vinylcarbazol, pvc, ptfe) (epo) |
104 |
| 257/E51.034 |
Polyacetylene or derivatives (epo) |
36 |
| 257/E51.035 |
Polyn-vinylcarbazol and derivative (epo) |
97 |
| 257/E51.028 |
Comprising aromatic, heteroaromatic, or arrylic chains (e.g., polyaniline, polyphenylene, polyphenylene vinylene) (epo) |
324 |
| 257/E51.029 |
Heteroaromatic compound comprising sulfur or selene (e.g., polythiophene) (epo) |
307 |
| 257/E51.03 |
Polyethylene dioxythiophene and derivative (epo) |
137 |
| 257/E51.032 |
Polyflurorene and derivative (epo) |
187 |
| 257/E51.031 |
Polyphenylenevinylene and derivatives (epo) |
230 |
| 257/E51.036 |
Copolymers (epo) |
204 |
| 257/E51.037 |
Ladder-type polymer (epo) |
34 |
| 257/E51.046 |
Silicon-containing organic semiconductor (epo) |
110 |
| 257/E51.002 |
Structural detail of device (epo) |
20 |
| 257/E51.018 |
Light-emitting organic solid-state device with potential or surface barrier (epo) |
453 |
| 257/E51.019 |
Electrode (epo) |
87 |
| 257/E51.021 |
Arrangements for extracting light from device (e.g., bragg reflector pair) (epo) |
38 |
| 257/E51.02 |
Encapsulation (epo) |
51 |
| 257/E51.022 |
Multicolor organic light-emitting device (oled) (epo) |
233 |
| 257/E51.023 |
Molecular electronic device (epo) |
159 |
| 257/E51.003 |
Organic solid-state device adapted for rectifying, amplifying, oscillating, or switching, or capacitors or resistors with potential or surface barrier (epo) |
49 |
| 257/E51.004 |
Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (epo) |
44 |
| 257/E51.005 |
Field-effect device (e.g., tft, fet) (epo) |
332 |
| 257/E51.006 |
Insulated gate field-effect transistor (epo) |
294 |
| 257/E51.007 |
Comprising organic gate dielectric (epo) |
123 |
| 257/E51.008 |
Controllable only by variation of electric current supplied or only electric potential applied to electrode carrying current to be rectified, amplified, oscillated, or switched (e.g., two terminal device) (epo) |
33 |
| 257/E51.011 |
Comprising organic/inorganic heterojunction (epo) |
32 |
| 257/E51.01 |
Comprising organic/organic junction (e.g., heterojunction) (epo) |
25 |
| 257/E51.009 |
Comprising schottky junction (epo) |
17 |
| 257/E51.012 |
Radiation-sensitive organic solid-state device (epo) |
121 |
| 257/E51.014 |
Comprising bulk heterojunction (epo) |
37 |
| 257/E51.017 |
Comprising organic semiconductor-organic semiconductor heterojunction (epo) |
72 |
| 257/E51.015 |
Comprising organic/inorganic heterojunction (epo) |
27 |
| 257/E51.016 |
Majority carrier device using sensitization of wide band gap semiconductor (e.g., tio 2 ) (epo) |
41 |
| 257/E51.013 |
Metal-organic semiconductor-metal device (epo) |
39 |
| 257/E23.001 |
Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) |
260 |
| 257/E23.01 |
Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) |
497 |
| 257/E23.012 |
Consisting of lead-in layers inseparably applied to semiconductor body (epo) |
89 |
| 257/E23.014 |
Beam leads (epo) |
74 |
| 257/E23.013 |
Bridge structure with air gap (epo) |
140 |
| 257/E23.019 |
Consisting of layered constructions comprising conductive layers and insulating layers, e.g., planar contacts (epo) |
921 |
| 257/E23.02 |
Bonding areas, e.g., pads (epo) |
1213 |
| 257/E23.021 |
Bump or ball contacts (epo) |
1958 |
| 257/E23.022 |
Overhang structure (epo) |
36 |
| 257/E23.016 |
For devices consisting of semiconductor layers on insulating or semi-insulating substrates, e.g., silicon on sapphire devices, i.e., sos (epo) |
86 |
| 257/E23.017 |
Materials (epo) |
88 |
| 257/E23.018 |
Conductive organic material or pastes, e.g., conductive adhesives, inks (epo) |
136 |
| 257/E23.015 |
Pads with extended contours, e.g., grid structure, branch structure, finger structure (epo) |
314 |
| 257/E23.023 |
Consisting of soldered or bonded constructions (epo) |
336 |
| 257/E23.026 |
Bases or plates or solder therefor (epo) |
128 |
| 257/E23.028 |
Characterized by material (epo) |
77 |
| 257/E23.03 |
Carbon (epo) |
28 |
| 257/E23.029 |
Semiconductor (epo) |
11 |
| 257/E23.027 |
Having heterogeneous or anisotropic structure (epo) |
49 |
| 257/E23.031 |
Lead frames or other flat leads (epo) |
451 |
| 257/E23.032 |
Additional leads (epo) |
79 |
| 257/E23.033 |
Additional leads being bump or wire (epo) |
144 |
| 257/E23.035 |
Additional leads being multilayer (epo) |
43 |
| 257/E23.034 |
Additional leads being tape carrier or flat leads (epo) |
153 |
| 257/E23.036 |
Additional leads being wiring board (epo) |
196 |
| 257/E23.052 |
Assembly of semiconductor devices on lead frame (epo) |
640 |
| 257/E23.058 |
Battery in combination with lead frame (epo) |
25 |
| 257/E23.057 |
Capacitor integral with or on lead frame (epo) |
114 |
| 257/E23.037 |
Characterized by die pad (epo) |
521 |
| 257/E23.039 |
Chip-on-leads or leads-on-chip techniques, i.e., inner lead fingers being used as die pad (epo) |
1069 |
| 257/E23.04 |
Having bonding material between chip and die pad (epo) |
221 |
| 257/E23.038 |
Insulative substrate being used as die pad, e.g., ceramic, plastic (epo) |
73 |
| 257/E23.053 |
Characterized by materials of lead frames or layers thereon (epo) |
120 |
| 257/E23.054 |
Metallic layers on lead frames (epo) |
302 |
| 257/E23.055 |
Consisting of thin flexible metallic tape with or without film carrier (epo) |
535 |
| 257/E23.043 |
Geometry of lead frame (epo) |
698 |
| 257/E23.046 |
Cross-section geometry (epo) |
394 |
| 257/E23.047 |
Characterized by bent parts (epo) |
253 |
| 257/E23.048 |
Bent parts being outer leads (epo) |
231 |
| 257/E23.045 |
Deformation absorbing parts in lead frame plane, e.g., meanderline shape (epo) |
71 |
| 257/E23.044 |
For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) |
446 |
| 257/E23.049 |
Insulating layers on lead frame, e.g., bridging members (epo) |
209 |
| 257/E23.05 |
Side rails of lead frame, e.g., with perforations, sprocket holes (epo) |
50 |
| 257/E23.056 |
Insulating layers on lead frames (epo) |
81 |
| 257/E23.041 |
Multilayer (epo) |
89 |
| 257/E23.059 |
Oscillators in combination with lead frame (epo) |
25 |
| 257/E23.042 |
Plurality of lead frames mounted in one device (epo) |
206 |
| 257/E23.051 |
Specifically adapted to facilitate heat dissipation (epo) |
299 |
| 257/E23.06 |
Leads, i.e., metallizations or lead frames on insulating substrates, e.g., chip carriers (epo) |
237 |
| 257/E23.068 |
Additional leads joined to metallizations on insulating substrate, e.g., pins, bumps, wires, flat leads (epo) |
812 |
| 257/E23.069 |
Spherical bumps on substrate for external connection, e.g., ball grid arrays (bga) (epo) |
1544 |
| 257/E23.072 |
Characterized by materials (epo) |
225 |
| 257/E23.074 |
Carbon, e.g., fullerenes (epo) |
18 |
| 257/E23.075 |
Conductive materials containing organic materials or pastes, e.g., for thick films (epo) |
331 |
| 257/E23.073 |
Conductive materials containing semiconductor material (epo) |
16 |
| 257/E23.076 |
Conductive materials containing superconducting material (epo) |
32 |
| 257/E23.077 |
Materials of insulating layers or coatings (epo) |
429 |
| 257/E23.063 |
Chip support structure consisting of plurality of insulating substrates (epo) |
308 |
| 257/E23.065 |
Flexible insulating substrates (epo) |
747 |
| 257/E23.064 |
For flat cards, e.g., credit cards (epo) |
227 |
| 257/E23.07 |
Geometry or layout (epo) |
863 |
| 257/E23.071 |
For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) |
41 |
| 257/E23.066 |
Lead frames fixed on or encapsulated in insulating substrates (epo) |
346 |
| 257/E23.061 |
Leads being also applied on sidewalls or bottom of substrate, e.g., leadless packages for surface mounting (epo) |
361 |
| 257/E23.062 |
Multilayer substrates (epo) |
616 |
| 257/E23.067 |
Via connections through substrates, e.g., pins going through substrate, coaxial cables (epo) |
1325 |
| 257/E23.024 |
Wire-like arrangements or pins or rods (epo) |
264 |
| 257/E23.025 |
Characterized by materials of wires or their coatings (epo) |
153 |
| 257/E23.078 |
Flexible arrangements, e.g., pressure contacts without soldering (epo) |
473 |
| 257/E23.079 |
For integrated circuit devices, e.g., power bus, number of leads (epo) |
925 |
| 257/E23.011 |
Internal lead connections, e.g., via connections, feedthrough structures (epo) |
977 |
| 257/E23.141 |
Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) |
462 |
| 257/E23.142 |
Including external interconnections consisting of multilayer structure of conductive and insulating layers inseparably formed on semiconductor body (epo) |
471 |
| 257/E23.144 |
Capacitive arrangements or effects of, or between wiring layers (epo) |
849 |
| 257/E23.154 |
Characterized by materials (epo) |
68 |
| 257/E23.155 |
Conductive materials (epo) |
15 |
| 257/E23.157 |
Based on metals, e.g., alloys, metal silicides (epo) |
92 |
| 257/E23.158 |
Principal metal being aluminum (epo) |
54 |
| 257/E23.16 |
Additional layers associated with aluminum layers, e.g., adhesion, barrier, cladding layers (epo) |
720 |
| 257/E23.159 |
Aluminum alloys (epo) |
114 |
| 257/E23.161 |
Principal metal being copper (epo) |
218 |
| 257/E23.162 |
Principal metal being noble metal, e.g., gold (epo) |
149 |
| 257/E23.163 |
Principal metal being refractory metal (epo) |
217 |
| 257/E23.165 |
Containing carbon, e.g., fullerenes (epo) |
41 |
| 257/E23.166 |
Containing conductive organic materials or pastes, e.g., conductive adhesives, inks (epo) |
69 |
| 257/E23.164 |
Containing semiconductor material, e.g., polysilicon (epo) |
276 |
| 257/E23.156 |
Containing superconducting materials (epo) |
40 |
| 257/E23.167 |
Insulating materials (epo) |
1142 |
| 257/E23.143 |
Crossover interconnections (epo) |
116 |
| 257/E23.151 |
Geometry or layout of interconnection structure (epo) |
702 |
| 257/E23.153 |
Arrangements of power or ground buses (epo) |
376 |
| 257/E23.152 |
Cross-sectional geometry (epo) |
364 |
| 257/E23.145 |
Via connections in multilevel interconnection structure (epo) |
1431 |
| 257/E23.146 |
With adaptable interconnections (epo) |
226 |
| 257/E23.147 |
Comprising antifuses, i.e., connections having their state changed from nonconductive to conductive (epo) |
561 |
| 257/E23.148 |
Change of state resulting from use of external beam, e.g., laser beam or ion beam (epo) |
79 |
| 257/E23.149 |
Comprising fuses, i.e., connections having their state changed from conductive to nonconductive (epo) |
524 |
| 257/E23.15 |
Change of state resulting from use of external beam, e.g., laser beam or ion beam (epo) |
451 |
| 257/E23.168 |
Including internal interconnections, e.g., cross-under constructions (epo) |
186 |
| 257/E23.169 |
Interconnection structure between plurality of semiconductor chips being formed on or in insulating substrates (epo) |
390 |
| 257/E23.171 |
Adaptable interconnections, e.g., for engineering changes (epo) |
233 |
| 257/E23.172 |
Assembly of plurality of insulating substrates (epo) |
431 |
| 257/E23.178 |
Chips being integrally enclosed by interconnect and support structures (epo) |
429 |
| 257/E23.174 |
Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (epo) |
403 |
| 257/E23.17 |
Crossover interconnections, e.g., bridge stepovers (epo) |
90 |
| 257/E23.177 |
Flexible insulating substrates (epo) |
312 |
| 257/E23.176 |
For flat cards, e.g., credit cards (epo) |
82 |
| 257/E23.175 |
Geometry or layout of interconnection structure (epo) |
273 |
| 257/E23.173 |
Multilayer substrates (epo) |
452 |
| 257/E23.08 |
Arrangements for cooling, heating, ventilating or temperature compensation; temperature-sensing arrangements (epo) |
356 |
| 257/E23.081 |
Arrangements for heating (epo) |
77 |
| 257/E23.095 |
Complete device being wholly immersed in fluid other than air (epo) |
30 |
| 257/E23.096 |
Fluid being liquefied gas, e.g., in cryogenic vessel (epo) |
56 |
| 257/E23.082 |
Cooling arrangements using peltier effect (epo) |
154 |
| 257/E23.087 |
Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling (epo) |
212 |
| 257/E23.09 |
Auxiliary members in containers characterized by their shape, e.g., pistons (epo) |
264 |
| 257/E23.092 |
Auxiliary members in encapsulations (epo) |
844 |
| 257/E23.091 |
Bellows (epo) |
39 |
| 257/E23.093 |
In combination with jet impingement (epo) |
31 |
| 257/E23.094 |
Pistons, e.g., spring-loaded members (epo) |
115 |
| 257/E23.088 |
Cooling by change of state, e.g., use of heat pipes (epo) |
649 |
| 257/E23.089 |
By melting or evaporation of solids (epo) |
70 |
| 257/E23.097 |
Involving transfer of heat by flowing fluids (epo) |
38 |
| 257/E23.099 |
By flowing gases, e.g., air (epo) |
771 |
| 257/E23.1 |
Jet impingement (epo) |
74 |
| 257/E23.098 |
By flowing liquids (epo) |
617 |
| 257/E23.083 |
Mountings or securing means for detachable cooling or heating arrangements; fixed by friction, plugs or springs (epo) |
102 |
| 257/E23.086 |
Snap-on arrangements, e.g., clips (epo) |
734 |
| 257/E23.084 |
With bolts or screws (epo) |
491 |
| 257/E23.085 |
For stacked arrangements of plurality of semiconductor devices (epo) |
237 |
| 257/E23.101 |
Selection of materials, or shaping, to facilitate cooling or heating, e.g., heat sinks (epo) |
748 |
| 257/E23.11 |
Cooling facilitated by selection of materials for device (or materials for thermal expansion adaptation, e.g., carbon) (epo) |
88 |
| 257/E23.113 |
Ceramic materials or glass (epo) |
91 |
| 257/E23.111 |
Diamond (epo) |
187 |
| 257/E23.112 |
Having heterogeneous or anisotropic structure, e.g., powder or fibers in matrix, wire mesh, porous structures (epo) |
294 |
| 257/E23.102 |
Cooling facilitated by shape of device (epo) |
358 |
| 257/E23.104 |
Characterized by shape of housing (epo) |
296 |
| 257/E23.103 |
Foil-like cooling fins or heat sinks (epo) |
492 |
| 257/E23.105 |
Wire-like or pin-like cooling fins or heat sinks (epo) |
527 |
| 257/E23.106 |
Laminates or multilayers, e.g., direct bond copper ceramic substrates (epo) |
385 |
| 257/E23.109 |
Metallic materials (epo) |
164 |
| 257/E23.107 |
Organic materials with or without thermo-conductive filler (epo) |
292 |
| 257/E23.108 |
Semiconductor materials (epo) |
31 |
| 257/E23.18 |
Containers; seals (epo) |
72 |
| 257/E23.191 |
Characterized by material of container or its electrical properties (epo) |
67 |
| 257/E23.192 |
Material being electrical insulator, e.g., glass (epo) |
83 |
| 257/E23.193 |
Characterized by material or arrangement of seals between parts, e.g., between cap and base of container or between leads and walls of container (epo) |
727 |
| 257/E23.181 |
Characterized by shape of container or parts, e.g., caps, walls (epo) |
358 |
| 257/E23.183 |
Container being hollow construction and having conductive base as mounting as well as lead for the semiconductor body (epo) |
27 |
| 257/E23.187 |
Another lead being formed by cover plate parallel to base plate, e.g., sandwich type (epo) |
216 |
| 257/E23.185 |
Other leads being parallel to base (epo) |
88 |
| 257/E23.186 |
Other leads being perpendicular to base (epo) |
65 |
| 257/E23.184 |
Other leads having insulating passage through base (epo) |
38 |
| 257/E23.188 |
Container being hollow construction and having insulating or insulated base as mounting for semiconductor body (epo) |
70 |
| 257/E23.189 |
Leads being parallel to base (epo) |
457 |
| 257/E23.19 |
Leads having passage through base (epo) |
203 |
| 257/E23.182 |
Container being hollow construction having no base used as mounting for semiconductor body (epo) |
38 |
| 257/E23.002 |
Details not otherwise provided for, e.g., protection against moisture (epo) |
376 |
| 257/E23.116 |
Encapsulations, e.g., encapsulating layers, coatings, e.g., for protection (epo) |
206 |
| 257/E23.123 |
Characterized by arrangement or shape (epo) |
84 |
| 257/E23.124 |
Device being completely enclosed (epo) |
1203 |
| 257/E23.126 |
Double encapsulation or coating and encapsulation (epo) |
322 |
| 257/E23.128 |
Encapsulation having cavity (epo) |
146 |
| 257/E23.127 |
Sealing arrangements between parts, e.g., adhesion promoters (epo) |
124 |
| 257/E23.125 |
Substrate forming part of encapsulation (epo) |
740 |
| 257/E23.129 |
Partial encapsulation or coating (epo) |
174 |
| 257/E23.133 |
Coating also covering sidewalls of semiconductor body (epo) |
93 |
| 257/E23.132 |
Coating being directly applied to semiconductor body, e.g., passivation layer (epo) |
401 |
| 257/E23.13 |
Coating being foil (epo) |
60 |
| 257/E23.131 |
Coating or filling in grooves made in semiconductor body (epo) |
64 |
| 257/E23.134 |
Multilayer coating (epo) |
148 |
| 257/E23.117 |
Characterized by material, e.g., carbon (epo) |
63 |
| 257/E23.119 |
Organic, e.g., plastic, epoxy (epo) |
620 |
| 257/E23.121 |
Containing filler (epo) |
192 |
| 257/E23.12 |
Organo-silicon compounds, e.g., silicone (epo) |
125 |
| 257/E23.118 |
Oxides or nitrides or carbides, e.g., ceramics, glass (epo) |
224 |
| 257/E23.122 |
Semiconductor material, e.g., amorphous silicon (epo) |
42 |
| 257/E23.135 |
Fillings or auxiliary members in containers or encapsulations, e.g., centering rings (epo) |
257 |
| 257/E23.136 |
Fillings characterized by material, its physical or chemical properties, or its arrangement within complete device (epo) |
27 |
| 257/E23.138 |
Gaseous at normal operating temperature of device (epo) |
18 |
| 257/E23.137 |
Including materials for absorbing or reacting with moisture or other undesired substances, e.g., getters (epo) |
94 |
| 257/E23.139 |
Liquid at normal operating temperature of device (epo) |
17 |
| 257/E23.14 |
Solid or gel at normal operating temperature of device (epo) |
407 |
| 257/E23.179 |
Marks applied to semiconductor devices or parts, e.g., registration marks, test patterns, alignment structures, wafer maps (epo) |
1435 |
| 257/E23.003 |
Mountings, e.g., nondetachable insulating substrates (epo) |
100 |
| 257/E23.005 |
Characterized by material or its electrical properties (epo) |
48 |
| 257/E23.009 |
Ceramic or glass substrates (epo) |
476 |
| 257/E23.006 |
Metallic substrates having insulating layers (epo) |
271 |
| 257/E23.007 |
Organic substrates, e.g., plastic (epo) |
257 |
| 257/E23.008 |
Semiconductor insulating substrates (epo) |
163 |
| 257/E23.004 |
Characterized by shape (epo) |
1039 |
| 257/E23.194 |
Protection against mechanical damage (epo) |
290 |
| 257/E23.114 |
Protection against radiation, e.g., light, electromagnetic waves (epo) |
773 |
| 257/E23.115 |
Against alpha rays (epo) |
102 |
| 257/618 |
Physical configuration of semiconductor (e.g., mesa, bevel, groove, etc.) |
681 |
| 257/622 |
Groove |
756 |
| 257/623 |
Mesa structure (e.g., including undercut or stepped mesa configuration or having constant slope taper) |
515 |
| 257/626 |
Combined with passivating coating |
196 |
| 257/625 |
Semiconductor body including mesa is intimately bonded to thick electrical and/or thermal conductor member of larger lateral extent than semiconductor body (e.g., "plated heat sink" microwave diode) |
135 |
| 257/624 |
With low resistance ohmic connection means along exposed mesa edge (e.g., contact or heavily doped region along exposed mesa to reduce "skin effect" losses in microwave diode) |
92 |
| 257/621 |
With electrical contact in hole in semiconductor (e.g., lead extends through semiconductor body) |
547 |
| 257/620 |
With peripheral feature due to separation of smaller semiconductor chip from larger wafer (e.g., scribe region, or means to prevent edge effects such as leakage current at peripheral chip separation area) |
728 |
| 257/627 |
With specified crystal plane or axis |
489 |
| 257/628 |
Major crystal plane or axis other than (100), (110), or (111) (e.g., (731) axis, crystal plane several degrees from (100) toward (011), etc.) |
294 |
| 257/619 |
With thin active central semiconductor portion surrounded by thicker inactive shoulder (e.g., for mechanical support) |
189 |
| 257/658 |
Plate type rectifier array |
44 |
| 257/917 |
Plural dopants of same conductivity type in same region |
39 |
| 257/905 |
Plural dram cells share common contact or common trench |
141 |
| 257/929 |
Pn junction isolated integrated circuit with isolation walls having minimum dopant concentration at intermediate depth in epitaxial layer (e.g., diffused from both surfaces of epitaxial layer) |
23 |
| 257/41 |
Point contact device |
70 |
| 257/914 |
Polysilicon containing oxygen, nitrogen, or carbon (e.g., sipos) |
83 |
| 257/E21.001 |
Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) |
486 |
| 257/E21.532 |
Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) |
64 |
| 257/E21.705 |
Assembly of devices consisting of solid-state components formed in or on a common substrate; assembly of integrated circuit devices (epo) |
714 |
| 257/E21.536 |
Manufacture of specific parts of devices (epo) |
66 |
| 257/E21.575 |
Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) |
813 |
| 257/E21.576 |
Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) |
2070 |
| 257/E21.584 |
Barrier, adhesion or liner layer (epo) |
2566 |
| 257/E21.589 |
By forming conductive members before deposition of protective insulating material, e.g., pillars, studs (epo) |
604 |
| 257/E21.577 |
By forming via holes (epo) |
2124 |
| 257/E21.579 |
For "dual damascene" type structures (epo) |
1744 |
| 257/E21.578 |
Tapered via holes (epo) |
486 |
| 257/E21.582 |
Characterized by formation and post treatment of conductors, e.g., patterning (epo) |
1538 |
| 257/E21.581 |
Dielectric comprising air gaps (epo) |
532 |
| 257/E21.585 |
Filling of holes, grooves, vias or trenches with conductive material (epo) |
1997 |
| 257/E21.587 |
By deposition over sacrificial masking layer, e.g., lift-off (epo) |
160 |
| 257/E21.586 |
By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (epo) |
610 |
| 257/E21.588 |
Reflowing or applying pressure to fill contact hole, e.g., to remove voids (epo) |
233 |
| 257/E21.59 |
Local interconnects; local pads (epo) |
1048 |
| 257/E21.591 |
Modifying pattern or conductivity of conductive members, e.g., formation of alloys, reduction of contact resistances (epo) |
334 |
| 257/E21.592 |
By altering solid-state characteristics of conductive members, e.g., fuses, in situ oxidation, laser melting (epo) |
461 |
| 257/E21.593 |
By forming silicide of refractory metal (epo) |
326 |
| 257/E21.594 |
By using super-conducting material (epo) |
16 |
| 257/E21.595 |
Modifying pattern (epo) |
105 |
| 257/E21.596 |
Using laser, e.g., laser cutting, laser direct writing, laser repair (epo) |
261 |
| 257/E21.583 |
Planarization; smoothing (epo) |
772 |
| 257/E21.58 |
Planarizing dielectric (epo) |
588 |
| 257/E21.597 |
Formed through semiconductor substrate (epo) |
579 |
| 257/E21.54 |
Making of isolation regions between components (epo) |
265 |
| 257/E21.573 |
Air gaps (epo) |
316 |
| 257/E21.543 |
Between components manufactured in active substrate comprising group ii-vi compound semiconductor (epo) |
1 |
| 257/E21.542 |
Between components manufactured in active substrate comprising group iii-v compound semiconductor (epo) |
125 |
| 257/E21.541 |
Between components manufactured in active substrate comprising sic compound semiconductor (epo) |
29 |
| 257/E21.545 |
Dielectric regions, e.g., epic dielectric isolation, locos; trench refilling techniques, soi technology, use of channel stoppers (epo) |
434 |
| 257/E21.56 |
Dielectric isolation using epic technique, i.e., epitaxial passivated integrated circuit (epo) |
183 |
| 257/E21.552 |
Using local oxidation of silicon, e.g., locos, swami, silo (epo) |
559 |
| 257/E21.553 |
In region recessed from surface, e.g., in recess, groove, tub or trench region (epo) |
213 |
| 257/E21.555 |
Recessed region having shape other than rectangular, e.g., rounded or oblique shape (epo) |
94 |
| 257/E21.554 |
Using auxiliary pillars in recessed region, e.g., to form locos over extended areas (epo) |
43 |
| 257/E21.556 |
Introducing electrical inactive or active impurities in local oxidation region, e.g., to alter locos oxide growth characteristics or for additional isolation purpose (epo) |
117 |
| 257/E21.557 |
Introducing electrical active impurities in local oxidation region solely for forming channel stoppers (epo) |
237 |
| 257/E21.558 |
Introducing both types of electrical active impurities in local oxidation region solely for forming channel stoppers, e.g., for isolation of complementary doped regions (epo) |
108 |
| 257/E21.559 |
With plurality of successive local oxidation steps (epo) |
93 |
| 257/E21.571 |
Using selective deposition of single crystal silicon, i.e., seg technique (epo) |
92 |
| 257/E21.561 |
Using semiconductor or insulator technology, i.e., soi technology (epo) |
419 |
| 257/E21.564 |
Soi together with lateral isolation, e.g., using local oxidation of silicon, or dielectric or polycrystalline material refilled trench or air gap isolation regions, e.g., completely isolated semiconductor islands (epo) |
869 |
| 257/E21.567 |
Using bonding technique (epo) |
499 |
| 257/E21.569 |
Using silicon etch back technique, e.g., besoi, eltran (epo) |
131 |
| 257/E21.568 |
With separation/delamination along ion implanted layer, e.g., "smart-cut", "unibond" (epo) |
503 |
| 257/E21.57 |
With separation/delamination along porous layer (epo) |
201 |
| 257/E21.565 |
Using full isolation by porous oxide silicon, i.e., fipos technique (epo) |
32 |
| 257/E21.566 |
Using lateral overgrowth technique, i.e., elo techniques (epo) |
71 |
| 257/E21.562 |
Using selective deposition of single crystal silicon, e.g., selective epitaxial growth (seg) (epo) |
95 |
| 257/E21.563 |
Using silicon implanted buried insulating layers, e.g., oxide layers, i.e., simox technique (epo) |
207 |
| 257/E21.546 |
Using trench refilling with dielectric materials (epo) |
1369 |
| 257/E21.548 |
Concurrent filling of plurality of trenches having different trench shape or dimension, e.g., rectangular and v-shaped trenches, wide and narrow trenches, shallow and deep trenches (epo) |
714 |
| 257/E21.547 |
Dielectric material being obtained by full chemical transformation of nondielectric materials, such as polycrystalline silicon, metals (epo) |
109 |
| 257/E21.551 |
Introducing impurities in trench side or bottom walls, e.g., for forming channel stoppers or alter isolation behavior (epo) |
372 |
| 257/E21.549 |
Of trenches having shape other than rectangular or v shape, e.g., rounded corners, oblique or rounded trench walls (epo) |
589 |
| 257/E21.55 |
Trench shape altered by local oxidation of silicon process step, e.g., trench corner rounding by locos (epo) |
242 |
| 257/E21.574 |
Isolation by field effect (epo) |
139 |
| 257/E21.544 |
Pn junction isolation (epo) |
513 |
| 257/E21.572 |
Polycrystalline semiconductor regions (epo) |
509 |
| 257/E21.537 |
Making of localized buried regions, e.g., buried collector layer, internal connection, substrate contacts (epo) |
345 |
| 257/E21.539 |
For group iii-v compound semiconductor integrated circuits (epo) |
11 |
| 257/E21.538 |
Making of internal connections, substrate contacts (epo) |
435 |
| 257/E21.598 |
Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) |
82 |
| 257/E21.599 |
With subsequent division of substrate into plural individual devices (epo) |
815 |
| 257/E21.6 |
Involving separation of active layers from substrate (epo) |
51 |
| 257/E21.601 |
Leaving reusable substrate, e.g., epitaxial lift-off process (epo) |
22 |
| 257/E21.7 |
Substrate is nonsemiconductor body, e.g., insulating body (epo) |
62 |
| 257/E21.701 |
Substrate is sapphire, e.g., silicon on sapphire structure (sos) (epo) |
6 |
| 257/E21.703 |
Substrate is semiconductor body (epo) |
2691 |
| 257/E21.704 |
Substrate is nonsemiconductor body, e.g., insulating body (epo) |
175 |
| 257/E21.702 |
To produce devices, each consisting of single circuit element (epo) |
9 |
| 257/E21.602 |
To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) |
167 |
| 257/E21.606 |
Substrate being semiconductor, using silicon technology (epo) |
58 |
| 257/E21.608 |
Bipolar technology (epo) |
193 |
| 257/E21.611 |
Complementary devices, e.g., complementary transistors (epo) |
44 |
| 257/E21.612 |
Complementary vertical transistors (epo) |
97 |
| 257/E21.609 |
Comprising combination of vertical and lateral transistors (epo) |
43 |
| 257/E21.61 |
Comprising merged transistor logic or integrated injection logic (epo) |
65 |
| 257/E21.613 |
Memory structures (epo) |
127 |
| 257/E21.695 |
Combination of bipolar and field-effect technologies (epo) |
55 |
| 257/E21.696 |
Bipolar and mos technologies (epo) |
783 |
| 257/E21.615 |
Field-effect technology (epo) |
41 |
| 257/E21.616 |
Mis technology (epo) |
163 |
| 257/E21.617 |
Combination of charge coupled devices, i.e., ccd or bbd (epo) |
105 |
| 257/E21.631 |
Combination of enhancement and depletion transistors (epo) |
56 |
| 257/E21.632 |
Complementary field-effect transistors, e.g., cmos (epo) |
696 |
| 257/E21.641 |
Interconnection or wiring or contact manufacturing related aspects (epo) |
255 |
| 257/E21.642 |
Isolation region manufacturing related aspects, e.g., to avoid interaction of isolation region with adjacent structure (epo) |
354 |
| 257/E21.633 |
With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (epo) |
581 |
| 257/E21.635 |
With particular manufacturing method of gate conductor, e.g., particular materials, shapes (epo) |
172 |
| 257/E21.637 |
Gate conductors with different gate conductor materials or different gate conductor implants, e.g., dual gate structures (epo) |
511 |
| 257/E21.638 |
Gate conductors with different shapes, lengths or dimensions (epo) |
119 |
| 257/E21.636 |
Silicided or salicided gate conductors (epo) |
273 |
| 257/E21.639 |
With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (epo) |
355 |
| 257/E21.64 |
With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (epo) |
352 |
| 257/E21.634 |
With particular manufacturing method of source or drain, e.g., specific s or d implants or silicided s or d structures or raised s or d structures (epo) |
674 |
| 257/E21.643 |
With particular manufacturing method of vertical transistor structures, i.e., with channel vertical to substrate surface (epo) |
91 |
| 257/E21.646 |
Dynamic random access memory structures (dram) (epo) |
523 |
| 257/E21.647 |
Characterized by type of capacitor (epo) |
347 |
| 257/E21.648 |
Capacitor stacked over transfer transis tor (epo) |
1979 |
| 257/E21.65 |
Capacitor extending under transfer transistor area (epo) |
62 |
| 257/E21.651 |
Capacitor in u- or v-shaped trench in substrate (epo) |
490 |
| 257/E21.652 |
In combination with vertical transistor (epo) |
298 |
| 257/E21.653 |
Making connection between transistor and capacitor, e.g., buried strap (epo) |
191 |
| 257/E21.649 |
Making connection between transistor and capacitor, e.g., plug (epo) |
553 |
| 257/E21.656 |
Characterized by data lines (epo) |
129 |
| 257/E21.657 |
Making bit line (epo) |
350 |
| 257/E21.658 |
Making bit line contact (epo) |
488 |
| 257/E21.659 |
Making word line (epo) |
187 |
| 257/E21.654 |
Characterized by type of transistor; manufacturing of transistor (epo) |
664 |
| 257/E21.655 |
Transistor in u- or v-shaped trench in substrate (epo) |
307 |
| 257/E21.66 |
Simultaneous fabrication of periphery and memory cells (epo) |
818 |
| 257/E21.662 |
Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) |
155 |
| 257/E21.679 |
Charge trapping insulator nonvolatile memory structures (epo) |
601 |
| 257/E21.68 |
Electrically programmable (eprom), i.e., floating gate memory structures (epo) |
486 |
| 257/E21.681 |
With conductive layer as control gate (epo) |
65 |
| 257/E21.682 |
With source and drain on same level and without cell select transistor (epo) |
1515 |
| 257/E21.683 |
Simultaneous fabrication of periphery and memory cells (epo) |
107 |
| 257/E21.684 |
Including one type of peripheral fet (epo) |
62 |
| 257/E21.685 |
Control gate layer used for peripheral fet (epo) |
99 |
| 257/E21.686 |
Intergate dielectric layer used for peripheral fet (epo) |
40 |
| 257/E21.687 |
Floating gate layer used for peripheral fet (epo) |
57 |
| 257/E21.688 |
Floating gate dielectric layer used for peripheral fet (epo) |
162 |
| 257/E21.689 |
Including different types of peripheral fets (epo) |
386 |
| 257/E21.69 |
With source and drain on same level and with cell select transistor (epo) |
268 |
| 257/E21.691 |
Simultaneous fabrication of periphery and memory cells (epo) |
120 |
| 257/E21.692 |
With source and drain on different levels, e.g., sloping channel (epo) |
42 |
| 257/E21.693 |
For vertical channel (epo) |
141 |
| 257/E21.694 |
With doped region as control gate (epo) |
98 |
| 257/E21.663 |
Ferroelectric nonvolatile memory structures (epo) |
135 |
| 257/E21.664 |
With ferroelectric capacitor (epo) |
517 |
| 257/E21.665 |
Magnetic nonvolatile memory structures, e.g., mram (epo) |
449 |
| 257/E21.666 |
Prom (epo) |
41 |
| 257/E21.667 |
Rom only (epo) |
23 |
| 257/E21.678 |
Simultaneous fabrication of periphery and memory cells (epo) |
48 |
| 257/E21.677 |
With fets on different levels, e.g., 3d rom (epo) |
21 |
| 257/E21.676 |
With source and drain on different levels, e.g., vertical channel (epo) |
54 |
| 257/E21.668 |
With source and drain on same level, e.g., lateral channel (epo) |
29 |
| 257/E21.671 |
Doping programmed, e.g., mask rom (epo) |
62 |
| 257/E21.672 |
Entire channel doping programmed (epo) |
209 |
| 257/E21.673 |
Source or drain doping programmed (epo) |
69 |
| 257/E21.67 |
Gate contact programmed (epo) |
21 |
| 257/E21.675 |
Gate dielectric programmed, e.g., different thickness (epo) |
41 |
| 257/E21.674 |
Gate programmed, e.g., different gate material or no gate (epo) |
17 |
| 257/E21.669 |
Source or drain contact programmed (epo) |
34 |
| 257/E21.661 |
Static random access memory structures (sram) (epo) |
860 |
| 257/E21.627 |
Interconnection or wiring or contact manufacturing related aspects (epo) |
251 |
| 257/E21.628 |
Isolation region manufacturing related aspects, e.g., to avoid interaction of isolation region with adjacent structure (epo) |
353 |
| 257/E21.645 |
Memory structures (epo) |
453 |
| 257/E21.618 |
With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (epo) |
238 |
| 257/E21.621 |
With particular manufacturing method of gate conductor, e.g., particular materials, shapes (epo) |
172 |
| 257/E21.623 |
Gate conductors with different gate conductor materials or different gate conductor implants, e.g., dual gate structures (epo) |
181 |
| 257/E21.624 |
Gate conductors with different shapes, lengths or dimensions (epo) |
142 |
| 257/E21.622 |
Silicided or salicided gate conductors (epo) |
141 |
| 257/E21.625 |
With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (epo) |
536 |
| 257/E21.626 |
With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (epo) |
325 |
| 257/E21.619 |
With particular manufacturing method of source or drain, e.g., specific s or d implants or silicided s or d structures or raised s or d structures (epo) |
356 |
| 257/E21.62 |
Manufacturing common source or drain regions between plurality of conductor-insulator-semiconductor structures (epo) |
204 |
| 257/E21.629 |
With particular manufacturing method of vertical transistor structures, i.e., with channel vertical to substrate surface (epo) |
177 |
| 257/E21.63 |
With particular manufacturing method of wells or tubs, e.g., twin tubs, high energy well implants, buried implanted layers for lateral isolation (billi) (epo) |
117 |
| 257/E21.644 |
With particular manufacturing method of wells or tubs, e.g., twin tubs, high energy well implants, buried implanted layers for lateral isolation (billi) (epo) |
331 |
| 257/E21.614 |
Three-dimensional integrated circuits stacked in different levels (epo) |
414 |
| 257/E21.698 |
Substrate is group ii-vi semiconductor (epo) |
10 |
| 257/E21.697 |
Substrate is group iii-v semiconductor (epo) |
215 |
| 257/E21.699 |
Substrate is semiconductor other than diamond, sic, si, group iii-v compound, or group ii-vi compound (epo) |
17 |
| 257/E21.603 |
Substrate is semiconductor, using combination of semiconductor substrates, e.g., diamond, sic, si, group iii-v compound, and/or group ii-vi compound semiconductor substrates (epo) |
58 |
| 257/E21.604 |
Substrate is semiconductor, using diamond technology (epo) |
1 |
| 257/E21.605 |
Substrate is semiconductor, using sic technology (epo) |
34 |
| 257/E21.533 |
Of thick- or thin-film circuits or parts thereof (epo) |
51 |
| 257/E21.534 |
Of thick-film circuits or parts thereof (epo) |
48 |
| 257/E21.535 |
Of thin-film circuits or parts thereof (epo) |
93 |
| 257/E21.002 |
Manufacture or treatment of semiconductor device (epo) |
332 |
| 257/E21.04 |
Device having at least one potential-jump barrier or surface barrier, e.g., pn junction, depletion layer, carrier concentration layer (epo) |
67 |
| 257/E21.499 |
Assembling semiconductor devices, e.g., packaging , including mounting, encapsulating, or treatment of packaged semiconductor (epo) |
1265 |
| 257/E21.506 |
Attaching or detaching leads or other conductive members, to be used for carrying current to or from device in operation (epo) |
263 |
| 257/E21.507 |
Formation of contacts to semiconductor by use of metal layers separated by insulating layers, e.g., self-aligned contacts to source/drain or emitter/base (epo) |
1478 |
| 257/E21.508 |
Forming solder bumps (epo) |
1875 |
| 257/E21.518 |
Involving application of mechanical vibration, e.g., ultrasonic vibration (epo) |
399 |
| 257/E21.519 |
Involving application of pressure, e.g., thermo-compression bonding (epo) |
320 |
| 257/E21.516 |
Involving automation techniques using film carriers (epo) |
231 |
| 257/E21.509 |
Involving soldering or alloying process, e.g., soldering wires (epo) |
319 |
| 257/E21.511 |
Mounting on insulating member provided with metallic leads, e.g., flip-chip mounting, conductive die mounting (epo) |
1653 |
| 257/E21.512 |
Right-up bonding (epo) |
535 |
| 257/E21.51 |
Mounting on metallic conductive member (epo) |
241 |
| 257/E21.513 |
Mounting on semiconductor conductive member (epo) |
56 |
| 257/E21.514 |
Involving use of conductive adhesive (epo) |
483 |
| 257/E21.517 |
Involving use of electron or laser beam (epo) |
86 |
| 257/E21.515 |
Involving use of mechanical auxiliary part without use of alloying or soldering process, e.g., pressure contacts (epo) |
32 |
| 257/E21.502 |
Encapsulation, e.g., encapsulation layer, coating (epo) |
1033 |
| 257/E21.503 |
Encapsulation of active face of flip chip device, e.g., under filling or under encapsulation of flip-chip, encapsulation perform on chip or mounting substrate (epo) |
1603 |
| 257/E21.504 |
Moulds (epo) |
1077 |
| 257/E21.505 |
Insulative mounting semiconductor device on support (epo) |
792 |
| 257/E21.5 |
Mounting semiconductor bodies in container (epo) |
105 |
| 257/E21.501 |
Providing fillings in container, e.g., gas fillings (epo) |
37 |
| 257/E21.041 |
Device having semiconductor body comprising carbon, e.g., diamond, diamond-like carbon (epo) |
53 |
| 257/E21.044 |
Changing their shape, e.g., forming recess (epo) |
7 |
| 257/E21.045 |
Making electrode (epo) |
9 |
| 257/E21.048 |
Conductor-insulator-semiconductor electrode, e.g., mis contacts (epo) |
17 |
| 257/E21.046 |
Ohmic electrode (epo) |
32 |
| 257/E21.047 |
Schottky electrode (epo) |
28 |
| 257/E21.042 |
Making n- or p-doped regions (epo) |
41 |
| 257/E21.043 |
Using ion im plantation (epo) |
69 |
| 257/E21.049 |
Multistep processes for manufacture of device whose active layer, e.g., base, channel, comprises semiconducting carbon, e.g., diamond, diamond-like carbon (epo) |
31 |
| 257/E21.05 |
Device controllable only by electric current supplied or the electric potential applied to electrode which does not carry current to be rectified, amplified, or switched, e.g., three-terminal devices such as source, drain, and gate terminals; emitter, base, collector terminals (epo) |
20 |
| 257/E21.051 |
Field-effect transistor (epo) |
191 |
| 257/E21.052 |
Device controllable only by variation of electric current supplied or the electric potential applied to electrodes carrying current to be rectified, amplified, oscillated, or switched, e.g., two-terminal device (epo) |
7 |
| 257/E21.053 |
Diode (epo) |
83 |
| 257/E21.078 |
Device having semiconductor body comprising cuprous oxide (cu 2 o) or cuprous iodide (cui) (epo) |
17 |
| 257/E21.079 |
Preparation of substrate, preliminary treatment oxidation of substrate, reduction treatment (epo) |
22 |
| 257/E21.083 |
Application of specified conductive layer (epo) |
1 |
| 257/E21.082 |
Oxidation and subsequent heat treatment of substrate (epo) |
28 |
| 257/E21.08 |
Preliminary treatment of foundation plate (epo) |
5 |
| 257/E21.081 |
Reduction of copper oxide, treatment of oxide layer (epo) |
8 |
| 257/E21.084 |
Treatment of complete device, e.g., electroforming, heat treating (epo) |
11 |
| 257/E21.085 |
Device having semiconductor body comprising group iv elements or group iii-v compounds with or without impurities, e.g., doping materials (epo) |
95 |
| 257/E21.154 |
Alloying of impurity material, e.g., doping material, electrode material, with a semiconductor body (epo) |
116 |
| 257/E21.155 |
Alloying of doping material with group iii-v compound (epo) |
14 |
| 257/E21.156 |
Alloying of electrode material (epo) |
17 |
| 257/E21.157 |
With group iii-v compound (epo) |
10 |
| 257/E21.09 |
Deposition of semiconductor material on substrate, e.g., epitaxial growth, solid phase epitaxy (epo) |
516 |
| 257/E21.119 |
Characterized by the substrate (epo) |
159 |
| 257/E21.122 |
Bonding of semiconductor wafer to insulating substrate or to semic onducting substrate using an intermediate insulating layer (epo) |
598 |
| 257/E21.123 |
Substrate is crystalline semiconductor material, e.g., lattice adaptation, heteroepitaxy (epo) |
157 |
| 257/E21.128 |
Carbon on a noncarbon semiconductor substrate (epo) |
24 |
| 257/E21.125 |
Defect and dislocati on suppression due to lattice mismatch, e.g., lattice adaptation (epo) |
340 |
| 257/E21.126 |
Group iii-v compound on dissimilar group iii-v compound (epo) |
154 |
| 257/E21.127 |
Group iii-v compound on si or ge (epo) |
286 |
| 257/E21.124 |
Heteroepitaxy (epo) |
27 |
| 257/E21.12 |
Characterized by the post-treatment used to control the interface betw een substrate and epitaxial layer, e.g., ion implantation followed by annealing (epo) |
99 |
| 257/E21.129 |
Group iva, e.g., si, c, ge on group ivb, e.g., ti, zr (epo) |
127 |
| 257/E21.121 |
Substrate is crystalline insulating material, e.g., sapphire (epo) |
265 |
| 257/E21.13 |
The substrate is crystalline conducting material, e.g., metallic silicide (epo) |
40 |
| 257/E21.133 |
Epitaxial re-growth of non-monocrystalline semiconductor material, e.g., lateral epitaxy by seeded solidific ation, solid-state crystallization, solid-state graphoepitaxy, explosive crystallization, grain growth in polycrystalline material (epo) |
796 |
| 257/E21.134 |
Using a coherent energy beam, e.g., laser or electron beam (epo) |
768 |
| 257/E21.131 |
Selective epilaxial growth, e.g., simultaneous deposition of mono- and non-mono semiconductor material (epo) |
671 |
| 257/E21.132 |
Preparation of substrate for selective epitaxy (epo) |
48 |
| 257/E21.114 |
Using liquid deposition (epo) |
73 |
| 257/E21.117 |
Epitaxial deposition of group iii-v compound (epo) |
146 |
| 257/E21.118 |
Deposition on a semiconductor substrate not being an group iii-v compound (epo) |
10 |
| 257/E21.115 |
Epitaxial deposition of group iv elements, e.g., si, ge, c (epo) |
63 |
| 257/E21.116 |
Deposition on a semiconductor substrate which is different from the semiconductor material being deposited, i.e., formation of heterojunction (epo) |
16 |
| 257/E21.091 |
Using physical deposition, e.g., vacuum deposition, sputtering (epo) |
85 |
| 257/E21.096 |
Deposition of diamond (epo) |
9 |
| 257/E21.097 |
Epitaxial deposition of group iii-v compound (epo) |
187 |
| 257/E21.099 |
Deposition on insulating or metallic substrate (epo) |
17 |
| 257/E21.098 |
Deposition on semiconductor substrate not being an group iii-v compound (epo) |
29 |
| 257/E21.1 |
Doping during epitaxial deposition (epo) |
30 |
| 257/E21.092 |
Epitaxial deposition of group iv element, e.g., si, ge (epo) |
107 |
| 257/E21.094 |
Deposition on insulating or meta llic substrate (epo) |
56 |
| 257/E21.093 |
Deposition on semiconductor substrate being different from deposited semiconductor material; i.e., formation of heterojunctions (epo) |
35 |
| 257/E21.095 |
Epitaxial deposition of diamond (epo) |
8 |
| 257/E21.101 |
Using reduction or decomposition of gaseous compound yielding solid condensate, i.e., chemical deposition (epo) |
527 |
| 257/E21.107 |
Deposition of diamond (epo) |
11 |
| 257/E21.108 |
Epitaxial deposition of group iii-v compound (epo) |
300 |
| 257/E21.112 |
Deposition on a semiconductor substrate not being group iii-v compound (epo) |
131 |
| 257/E21.113 |
Deposition on an insulating or a metallic substrate (epo) |
98 |
| 257/E21.11 |
Doping the epitaxial deposit (epo) |
100 |
| 257/E21.111 |
Doping with transition metals to form semi-insulating layers (epo) |
37 |
| 257/E21.109 |
Using molecular beam technique (epo) |
28 |
| 257/E21.102 |
Epitaxial deposition of group iv elements, e.g., si, ge, c (epo) |
226 |
| 257/E21.103 |
Deposition on a semiconductor substrate which is different from the semiconductor material being deposited, i.e., formation of heterojunctions (epo) |
53 |
| 257/E21.104 |
Deposition on an insulating or a metallic substrate (epo) |
60 |
| 257/E21.106 |
Doping during the epitaxial deposition (epo) |
63 |
| 257/E21.105 |
Epitaxial deposition of diamond (epo) |
16 |
| 257/E21.135 |
Diffusion of impurity material, e.g., doping material, electrode material, into or out of a semiconductor body, or between semiconductor regions; interactions between two or more impurities; redistribution of impurities (epo) |
185 |
| 257/E21.14 |
Diffusion source (epo) |
67 |
| 257/E21.136 |
From the substrate during epitaxy, e.g., autodoping; preventing or using autodoping (epo) |
66 |
| 257/E21.139 |
Lithium-drift (epo) |
3 |
| 257/E21.137 |
To control carrier lifetime, i.e., deep level dopant (epo) |
43 |
| 257/E21.138 |
In group iii-v compound (epo) |
11 |
| 257/E21.144 |
Using diffusion into or out of a s olid from or into a solid phase, e.g., a doped oxide layer (epo) |
38 |
| 257/E21.152 |
Diffusion into or out of group iii-v compound (epo) |
64 |
| 257/E21.145 |
Diffusion into or out of group iv semiconductor (epo) |
24 |
| 257/E21.148 |
From or through or into an applied layer, e.g., photoresist, nitride (epo) |
138 |
| 257/E21.151 |
Applied layer being silicon or silicide or sipos, e.g., polysilicon, porous silicon (epo) |
386 |
| 257/E21.149 |
Applied layer is oxide, e.g., p 2 o 5 , psg, h 3 bo 3 , doped oxide (epo) |
242 |
| 257/E21.15 |
Through the applied layer (epo) |
45 |
| 257/E21.146 |
Using predeposition of impurities into the semiconductor surface, e.g., from gaseous phase (epo) |
41 |
| 257/E21.147 |
By ion implantation (epo) |
122 |
| 257/E21.141 |
Using diffusion into or out of a solid from or into a gaseous phase (epo) |
148 |
| 257/E21.142 |
Diffusion into or out of group iii-v compound (epo) |
37 |
| 257/E21.143 |
From or into plasma phase (epo) |
138 |
| 257/E21.153 |
Using diffusion into or out of a solid from or into a liquid phase, e.g., alloy diffusion process (epo) |
23 |
| 257/E21.086 |
Intermixing or interdiffusion or disordering of group iii-v heterostructures, e.g., iild (epo) |
58 |
| 257/E21.087 |
Joining of semiconductor body for junction formation (epo) |
31 |
| 257/E21.088 |
By direct bonding (epo) |
192 |
| 257/E21.158 |
Manufacture of electrode on semiconductor body using process other than by epitaxial growth, diffusion of impurities, alloying of impurity materials, or radiation bombardment (epo) |
360 |
| 257/E21.21 |
Comprising charge trapping insulator (epo) |
317 |
| 257/E21.208 |
Comprising layer having ferroelectric properties (epo) |
172 |
| 257/E21.159 |
Deposition of conductive or insulating material for electrode conducting electric current (epo) |
123 |
| 257/E21.16 |
From a gas or vapor, e.g., condensation (epo) |
38 |
| 257/E21.161 |
Of conductive layer (epo) |
30 |
| 257/E21.172 |
On semiconductor body comprising group iii-v compound (epo) |
251 |
| 257/E21.173 |
Deposition of schottky electrode (epo) |
134 |
| 257/E21.162 |
On semiconductor body comprising group iv element (epo) |
307 |
| 257/E21.17 |
By chemical means, e.g., cvd, lpcvd, pecvd, laser cvd (epo) |
924 |
| 257/E21.171 |
Selective deposition (epo) |
371 |
| 257/E21.169 |
By physical means, e.g., sputtering, evaporation (epo) |
357 |
| 257/E21.166 |
Conductive layer comprising semiconducting material (epo) |
661 |
| 257/E21.167 |
Making of side-wall contact (epo) |
16 |
| 257/E21.165 |
Conductive layer comprising silicide (epo) |
1247 |
| 257/E21.168 |
Conductive layer comprising transition metal, e.g., ti, w, mo (epo) |
467 |
| 257/E21.163 |
Deposition of schottky electrode (epo) |
106 |
| 257/E21.164 |
O layer comprising silicide (epo) |
8 |
| 257/E21.174 |
From a liquid, e.g., electrolytic deposition (epo) |
459 |
| 257/E21.175 |
Using an external electrical current, i.e., electro-deposition (epo) |
497 |
| 257/E21.209 |
Making electrode structure comprising conductor-insulator-conuctor-insulator-semiconductor, e.g., gate stack for non-volatile memory (epo) |
1300 |
| 257/E21.19 |
Making electrode structure comprising conductor-insulator-semiconductor, e.g., mis gate (epo) |
170 |
| 257/E21.207 |
Insulator formed on nonelemental silicon semiconductor body, e.g., ge, sige, sigec (epo) |
51 |
| 257/E21.191 |
Insulator formed on silicon semiconductor body (epo) |
48 |
| 257/E21.195 |
Characterized by conductor (epo) |
21 |
| 257/E21.205 |
Characterized by sectional shape, e.g., t-shape, inverted t, spacer (epo) |
431 |
| 257/E21.203 |
Conductor layer next to insulator is metallic silicide (me si) (epo) |
106 |
| 257/E21.204 |
Conductor layer next to insulator is non-mesi composite or compound, e.g., tin (epo) |
142 |
| 257/E21.201 |
Conductor layer next to insulator is si or ge or c and their non-si alloys (epo) |
125 |
| 257/E21.202 |
Conductor layer next to the insulator is single metal, e.g., ta, w, mo, al (epo) |
153 |
| 257/E21.197 |
Final conductor layer next to insulator being silicon e.g., polysilicon, with or without impurities (epo) |
261 |
| 257/E21.198 |
Conductor comprising at least another nonsilicon conductive layer (epo) |
86 |
| 257/E21.199 |
Conductor comprising silicide layer formed by silicidation reaction of silicon with metal layer (epo) |
504 |
| 257/E21.2 |
Conductor comprising metal or metallic silicide formed by deposition e.g., sputter deposition, i.e., without silicidation reaction (epo) |
507 |
| 257/E21.196 |
Final conductor next to insulator having lateral composition or doping variation, or being formed laterally by more than one deposition step (epo) |
114 |
| 257/E21.206 |
Lithography, isolation, or planarization-related aspects of making conductor-insulator-semiconductor structure, e.g., sub-lithography lengths; to solve problems arising at crossing with side of device isolation (epo) |
484 |
| 257/E21.192 |
Characterized by insulator (epo) |
90 |
| 257/E21.193 |
On single crystalline silicon (epo) |
1051 |
| 257/E21.194 |
Characterized by treatment after formation of definitive gate conductor (epo) |
256 |
| 257/E21.176 |
Manufacture or post-treatment of electrode having a capacitive structure, i.e., gate structure for field-effect device (epo) |
44 |
| 257/E21.188 |
Heterojunction gate structure (epo) |
3 |
| 257/E21.189 |
For charge-coupled device (epo) |
32 |
| 257/E21.177 |
Mos-gate structure (epo) |
73 |
| 257/E21.179 |
Floating or plural gate structure (epo) |
287 |
| 257/E21.183 |
For charge-coupled device (epo) |
2 |
| 257/E21.18 |
Gate structure with charge-trapping insulator (epo) |
77 |
| 257/E21.178 |
Joint-gate structure (epo) |
5 |
| 257/E21.182 |
On semiconductor body comprising group iv element excluding non-elemental si, e.g., ge, c, diamond, silicon compound or compound, such as sic or sige (epo) |
68 |
| 257/E21.181 |
On semiconductor body not comprising group iv element, e.g., group iii-v compound (epo) |
3 |
| 257/E21.184 |
Pn-homojunction gate structure (epo) |
2 |
| 257/E21.185 |
For charge-coupled device (epo) |
19 |
| 257/E21.186 |
Schottky gate structure (epo) |
10 |
| 257/E21.187 |
For charge-coupled device (epo) |
2 |
| 257/E21.35 |
Multi-step process for manufacture of device of bipolar type, e.g., diodes, transistors, thyristors, resistors, capacitors) (epo) |
39 |
| 257/E21.351 |
Device comprising one or two electrodes, e.g., diode, resistor or capacitor with pn or schottky junctions (epo) |
48 |
| 257/E21.365 |
Active layer is group iii-v compound (epo) |
14 |
| 257/E21.366 |
Diode (epo) |
31 |
| 257/E21.368 |
Schottky diode (epo) |
46 |
| 257/E21.367 |
With an heterojunction, e.g., resonant tunneling diodes (rtd) (epo) |
11 |
| 257/E21.364 |
Capacitor with pn - or schottky junction, e.g., varactor (epo) |
46 |
| 257/E21.352 |
Diode (epo) |
159 |
| 257/E21.355 |
Break-down diode, e.g., zener diode, avalanche diode (epo) |
18 |
| 257/E21.357 |
Avalanche diode (epo) |
18 |
| 257/E21.356 |
Zener diode (epo) |
54 |
| 257/E21.362 |
Gat ed-diode structure, e.g., sith, fcth, fcd (epo) |
33 |
| 257/E21.361 |
Multi-layer diode, e.g., pnpn or npnp diode (epo) |
33 |
| 257/E21.36 |
Planar diode (epo) |
15 |
| 257/E21.358 |
Rectifier diode (epo) |
107 |
| 257/E21.359 |
Schottky diode (epo) |
111 |
| 257/E21.354 |
Transit time diode, e.g., impatt, trapatt diode (epo) |
1 |
| 257/E21.353 |
Tunnel diode (epo) |
19 |
| 257/E21.363 |
Resistor with pn junction (epo) |
42 |
| 257/E21.369 |
Device comprising three or more electrodes (epo) |
4 |
| 257/E21.388 |
Thyristor (epo) |
70 |
| 257/E21.393 |
Active layer is group iii-v compound (epo) |
6 |
| 257/E21.392 |
Bi-directional thyristor (epo) |
6 |
| 257/E21.389 |
Lateral or planar thyristor (epo) |
17 |
| 257/E21.39 |
Structurally associated with other devices (epo) |
9 |
| 257/E21.391 |
Other device being a controlling device of the field-effect-type (epo) |
29 |
| 257/E21.37 |
Transistor (epo) |
64 |
| 257/E21.386 |
Active layer, e.g., base, is group iii-v compound (epo) |
8 |
| 257/E21.387 |
Heterojunction transistor (epo) |
344 |
| 257/E21.372 |
Bipolar thin film transistor (epo) |
141 |
| 257/E21.382 |
Field-effect controlled bipolar-type transi stor, e.g., insulated gate bipolar transistor (igbt) (epo) |
79 |
| 257/E21.383 |
Vertical insulated gate bipolar transistor (epo) |
173 |
| 257/E21.385 |
With recess formed by etching in source/emitter contact region (epo) |
35 |
| 257/E21.384 |
With recessed gate (epo) |
197 |
| 257/E21.371 |
Heterojunction transistor (epo) |
391 |
| 257/E21.373 |
Lateral transistor (epo) |
83 |
| 257/E21.374 |
Schottky transistor (epo) |
8 |
| 257/E21.375 |
Silicon vertical transistor (epo) |
628 |
| 257/E21.378 |
Inverse transistor (epo) |
8 |
| 257/E21.377 |
Mesa-planar transistor (epo) |
16 |
| 257/E21.376 |
Planar transistor (epo) |
4 |
| 257/E21.38 |
Where main current goes through whole of silicon substrate, e.g., power bipolar transistor (epo) |
40 |
| 257/E21.381 |
With a multi- emitter, e.g., interdigitated, multicellular, distributed (epo) |
50 |
| 257/E21.379 |
With single crystalline emitter, collector or base including extrinsic, link or graft base formed on th e silicon substrate, e.g., by epitaxy, recrystallization, after insulating device isolation (epo) |
236 |
| 257/E21.394 |
Multi-step process for the manufacture of unipolar device (epo) |
11 |
| 257/E21.398 |
Active layer is group iii-v compound (epo) |
12 |
| 257/E21.399 |
Transistor-like structure, e.g., hot electron transistor (het), metal base transistor (mbt), resonant tunneling hot electron transistor (rhet), resonant tunneling transistor (rtt), bulk barrier transistor (bbt), planar doped barrier transistor (pdbt), charge injection transistor (chint) (epo) |
17 |
| 257/E21.456 |
Charge transfer device (epo) |
26 |
| 257/E21.457 |
With insulated gate (epo) |
140 |
| 257/E21.458 |
With schottky gate (epo) |
17 |
| 257/E21.4 |
Field-effect transistor (epo) |
84 |
| 257/E21.405 |
Active layer is group iii-v compound, e.g., iii-v velocity modulation transistor (vmt), nerfet (epo) |
16 |
| 257/E21.406 |
Using static field induced region, e.g., sit, pbt (epo) |
24 |
| 257/E21.407 |
With an heterojunction interface channel or gate, e.g., hfet, higfet, si sfet, hjfet, hemt (epo) |
398 |
| 257/E21.408 |
With one or zero or quasi-one or quasi-zero dimensional channel, e.g., in plane gate transistor (ipg), single electron transistor (set), striped channel transistor, coulomb blockade device (epo) |
53 |
| 257/E21.401 |
Using static field induced region, e.g., sit, pbt (epo) |
58 |
| 257/E21.402 |
Permeable base transistor (pbt) (epo) |
19 |
| 257/E21.409 |
With an insulated gate (epo) |
495 |
| 257/E21.441 |
Active layer is group iii-v compound (epo) |
69 |
| 257/E21.436 |
Gate comprising layer with ferroelectric properties (epo) |
39 |
| 257/E21.424 |
Lateral single gate silicon transistor (epo) |
68 |
| 257/E21.433 |
Where the source and drain or source and drain extensions are self-aligned to sides of gate (epo) |
648 |
| 257/E21.434 |
With initial gate mask or masking layer complementary to prospective gate location, e.g., with dummy source and drain contacts (epo) |
299 |
| 257/E21.428 |
With a recessed gate, e.g., lateral u-mos (epo) |
145 |
| 257/E21.43 |
Recessing gate by adding semiconductor material at source (s) or drain (d) location, e.g., transist or with elevated single crystal s and d (epo) |
352 |
| 257/E21.429 |
Using etching to form recess at gate location (epo) |
295 |
| 257/E21.427 |
With asymmetry in channel direction, e.g., high-voltage lateral transistor with channel containing layer, e.g., p-base (epo) |
590 |
| 257/E21.426 |
With single crystalline channel formed on the silicon substrate after insulating device isolation (epo) |
133 |
| 257/E21.432 |
With source and drain contacts formation strictly before final gate formation, e.g., contact first technology (epo) |
112 |
| 257/E21.431 |
With source and drain recessed by etching or recessed and refi lled (epo) |
345 |
| 257/E21.425 |
With source or drain region formed by schottky barrier or conductor-insulator-semiconductor structure (epo) |
57 |
| 257/E21.435 |
Lateral single gate single channel silicon transistor with both lightly doped source and drain extensions and source and drain self-aligned to sides of gate, e.g., ldd mosfet, ddd mosfet (epo) |
211 |
| 257/E21.411 |
Thin film unipolar transistor (epo) |
353 |
| 257/E21.412 |
Amorphous silicon or polysilicon transistor (epo) |
276 |
| 257/E21.414 |
Lateral single gate single channel transistor with inverted structure, i.e., channel layer is formed after gate (epo) |
1085 |
| 257/E21.413 |
Lateral single gate single channel transistor with noninverted structure, i.e., channel layer is formed before gate (epo) |
1590 |
| 257/E21.415 |
Monocrystalline silicon transistor on insulating substrate, e.g., quartz substrate (epo) |
888 |
| 257/E21.416 |
On sapphire substrate, e.g., silicon on sapphire (sos) transistor (epo) |
37 |
| 257/E21.444 |
Using dummy gate wherein at least part of final gate is self-aligned to dummy gate (epo) |
729 |
| 257/E21.443 |
Using self-aligned punch through stopper or threshold implant under gate region (epo) |
247 |
| 257/E21.44 |
Using self-aligned selective metal deposition simultaneously on gate and on source or drain (epo) |
52 |
| 257/E21.438 |
Using self-aligned silicidation, i.e., salicide (epo) |
1133 |
| 257/E21.439 |
Providing different silicide thicknesses on gate and on source or drain (epo) |
110 |
| 257/E21.41 |
Vertical transistor (epo) |
427 |
| 257/E21.417 |
With channel containing layer, e.g., p-base, fo rmed in or on drain region, e.g., dmos transistor (epo) |
211 |
| 257/E21.418 |
Vertical power dmos transistor (epo) |
390 |
| 257/E21.42 |
With recess formed by etching in source/base contact region (epo) |
115 |
| 257/E21.419 |
With recessed gate (epo) |
536 |
| 257/E21.423 |
With charge trapping gate insulator, e.g., mnos transistor (epo) |
347 |
| 257/E21.422 |
With floating gate (epo) |
1156 |
| 257/E21.442 |
With gate at side of channel (epo) |
296 |
| 257/E21.437 |
With lightly doped drain selectively formed at side of gate (epo) |
217 |
| 257/E21.421 |
With multiple gate, one gate having mos structure and others having same or a different structure, i.e., non mos, e.g., jfet gate (epo) |
197 |
| 257/E21.403 |
With heterojunction interface channel or gate, e.g., hfet, higfet, sisfet, hjfet, hemt (epo) |
168 |
| 257/E21.404 |
With one or zero or quasi-one or quasi-zero dimensional charge carrier gas channel, e.g., quantum wire fet; single electron trans istor (set); striped channel transistor; coulomb blockade device (epo) |
110 |
| 257/E21.445 |
With pn junction or heterojunction gate (epo) |
32 |
| 257/E21.449 |
Active layer is group iii-v compound (epo) |
70 |
| 257/E21.448 |
With heterojunction gate (epo) |
46 |
| 257/E21.446 |
With pn homojunction gate (epo) |
45 |
| 257/E21.447 |
Vertical transistor, e.g., tecnetrons (epo) |
38 |
| 257/E21.45 |
With schottky gate, e.g., mesfet (epo) |
67 |
| 257/E21.451 |
Active layer being group iii-v compound (epo) |
36 |
| 257/E21.452 |
Lateral single-gate transistors (epo) |
238 |
| 257/E21.455 |
Lateral transistor with two or more independen t gates (epo) |
22 |
| 257/E21.453 |
Process wherein final gate is made after formation of source and drain regions in active layer, e.g., dummy-gate process (epo) |
138 |
| 257/E21.454 |
Process wherein final gate is made before formation, e.g., activation anneal, of source and drain regions in active layer (epo) |
129 |
| 257/E21.396 |
Metal-insulator-semiconductor capacitor, e.g., trench capacitor (epo) |
457 |
| 257/E21.397 |
Comprising pn junction, e.g., hybrid capacitor (epo) |
7 |
| 257/E21.395 |
Transistor-like structure, e.g., hot electron transistor (het); metal base transistor (mbt); resonant tunneling het (rhet); resonant tunneling transistor (rtt ); bulk barrier transistor (bbt); planar doped barrier transistor (pdbt); charge injection transistor (chint); ballistic transistor (epo) |
30 |
| 257/E21.089 |
Multistep processes for manufacture of device using quantum interference effect, e.g., electrostatic aharonov-bohm effect (epo) |
20 |
| 257/E21.328 |
Radiation treatment (epo) |
93 |
| 257/E21.33 |
To produce chemical element by transmutation (epo) |
31 |
| 257/E21.329 |
Using natural radiation, e.g., alpha , beta or gamma radiation (epo) |
38 |
| 257/E21.331 |
With high-energy radiation (epo) |
90 |
| 257/E21.332 |
For etching, e.g., sputter etching (epo) |
66 |
| 257/E21.333 |
For heating, e.g., electron beam heating (epo) |
83 |
| 257/E21.334 |
Producing ions for implantation (epo) |
168 |
| 257/E21.345 |
Characterized by the angle between the ion beam and the crystal planes or the main crystal surface (epo) |
667 |
| 257/E21.344 |
In diamond (epo) |
1 |
| 257/E21.34 |
In group iii-v compound (epo) |
73 |
| 257/E21.343 |
Characterized by the implantation of both electrically active and inactive species in the same semiconductor region to be doped (epo) |
33 |
| 257/E21.341 |
Of electrically active species (epo) |
65 |
| 257/E21.342 |
Through-implantation (epo) |
20 |
| 257/E21.335 |
In group iv semiconductor (epo) |
630 |
| 257/E21.336 |
Of electrically active species (epo) |
486 |
| 257/E21.337 |
Through-implantation (epo) |
434 |
| 257/E21.339 |
Of electrically inactive species in silicon to make buried insulating layer (epo) |
122 |
| 257/E21.338 |
Recoil-implantation (epo) |
22 |
| 257/E21.346 |
Using mask (epo) |
467 |
| 257/E21.347 |
Using electromagnetic radiation, e.g., laser radiation (epo) |
652 |
| 257/E21.349 |
Using incoherent radiation (epo) |
83 |
| 257/E21.348 |
Using x-ray laser (epo) |
6 |
| 257/E21.211 |
Treatment of semiconductor body using process other than deposition of semiconductor material on a substrate, diffusion or alloying of impurity material, or radiation treatment (epo) |
268 |
| 257/E21.327 |
Application of electric current or field, e.g., for electroforming (epo) |
66 |
| 257/E21.212 |
Hydrogenation or deuterization, e.g., using atomic hydrogen or deuterium from a plasma (epo) |
199 |
| 257/E21.213 |
Of group iii-v compound (epo) |
12 |
| 257/E21.323 |
Of diamond body (epo) |
5 |
| 257/E21.325 |
For the formation of pn junction without ad dition of impurities (epo) |
10 |
| 257/E21.326 |
Of group iii-v compound (epo) |
124 |
| 257/E21.324 |
Thermal treatment for modifying the properties of semiconductor body, e.g., annealing, sintering (epo) |
523 |
| 257/E21.214 |
To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) |
395 |
| 257/E21.215 |
Chemical or electrical treatment, e.g., electrolytic etching (epo) |
216 |
| 257/E21.224 |
Chemical cleaning (epo) |
110 |
| 257/E21.225 |
Cleaning diamond or graphite (epo) |
4 |
| 257/E21.229 |
Combining dry and wet cleaning steps (epo) |
286 |
| 257/E21.226 |
Dry cleaning (epo) |
375 |
| 257/E21.227 |
With gaseous hydrogen fluoride (hf) (epo) |
114 |
| 257/E21.228 |
Wet cleaning only (epo) |
870 |
| 257/E21.219 |
Chemical etching (epo) |
399 |
| 257/E21.223 |
Anisotropic liquid etching (epo) |
242 |
| 257/E21.22 |
Etching of group iii-v compound (epo) |
150 |
| 257/E21.221 |
Anisotropic liquid etching (epo) |
68 |
| 257/E21.222 |
Vapor phase etching (epo) |
155 |
| 257/E21.216 |
Electrolytic etching (epo) |
121 |
| 257/E21.217 |
Of group iii-v compound (epo) |
55 |
| 257/E21.218 |
Plasma etching; reactive-ion etching (epo) |
802 |
| 257/E21.231 |
Using mask (epo) |
225 |
| 257/E21.232 |
Characterized by their composition, e.g., multilayer masks, materials (epo) |
310 |
| 257/E21.233 |
Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (epo) |
116 |
| 257/E21.235 |
Characterized by process involved to create mask, e.g., lift-off mask, sidewall, or to modify the mask, e.g., pre-treatment, post-treatment (epo) |
255 |
| 257/E21.234 |
Characterized by their behavior during process, e.g., soluble mask, redeposited mask (epo) |
88 |
| 257/E21.236 |
Process specially adapted to improve resolution of mask (epo) |
54 |
| 257/E21.23 |
With simultaneous mechanical treatment, e.g., chemical-mechanical polishing (epo) |
500 |
| 257/E21.294 |
Deposition/post-treatment of noninsulating, e.g., conductive - or resistive - layers on insulating layers (epo) |
96 |
| 257/E21.299 |
Deposition of conductive or semi-conductive organic layer (epo) |
43 |
| 257/E21.295 |
Deposition of layer comprising metal, e.g., metal, alloys, metal compounds (epo) |
446 |
| 257/E21.296 |
Of metal-silicide layer (epo) |
157 |
| 257/E21.297 |
Deposition of semiconductive layer, e.g., poly - or amorphous silicon layer (epo) |
116 |
| 257/E21.298 |
Deposition of superconductive layer (epo) |
8 |
| 257/E21.3 |
Post treatment (epo) |
297 |
| 257/E21.315 |
Doping layer (epo) |
37 |
| 257/E21.316 |
Doping polycrystalline or amorphous silicon layer (epo) |
226 |
| 257/E21.302 |
Nitriding of silicon-containing layer (epo) |
111 |
| 257/E21.301 |
Oxidation of silicon-containing layer (epo) |
214 |
| 257/E21.305 |
Physical or chemical etching of layer, e.g., to produce a patterned layer from pre-deposited extensive layer (epo) |
73 |
| 257/E21.308 |
By chemical means only (epo) |
13 |
| 257/E21.309 |
By liquid etching only (epo) |
522 |
| 257/E21.31 |
By vapor etching only (epo) |
124 |
| 257/E21.311 |
Using plasma (epo) |
868 |
| 257/E21.312 |
Of silicon-containing layer (epo) |
642 |
| 257/E21.313 |
Pre- or post-treatment, e.g., anti-corrosion process (epo) |
427 |
| 257/E21.306 |
By physical means only (epo) |
57 |
| 257/E21.307 |
Of silicon-containing layer (epo) |
19 |
| 257/E21.314 |
Using mask (epo) |
772 |
| 257/E21.303 |
Planarization (epo) |
125 |
| 257/E21.304 |
By chemical mechanical polishing (cmp) (epo) |
1217 |
| 257/E21.237 |
Mechanical treatment, e.g., grinding, polishing, cutting (epo) |
442 |
| 257/E21.238 |
Making grooves, e.g., cutting (epo) |
256 |
| 257/E21.239 |
Using abrasion, e.g., sand-blasting (epo) |
32 |
| 257/E21.24 |
To form insulating layer thereon, e.g., for masking or by using photolithographic technique (epo) |
133 |
| 257/E21.266 |
Inorganic layer (epo) |
309 |
| 257/E21.27 |
Carbon layer, e.g., diamond-like layer (epo) |
134 |
| 257/E21.267 |
Composed of alternated layers or of mixtures of nitrides and oxides or of oxynitrides, e.g., formation of oxynitride by oxidation of nitride layer (epo) |
356 |
| 257/E21.271 |
Composed of oxide or glassy oxide or oxide based glass (epo) |
407 |
| 257/E21.274 |
Deposition from gas or vapor (epo) |
631 |
| 257/E21.28 |
Deposition of aluminum oxide (epo) |
95 |
| 257/E21.281 |
On a silicon body (epo) |
96 |
| 257/E21.275 |
Deposition of boron or phosphorus doped silicon oxide, e.g., bsg, psg, bpsg (epo) |
334 |
| 257/E21.277 |
Deposition of carbon doped silicon oxide, e.g., sioc (epo) |
267 |
| 257/E21.276 |
Deposition of halogen doped silicon oxide, e.g., fluorine doped silicon oxide (epo) |
242 |
| 257/E21.278 |
Deposition of silicon oxide (epo) |
278 |
| 257/E21.279 |
On silicon body (epo) |
947 |
| 257/E21.273 |
Deposition of porous oxide or porous glassy oxide or oxide based porous glass (epo) |
358 |
| 257/E21.282 |
Formed by oxidation (epo) |
45 |
| 257/E21.29 |
Of metallic layer, e.g., al deposited on body, e.g., formation of multi-layer insulating structures (epo) |
222 |
| 257/E21.291 |
By anodic oxidation (epo) |
78 |
| 257/E21.283 |
Of semiconductor material, e.g., by oxidation of semiconductor body itself (epo) |
93 |
| 257/E21.284 |
By thermal oxidation (epo) |
69 |
| 257/E21.285 |
Of silicon (epo) |
487 |
| 257/E21.286 |
Of group iii-v compound (epo) |
39 |
| 257/E21.287 |
By anodic oxidation (epo) |
11 |
| 257/E21.288 |
Of silicon (epo) |
45 |
| 257/E21.289 |
Of group iii-v compound (epo) |
25 |
| 257/E21.272 |
With perovskite structure (epo) |
613 |
| 257/E21.292 |
Inorganic layer composed of nitride (epo) |
154 |
| 257/E21.293 |
Of silicon nitride (epo) |
827 |
| 257/E21.268 |
Of silicon (epo) |
531 |
| 257/E21.269 |
Formed by deposition from a gas or vapor (epo) |
345 |
| 257/E21.259 |
Organic layers, e.g., photoresist (epo) |
630 |
| 257/E21.265 |
By langmuir-blodgett technique (epo) |
25 |
| 257/E21.26 |
Layer comprising organo-silicon compound (epo) |
223 |
| 257/E21.261 |
Layer comprising polysiloxane compound (epo) |
308 |
| 257/E21.262 |
Layer comprising hydrogen silsesquioxane (epo) |
133 |
| 257/E21.263 |
Layer comprising silazane compounds (epo) |
58 |
| 257/E21.264 |
Layers comprising fluoro hydrocarbon compounds, e.g., polytetrafluoroethylene (epo) |
150 |
| 257/E21.241 |
Post-treatment (epo) |
498 |
| 257/E21.247 |
Doping insulating layer (epo) |
68 |
| 257/E21.248 |
By ion implantation (epo) |
181 |
| 257/E21.249 |
Etching insulating layer by chemical or physical means (epo) |
105 |
| 257/E21.25 |
Etching inorganic layer (epo) |
80 |
| 257/E21.251 |
By chemical means (epo) |
549 |
| 257/E21.252 |
By dry-etching (epo) |
1845 |
| 257/E21.253 |
Of layers not containing si, e.g., pzt, al 2 o 3 (epo) |
131 |
| 257/E21.254 |
Etching organic layer (epo) |
30 |
| 257/E21.255 |
By chemical means (epo) |
250 |
| 257/E21.256 |
By dry-etching (epo) |
669 |
| 257/E21.257 |
Using mask (epo) |
844 |
| 257/E21.242 |
Of organic layer (epo) |
193 |
| 257/E21.243 |
Planarization of insulating layer (epo) |
252 |
| 257/E21.244 |
Involving dielectric removal step (epo) |
937 |
| 257/E21.245 |
Removal by chemical etching, e.g., dry etching (epo) |
294 |
| 257/E21.246 |
Removal by selective chemical etching, e.g., selective dry etching through mask (epo) |
106 |
| 257/E21.258 |
Using masks (epo) |
449 |
| 257/E21.317 |
To modify their internal properties, e.g., to produce internal imperfections (epo) |
41 |
| 257/E21.322 |
Of group iii-v compound, e.g., to make them semi-insulating (epo) |
17 |
| 257/E21.318 |
Of silicon body, e.g., for gettering (epo) |
326 |
| 257/E21.32 |
Of silicon on insulator (soi) (epo) |
375 |
| 257/E21.321 |
Thermally inducing defects using oxygen present in silicon body for intrinsic gettering (epo) |
207 |
| 257/E21.319 |
Using cavities formed by inert gas ion implantation, e.g., hydrogen, noble gas (epo) |
66 |
| 257/E21.068 |
Device having semiconductor body comprising selenium (se) or tellurium (te) (epo) |
93 |
| 257/E21.075 |
Application of electrode to exposed surface of se or te after se or te has been applied to foundation plate (epo) |
10 |
| 257/E21.07 |
Preliminary treatment of se or te, its application to substrate, or the subsequent treatment of combination (epo) |
10 |
| 257/E21.071 |
Application of se or te to substrate or foundation plate (epo) |
7 |
| 257/E21.072 |
Conversion of se or te to conductive state (epo) |
3 |
| 257/E21.074 |
Provision of discrete insulating layer, i.e., specified barrier layer material (epo) |
1 |
| 257/E21.073 |
Treatment of surface of se or te layer after having been made conductive (epo) |
3 |
| 257/E21.069 |
Preparation of substrate or foundation plate for se or te semiconductor (epo) |
9 |
| 257/E21.076 |
Treatment of complete device, e.g., by electroforming to form barrier (epo) |
4 |
| 257/E21.077 |
Heat treating (epo) |
88 |
| 257/E21.054 |
Device having semiconductor body comprising silicon carbide (sic) (epo) |
183 |
| 257/E21.06 |
Changing shape of semiconductor body, e.g., forming recesses (epo) |
35 |
| 257/E21.061 |
Making electrode (epo) |
17 |
| 257/E21.063 |
Conductor-insulator-semiconductor electrode, e.g., mis contact (epo) |
48 |
| 257/E21.062 |
Ohmic electrode (epo) |
65 |
| 257/E21.064 |
Schottky electrode (epo) |
35 |
| 257/E21.056 |
Making n- or p- doped regions or layers, e.g., using diffusion (epo) |
39 |
| 257/E21.057 |
Using ion implantation (epo) |
68 |
| 257/E21.059 |
Angled implantation (epo) |
21 |
| 257/E21.058 |
Using masks (epo) |
96 |
| 257/E21.065 |
Multistep processes for manufacture of device whose active layer, e.g., base, channel, comprises silicon carbide (epo) |
39 |
| 257/E21.066 |
Device controllable only by electric current supplied or the electric potential applied to electrode which does not carry current to be rectified, amplified, or switched, e.g., three-terminal device (epo) |
218 |
| 257/E21.067 |
Device controllable only by variation of electric current supplied or electric potential applied to one or more of the electrodes carrying current to be rectified, amplified, oscillated, or switched, e.g., two-terminal device (epo) |
65 |
| 257/E21.055 |
Passivating silicon carbide surface (epo) |
36 |
| 257/E21.459 |
Device having semiconductor body other than carbon, si, ge, sic, se, te, cu 2 o, cui, and group iii-v compounds with or without impurities, e.g., doping materials (epo) |
39 |
| 257/E21.47 |
Alloying of impurity material, e.g., dopant, electrode material, with semiconductor body (epo) |
20 |
| 257/E21.461 |
Deposition of semiconductor material on substrate, e.g., epitaxial growth (epo) |
159 |
| 257/E21.464 |
Using liquid deposition (epo) |
71 |
| 257/E21.465 |
From molten solution of compound or alloy, e.g., liquid phase epitaxy (epo) |
33 |
| 257/E21.462 |
Using physical deposition, e.g., vacuum deposition, sputtering (epo) |
114 |
| 257/E21.463 |
Using reduction or decomposition of gaseous compound yielding solid condensate, i.e., chemical deposition (epo) |
99 |
| 257/E21.466 |
Diffusion of impurity material, e.g., dopant, electrode material, into or out of semiconductor body, or between semiconductor regions (epo) |
38 |
| 257/E21.467 |
Using diffusion into or out of solid from or into gaseous phase (epo) |
20 |
| 257/E21.469 |
Using diffusion into or out of solid from or into liquid phase, e.g., alloy diffusion process (epo) |
11 |
| 257/E21.468 |
Using diffusion into or out of solid from or into solid phase, e.g., doped oxide layer (epo) |
22 |
| 257/E21.476 |
Manufacture of electrodes on semiconductor bodies using processes or apparatus other than epitaxial growth, e.g., coating, diffusion, or alloying, or radiation treatment (epo) |
171 |
| 257/E21.477 |
Deposition of conductive or insulating materials for electrode (epo) |
64 |
| 257/E21.478 |
From gas or vapor, e.g., condensation (epo) |
54 |
| 257/E21.479 |
From liquid, e.g., electrolytic deposition (epo) |
43 |
| 257/E21.481 |
Including application of mechanical vibration, e.g., ultrasonic vibration (epo) |
5 |
| 257/E21.48 |
Involving application of pressure, e.g., thermo compression bonding (epo) |
26 |
| 257/E21.46 |
Multistep process (epo) |
40 |
| 257/E21.471 |
Radiation treatment (epo) |
20 |
| 257/E21.472 |
With high-energy radiation (epo) |
7 |
| 257/E21.473 |
Producing ion implantation (epo) |
44 |
| 257/E21.474 |
Using mask (epo) |
7 |
| 257/E21.475 |
Using electromagnetic radiation, e.g., laser radiation (epo) |
85 |
| 257/E21.482 |
Treatment of semiconductor body using process other than electromagnetic radiation (epo) |
25 |
| 257/E21.498 |
Application of electric current or fields, e.g., for electroforming (epo) |
19 |
| 257/E21.497 |
Thermal treatment for modifying property of semiconductor body, e.g., annealing, sintering (epo) |
75 |
| 257/E21.483 |
To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (epo) |
54 |
| 257/E21.485 |
Chemical or electrical treatment, e.g., electrolytic etching (epo) |
101 |
| 257/E21.486 |
Using mask (epo) |
32 |
| 257/E21.495 |
Deposition of noninsulating, e.g., conductive -, resistive -, layer on insulating layer (epo) |
121 |
| 257/E21.496 |
Post treatment of layer (epo) |
17 |
| 257/E21.484 |
Mechanical treatment, e.g., grinding, ultrasonic treatment (epo) |
14 |
| 257/E21.487 |
To form insulating layer thereon, e.g., for masking or by using photolithographic techniques; post treatment of these layers (epo) |
46 |
| 257/E21.493 |
Inorganic layer (epo) |
40 |
| 257/E21.494 |
Composed of oxide or glassy oxide or oxide-based glass (epo) |
41 |
| 257/E21.492 |
Organic layer, e.g., photoresist (epo) |
33 |
| 257/E21.489 |
Post treatment of insulating layer (epo) |
22 |
| 257/E21.491 |
Doping layer (epo) |
0 |
| 257/E21.49 |
Etching layer (epo) |
24 |
| 257/E21.488 |
Using mask (epo) |
11 |
| 257/E21.52 |
Devices having no potential-jump barrier or surface barrier (epo) |
30 |
| 257/E21.023 |
Making mask on semicond uctor body for further photolithographic processing (epo) |
149 |
| 257/E21.033 |
Comprising inorganic layer (epo) |
499 |
| 257/E21.035 |
Characterized by their composition, e.g., multilayer masks, materials (epo) |
311 |
| 257/E21.036 |
Characterized by their size, orientation, disposition, behavior, shape, in horizontal or vertical plane (epo) |
109 |
| 257/E21.038 |
Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (epo) |
452 |
| 257/E21.037 |
Characterized by their behavior during process, e.g., soluble mask, re-deposited mask (epo) |
39 |
| 257/E21.039 |
Process specially adapted to improve the resolution of the mask (epo) |
187 |
| 257/E21.034 |
For lift-off process (epo) |
62 |
| 257/E21.024 |
Comprising organic layer (epo) |
191 |
| 257/E21.026 |
Characterized by treatment of photoresist layer (epo) |
151 |
| 257/E21.03 |
Electro-lithographic process (epo) |
71 |
| 257/E21.032 |
Ion lithographic process (epo) |
23 |
| 257/E21.027 |
Photolith ographic process (epo) |
410 |
| 257/E21.029 |
Using anti-reflective coating (epo) |
463 |
| 257/E21.028 |
Using laser (epo) |
64 |
| 257/E21.031 |
X-ray lithographic process (epo) |
19 |
| 257/E21.025 |
For lift-off process (epo) |
181 |
| 257/E21.003 |
Manufacture of two-terminal component for integrated circuit (epo) |
34 |
| 257/E21.008 |
Of capacitor (epo) |
1356 |
| 257/E21.009 |
Dielectric having perovskite structure (epo) |
1532 |
| 257/E21.01 |
Dielectric comprising two or more layers, e.g., buffer layers, seed layers, gradient layers (epo) |
471 |
| 257/E21.011 |
Formation of electrode (epo) |
1101 |
| 257/E21.012 |
With increased surface area, e.g., by roughening, texturing (epo) |
350 |
| 257/E21.014 |
Having cylindrical, crown, or fin-type shape (epo) |
215 |
| 257/E21.015 |
Having horizontal extensions (epo) |
55 |
| 257/E21.016 |
Made by depositing layers, e.g., alternatingly conductive and insulating layers (epo) |
214 |
| 257/E21.017 |
Made by patterning layers, e.g., etching conductive layers (epo) |
82 |
| 257/E21.021 |
Having multilayers, e.g., comprising barrier layer and metal layer (epo) |
617 |
| 257/E21.018 |
Having vertical extensions (epo) |
333 |
| 257/E21.019 |
Made by depositing layers, e.g., alternatingly conductive and insulating layers (epo) |
808 |
| 257/E21.02 |
Made by patterning layers, e.g., etching conductive layers (epo) |
214 |
| 257/E21.013 |
With rough surface, e.g., using hemispherical grains (epo) |
794 |
| 257/E21.022 |
Of inductor (epo) |
348 |
| 257/E21.004 |
Of resistor (epo) |
655 |
| 257/E21.005 |
Active material comprising carbon, e.g., diamond or diamond-like carbon (epo) |
31 |
| 257/E21.007 |
Active material comprising organic conducting material, e.g., conducting polymer (epo) |
85 |
| 257/E21.006 |
Active material comprising refractory, transition, or noble metal or metal compound, e.g., alloy, silicide, oxide, nitride (epo) |
330 |
| 257/E21.521 |
Testing or measuring during manufacture or treatment or reliability measurement, i.e., testing of parts followed by no processing which modifies parts as such (epo) |
279 |
| 257/E21.529 |
Measuring as part of manufacturing process (epo) |
119 |
| 257/E21.531 |
For electrical parameters, e.g., resistance, deep-levels, cv, diffusions by electrical means (epo) |
251 |
| 257/E21.53 |
For structural parameters, e.g., thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (epo) |
769 |
| 257/E21.525 |
Procedures, i.e., sequence of activities consisting of plurality of measurement and correction, marking or sorting steps (epo) |
1079 |
| 257/E21.528 |
Acting in response to ongoing measurement without interruption of processing, e.g., endpoint detection, in-situ thickness measurement (epo) |
388 |
| 257/E21.526 |
Connection or disconnection of subentities or redundant parts of device in response to measurement, e.g., wafer scale, memory devices (epo) |
194 |
| 257/E21.527 |
Optical enhancement of defects or not directly visible states, e.g., selective electrolytic deposition, bubbles in liquids, light emission, color change (epo) |
128 |
| 257/E21.522 |
Structural arrangement (epo) |
75 |
| 257/E21.523 |
Additional lead-in metallization on device, e.g., additional pads or lands, lines in scribe line, sacrificed conductors, sacrificed frames (epo) |
78 |
| 257/E21.524 |
Circuit for characterizing or monitoring manufacturing process, e.g., whole test die, wafer filled with test structures, onboard devices incorporated on each die, process/product control monitors or pcm, devices in scribe-line/kerf, drop-in devices (epo) |
83 |
| 257/497 |
Punchthrough structure device (e.g., punchthrough transistor, camel barrier diode) |
82 |
| 257/498 |
Punchthrough region fully depleted at zero external applied bias voltage (e.g., camel barrier or planar doped barrier devices, or so-called "bipolar sit" devices) |
49 |
| 257/921 |
Radiation hardened semiconductor device |
40 |
| 257/107 |
Regenerative type switching device (e.g., scr, comfet, thyristor) |
272 |
| 257/119 |
Bidirectional rectifier with control electrode (gate) (e.g., triac) |
122 |
| 257/124 |
Combined with field effect transistor structure |
94 |
| 257/125 |
Controllable emitter shunting |
30 |
| 257/128 |
Having overlapping sections of different conductive polarity |
36 |
| 257/122 |
Lateral |
70 |
| 257/120 |
Six or more semiconductor layers of alternating conductivity types (e.g., npnpnpn structure) |
45 |
| 257/130 |
Switching speed enhancement means |
58 |
| 257/131 |
Recombination centers or deep level dopants |
45 |
| 257/121 |
With diode or transistor in reverse path |
86 |
| 257/129 |
With means to increase reverse breakdown voltage |
66 |
| 257/126 |
With means to separate a device into sections having different conductive polarity |
49 |
| 257/127 |
Guard ring or groove |
120 |
| 257/123 |
With trigger signal amplification (e.g., amplified gate) |
36 |
| 257/133 |
Combined with field effect transistor |
370 |
| 257/137 |
Having controllable emitter shunt |
97 |
| 257/138 |
Having gate turn off (gto) feature |
164 |
| 257/134 |
J-fet (junction field effect transistor) |
114 |
| 257/135 |
Vertical (i.e., where the source is located above the drain or vice versa) |
166 |
| 257/136 |
Enhancement mode (e.g., so-called sits) |
137 |
| 257/139 |
With extended latchup current level (e.g., comfet device) |
336 |
| 257/144 |
Cathode emitter or cathode electrode feature |
91 |
| 257/140 |
Combined with other solid-state active device in integrated structure |
134 |
| 257/143 |
Having anode shunt means |
48 |
| 257/142 |
Having impurity doping for gain reduction |
64 |
| 257/141 |
Lateral structure, i.e., current flow parallel to main device surface |
131 |
| 257/145 |
Low impedance channel contact extends below surface |
19 |
| 257/146 |
Combined with other solid-state active device in integrated structure |
250 |
| 257/108 |
Controlled by nonelectrical, nonoptical external signal (e.g., magnetic field, pressure, thermal) |
88 |
| 257/173 |
Device protection (e.g., from overvoltage) |
630 |
| 257/174 |
Rate of rise of current (e.g., di/dt) |
99 |
| 257/163 |
Emitter region feature |
104 |
| 257/164 |
Multi-emitter region (e.g., emitter geometry or emitter ballast resistor) |
89 |
| 257/165 |
Laterally symmetric regions |
38 |
| 257/166 |
Radially symmetric regions |
42 |
| 257/132 |
Five or more layer unidirectional structure |
60 |
| 257/167 |
Having at least four external electrodes |
90 |
| 257/109 |
Having only two terminals and no control electrode (gate), e.g., shockley diode |
138 |
| 257/110 |
More than four semiconductor layers of alternating conductivity types (e.g., pnpnpn structure, 5 layer bidirectional diacs, etc.) |
105 |
| 257/111 |
Triggered by v bo overvoltage means |
56 |
| 257/112 |
With highly-doped breakdown diode trigger |
43 |
| 257/162 |
Lateral structure |
164 |
| 257/147 |
With extended latchup current level (e.g., gate turn off "gto" device) |
195 |
| 257/152 |
Cathode emitter or cathode electrode feature |
133 |
| 257/153 |
Gate region or electrode feature |
145 |
| 257/149 |
Having anode shunt means |
83 |
| 257/148 |
Having impurity doping for gain reduction |
39 |
| 257/150 |
With specified housing or external terminal |
43 |
| 257/151 |
External gate terminal structure or composition |
36 |
| 257/177 |
With housing or external electrode |
122 |
| 257/180 |
Stud mount |
24 |
| 257/181 |
With large area flexible electrodes in press contact with opposite sides of active semiconductor chip and surrounded by an insulating element, (e.g., ring) |
85 |
| 257/182 |
With lead feedthrough means on side of housing |
54 |
| 257/178 |
With means to avoid stress between electrode and active device (e.g., thermal expansion matching of electrode to semiconductor) |
55 |
| 257/179 |
With malleable electrode (e.g., silver electrode layer) |
20 |
| 257/157 |
With integrated trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.) |
74 |
| 257/158 |
Three or more amplification stages |
24 |
| 257/159 |
Transistor as amplifier |
32 |
| 257/161 |
With a turn-off diode |
31 |
| 257/160 |
With distributed amplified current |
55 |
| 257/113 |
With light activation |
125 |
| 257/115 |
With electrical trigger signal amplification means (e.g., amplified gate, "pilot thyristor", etc.) |
99 |
| 257/118 |
With groove or thinned light sensitive portion |
78 |
| 257/116 |
With light conductor means (e.g., light fiber or light pipe) integral with device or device enclosure or package |
73 |
| 257/117 |
In groove or with thinned semiconductor portion |
62 |
| 257/114 |
With separate light detector integrated on chip with regenerative switching device |
51 |
| 257/175 |
With means to control triggering (e.g., gate electrode configuration, zener diode firing, dv/dt control, transient control by ferrite bead, etc.) |
153 |
| 257/176 |
Located in an emitter-gate region |
16 |
| 257/168 |
With means to increase breakdown voltage |
89 |
| 257/169 |
High resistivity base layer |
33 |
| 257/170 |
Surface feature (e.g., guard ring, groove, mesa, etc.) |
206 |
| 257/171 |
Edge feature (e.g., beveled edge) |
69 |
| 257/172 |
With means to lower "on" voltage drop |
38 |
| 257/154 |
With resistive region connecting separate sections of device |
170 |
| 257/155 |
With switching speed enhancement means (e.g., schottky contact) |
172 |
| 257/156 |
Having deep level dopants or recombination centers |
109 |
| 257/414 |
Responsive to non-electrical signal (e.g., chemical, stress, light, or magnetic field sensors) |
992 |
| 257/428 |
Electromagnetic or particle radiation |
289 |
| 257/429 |
Charged or elementary particles |
122 |
| 257/430 |
With active region having effective impurity concentration less than 10 12 atoms/cm 3 |
25 |
| 257/431 |
Light |
1229 |
| 257/438 |
Avalanche junction |
238 |
| 257/439 |
Containing dopant adapted for photoionization |
100 |
| 257/466 |
External physical configuration of semiconductor (e.g., mesas, grooves) |
455 |
| 257/461 |
Light responsive pn junction |
919 |
| 257/465 |
Geometric configuration of junction (e.g., fingers) |
261 |
| 257/462 |
Phototransistor |
365 |
| 257/463 |
With particular doping concentration |
240 |
| 257/464 |
With particular layer thickness (e.g., layer less than light absorption depth) |
243 |
| 257/443 |
Matrix or array (e.g., single line arrays) |
800 |
| 257/444 |
Light sensor elements overlie active switching elements in integrated circuit (e.g., where the sensor elements are deposited on an integrated circuit) |
366 |
| 257/445 |
With antiblooming means |
90 |
| 257/447 |
With backside illumination (e.g., having a thinned central area or a non-absorbing substrate) |
175 |
| 257/448 |
With particular electrode configuration |
550 |
| 257/446 |
With specific isolation means in integrated circuit |
322 |
| 257/441 |
Narrow band gap semiconductor ( |
101 |
| 257/442 |
Ii-vi compound semiconductor (e.g., hgcdte) |
217 |
| 257/458 |
Pin detector, including combinations with non-light responsive active devices |
764 |
| 257/449 |
Schottky barrier (e.g., a transparent schottky metallic layer or a schottky barrier containing at least one of indium or tin (e.g., sno 2 , indium tin oxide)) |
208 |
| 257/451 |
Responsive to light having lower energy (i.e., longer wavelength) than forbidden band gap energy of semiconductor (e.g., by excitation of carriers from metal into semiconductor) |
69 |
| 257/450 |
With doping profile to adjust barrier height |
39 |
| 257/452 |
With edge protection, e.g., doped guard ring or mesa structure |
137 |
| 257/457 |
With particular contact geometry (e.g., ring or grid) |
156 |
| 257/453 |
With specified schottky metallic layer |
92 |
| 257/454 |
Schottky metallic layer is a silicide |
35 |
| 257/455 |
Silicide of platinum group metal |
53 |
| 257/456 |
Silicide of refractory metal |
31 |
| 257/460 |
With backside illumination (e.g., with a thinned central area or non-absorbing substrate) |
165 |
| 257/440 |
With different sensor portions responsive to different wavelengths (e.g., color imager) |
512 |
| 257/433 |
With housing or encapsulation |
1038 |
| 257/434 |
With window means |
564 |
| 257/436 |
With means for increasing light absorption (e.g., redirection of unabsorbed light) |
568 |
| 257/437 |
Antireflection coating |
343 |
| 257/432 |
With optical element |
1613 |
| 257/435 |
With optical shield or mask means |
627 |
| 257/459 |
With particular contact geometry (e.g., ring or grid, or bonding pad arrangement) |
510 |
| 257/421 |
Magnetic field |
969 |
| 257/423 |
Bipolar transistor magnetic field sensor (e.g., lateral bipolar transistor) |
102 |
| 257/426 |
Differential output (e.g., with offset adjustment means or with means to reduce temperature sensitivity) |
65 |
| 257/425 |
Magnetic field detector using compound semiconductor material (e.g., gaas, insb, etc.) |
111 |
| 257/427 |
Magnetic field sensor in integrated circuit (e.g., in bipolar transistor integrated circuit) |
248 |
| 257/424 |
Sensor with region of high carrier recombination (e.g., magnetodiode with carriers deflected to recombination region by magnetic field) |
57 |
| 257/422 |
With magnetic field directing means (e.g., shield, pole piece, etc.) |
276 |
| 257/415 |
Physical deformation |
924 |
| 257/416 |
Acoustic wave |
297 |
| 257/420 |
Means to reduce sensitivity to physical deformation |
205 |
| 257/417 |
Strain sensors |
552 |
| 257/418 |
With means to concentrate stress |
282 |
| 257/419 |
With thinned central active portion of semiconductor surrounded by thick insensitive portion (e.g. diaphragm type strain gauge) |
565 |
| 257/467 |
Temperature |
421 |
| 257/470 |
Pn junction adapted as temperature sensor |
139 |
| 257/468 |
Semiconductor device operated at cryogenic temperature |
39 |
| 257/469 |
With means to reduce temperature sensitivity (e.g., reduction of temperature sensitivity of junction breakdown voltage by using a compensating element) |
108 |
| 257/471 |
Schottky barrier |
330 |
| 257/474 |
As active junction in bipolar transistor (e.g., schottky collector) |
82 |
| 257/481 |
Avalanche diode (e.g., so-called "zener" diode having breakdown voltage greater than 6 volts) |
118 |
| 257/482 |
Microwave transit time device (e.g., impatt diode) |
45 |
| 257/476 |
In integrated structure |
218 |
| 257/477 |
With bipolar transistor |
125 |
| 257/479 |
Connected across base-collector junction of transistor (e.g., baker clamp) |
55 |
| 257/478 |
Plural schottky barriers with different barrier heights |
43 |
| 257/480 |
In voltage variable capacitance diode |
59 |
| 257/485 |
Specified materials |
140 |
| 257/486 |
Layered (e.g., a diffusion barrier material layer or a silicide layer or a precious metal layer) |
202 |
| 257/472 |
To compound semiconductor |
218 |
| 257/473 |
With specified schottky metal |
151 |
| 257/475 |
With doping profile to adjust barrier height |
108 |
| 257/483 |
With means to prevent edge breakdown |
93 |
| 257/484 |
Guard ring |
222 |
| 257/E31.001 |
Semiconductor devices responsive or sensitive to electromagnetic radiation (e.g., infrared radiation, adapted for conversion of radiation into electrical energy or for control of electrical energy by such radiation processes, or apparatus peculiar to manufacture or treatment of such devices, or of parts thereof) (epo) |
180 |
| 257/E31.052 |
Adapted to control current flow through device (e.g., photoresistor) (epo) |
68 |
| 257/E31.092 |
Device being sensitive to very short wavelength (e.g., x-ray, gamma-ray) (epo) |
41 |
| 257/E31.093 |
Device sensitive to infrared, visible, or ultraviolet radiation (epo) |
227 |
| 257/E31.094 |
Comprising amorphous semiconductor (epo) |
136 |
| 257/E31.053 |
For device having potential or surface barrier (e.g., phototransistor) (epo) |
66 |
| 257/E31.054 |
Device sensitive to infrared, visible, or ultraviolet radiation (epo) |
151 |
| 257/E31.07 |
Characterized by at least three potential barriers (epo) |
20 |
| 257/E31.071 |
Photothyristor (epo) |
115 |
| 257/E31.072 |
Static induction type (i.e., sit device) (epo) |
9 |
| 257/E31.055 |
Characterized by only one potential or surface barrier (epo) |
23 |
| 257/E31.061 |
Pin potential barrier (epo) |
240 |
| 257/E31.062 |
Device comprising group iv amorphous material (epo) |
77 |
| 257/E31.067 |
Pn heterojunction potential barrier (epo) |
121 |
| 257/E31.057 |
Pn homojunction potential barrier (epo) |
157 |
| 257/E31.058 |
Device comprising active layer formed only by group ii-vi compound (e.g., hgcdte ir photodiode) (epo) |
140 |
| 257/E31.059 |
Device comprising active layer formed only by group iii-v compound (epo) |
87 |
| 257/E31.06 |
Device comprising active layer formed only by group iv compound (epo) |
15 |
| 257/E31.056 |
Potential barrier being of point contact type (epo) |
3 |
| 257/E31.063 |
Potential barrier working in avalanche mode (e.g., avalanche photodiode) (epo) |
138 |
| 257/E31.064 |
Heterostructure (e.g., surface absorption or multiplication (sam) layer) (epo) |
131 |
| 257/E31.065 |
Schottky potential barrier (epo) |
143 |
| 257/E31.066 |
Metal-semiconductor-metal (msm) schottky barrier (epo) |
48 |
| 257/E31.068 |
Characterized by two potential or surface barriers (epo) |
47 |
| 257/E31.069 |
Bipolar phototransistor (epo) |
117 |
| 257/E31.073 |
Field-effect type (e.g., junction field-effect phototransistor) (epo) |
51 |
| 257/E31.083 |
Conductor-insulator-semiconductor type (epo) |
63 |
| 257/E31.084 |
Diode or charge-coupled device (ccd) (epo) |
64 |
| 257/E31.085 |
Metal-insulator-semiconductor field-effect transistor (epo) |
78 |
| 257/E31.08 |
With pn heterojunction gate (epo) |
4 |
| 257/E31.081 |
Charge-coupled device (ccd) (epo) |
9 |
| 257/E31.082 |
Field-effect phototransistor (epo) |
31 |
| 257/E31.077 |
With pn homojunction gate (epo) |
6 |
| 257/E31.078 |
Charge-coupled device (ccd) (epo) |
15 |
| 257/E31.079 |
Field-effect phototransistor (epo) |
64 |
| 257/E31.074 |
With schottky gate (epo) |
7 |
| 257/E31.075 |
Charge-coupled device (ccd) (epo) |
14 |
| 257/E31.076 |
Photo mesfet (epo) |
31 |
| 257/E31.086 |
Device sensitive to very short wavelength (e.g., x-ray, gamma-ray, or corpuscular radiation) (epo) |
93 |
| 257/E31.087 |
Bulk-effect radiation detector (e.g., ge-li compensated pin gamma-ray detector) (epo) |
16 |
| 257/E31.088 |
Li-compensated pin gamma-ray detector (epo) |
5 |
| 257/E31.091 |
Field-effect type (e.g., mis-type detector) (epo) |
24 |
| 257/E31.089 |
With surface barrier or shallow pn junction (e.g., surface barrier alpha-particle detector) (epo) |
14 |
| 257/E31.09 |
With shallow pn junction (epo) |
19 |
| 257/E31.002 |
Characterized by semiconductor body (epo) |
28 |
| 257/E31.04 |
Characterized by semiconductor body crystalline structure or plane (epo) |
58 |
| 257/E31.047 |
Including amorphous semiconductor (epo) |
53 |
| 257/E31.048 |
Including only group iv element (epo) |
82 |
| 257/E31.05 |
Having light-induced characteristic variation (e.g., staebler-wronski effect) (epo) |
9 |
| 257/E31.049 |
Including group iv compound (e.g., sige, sic) (epo) |
49 |
| 257/E31.051 |
Including other nonmonocrystalline material (e.g., semiconductor particles embedded in insulating material) (epo) |
27 |
| 257/E31.043 |
Including polycrystalline semiconductor (epo) |
47 |
| 257/E31.044 |
Including only group iv element (epo) |
71 |
| 257/E31.046 |
Including microcrystalline group iv compound (e.g., c-sige, c-sic) (epo) |
14 |
| 257/E31.045 |
Including microcrystalline silicon ( c-si) (epo) |
28 |
| 257/E31.041 |
Including thin film deposited on metallic or insulating substrate (epo) |
108 |
| 257/E31.042 |
Including only group iv element (epo) |
256 |
| 257/E31.003 |
Characterized by semiconductor body material (epo) |
36 |
| 257/E31.004 |
Inorganic materials (epo) |
18 |
| 257/E31.005 |
In different semiconductor regions (e.g., cu 2 x/cdx heterojunction and x being group vi element) (epo) |
16 |
| 257/E31.006 |
Comprising only cu 2 x/cdx heterojunction and x being group vi element (epo) |
56 |
| 257/E31.007 |
Comprising only heterojunction including group i-iii-vi compound (e.g., cds/cuinse 2 heterojunction) (epo) |
82 |
| 257/E31.026 |
Including, apart from doping material or other impurity, only compound other than group ii-vi, iii-v, and iv compound (epo) |
74 |
| 257/E31.031 |
Characterized by doping material (epo) |
3 |
| 257/E31.027 |
Comprising only group i-iii-vi chalcopyrite compound (e.g., cuinse 2 , cugase 2 , cuingase 2 ) (epo) |
104 |
| 257/E31.028 |
Characterized by doping material (epo) |
12 |
| 257/E31.029 |
Comprising only group iv-vi or ii-iv-vi chalcogenide compound (e.g., pbsnte) (epo) |
188 |
| 257/E31.03 |
Characterized by doping material (epo) |
6 |
| 257/E31.015 |
Including, apart from doping material or other impurity, only group ii-vi compound (e.g., cds, zns, hgcdte) (epo) |
31 |
| 257/E31.016 |
For device having potential or surface barrier (epo) |
12 |
| 257/E31.017 |
Characterized by doping material (epo) |
33 |
| 257/E31.018 |
Including ternary compound (e.g., hgcdte) (epo) |
79 |
| 257/E31.019 |
Including, apart from doping material or other impurity, only group iii-v compound (epo) |
41 |
| 257/E31.02 |
For device having potential or surface barrier (epo) |
42 |
| 257/E31.021 |
Characterized by doping material gaalas, ingaas, ingaasp (epo) |
57 |
| 257/E31.022 |
Including ternary or quaternary compound (epo) |
97 |
| 257/E31.023 |
Including, apart from doping material or other impurity, only group iv compound (e.g., sic) (epo) |
22 |
| 257/E31.025 |
Characterized by doping material (epo) |
1 |
| 257/E31.024 |
For device having potential or surface barrier (epo) |
16 |
| 257/E31.011 |
Including, apart from doping material or other impurity, only group iv element (epo) |
28 |
| 257/E31.014 |
Characterized by doping material (epo) |
61 |
| 257/E31.013 |
Comprising porous silicon as part of active layer (epo) |
10 |
| 257/E31.012 |
For device having potential or surface barrier (epo) |
27 |
| 257/E31.008 |
Selenium or tellurium (epo) |
39 |
| 257/E31.01 |
Characterized by doping material (epo) |
8 |
| 257/E31.009 |
For device having potential or surface barrier (epo) |
8 |
| 257/E31.032 |
Characterized by semiconductor body shape, relative size, or disposition of semiconductor regions (epo) |
231 |
| 257/E31.037 |
For device having potential or surface barrier (epo) |
13 |
| 257/E31.038 |
Shape of body (epo) |
215 |
| 257/E31.039 |
Shape of potential or surface barrier (epo) |
152 |
| 257/E31.033 |
Multiple quantum well structure (epo) |
257 |
| 257/E31.034 |
Characterized by amorphous semiconductor layer (epo) |
24 |
| 257/E31.036 |
Doping superlattice (e.g., nipi superlattice) (epo) |
13 |
| 257/E31.035 |
Including, apart from doping material or other impurity, only group iv element or compound (e.g., si-sige superlattice) (epo) |
46 |
| 257/E31.11 |
Detail of nonsemiconductor component of radiation-sensitive semiconductor device (epo) |
88 |
| 257/E31.131 |
Arrangement for temperature regulation (e.g., cooling, heating, or ventilating) (epo) |
133 |
| 257/E31.113 |
Circuit arrangement of general character for device (epo) |
38 |
| 257/E31.114 |
For device having potential or surface barrier (epo) |
29 |
| 257/E31.116 |
Device working in avalanche mode (epo) |
29 |
| 257/E31.115 |
Position-sensitive and lateral-effect photodetector (e.g., quadrant photodiode) (epo) |
110 |
| 257/E31.119 |
Coatings (epo) |
81 |
| 257/E31.12 |
For device having potential or surface barrier (epo) |
165 |
| 257/E31.121 |
For filtering or shielding light (e.g., multicolor filter for photodetector) (epo) |
301 |
| 257/E31.123 |
For interference filter (e.g., multilayer dielectric filter) (epo) |
53 |
| 257/E31.122 |
For shielding light (e.g., light-blocking layer, cold shield for infrared detector) (epo) |
224 |
| 257/E31.124 |
Electrode (epo) |
158 |
| 257/E31.125 |
For device having potential or surface barrier (epo) |
130 |
| 257/E31.126 |
Transparent conductive layer (e.g., transparent conductive oxide (tco), indium tin oxide (ito) layer) (epo) |
263 |
| 257/E31.117 |
Encapsulation (epo) |
317 |
| 257/E31.118 |
For device having potential or surface barrier (epo) |
227 |
| 257/E31.111 |
Input/output circuit of device (epo) |
67 |
| 257/E31.112 |
For device having potential or surface barrier (epo) |
52 |
| 257/E31.127 |
Optical element associated with device (epo) |
522 |
| 257/E31.129 |
Comprising luminescent member (e.g., fluorescent sheet) (epo) |
74 |
| 257/E31.128 |
Device having potential or surface barrier (epo) |
346 |
| 257/E31.13 |
Texturized surface (epo) |
243 |
| 257/E31.095 |
Structurally associated with electric light source (e.g., electroluminescent light source) (epo) |
119 |
| 257/E31.096 |
Hybrid device containing photosensitive and electroluminescent components within one single body (epo) |
111 |
| 257/E31.097 |
Light source controlled by radiation-sensitive semiconductor device (e.g., image converter, image amplifier, image storage device) (epo) |
50 |
| 257/E31.1 |
Device with potential or surface barrier (epo) |
5 |
| 257/E31.098 |
Device without potential or surface barrier (epo) |
8 |
| 257/E31.099 |
Light source being semiconductor device with potential or surface barrier (e.g., light-emitting diode) (epo) |
43 |
| 257/E31.101 |
Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (epo) |
13 |
| 257/E31.102 |
Formed in or on common substrate (epo) |
44 |
| 257/E31.103 |
Radiation-sensitive semiconductor device controlled by light source (epo) |
48 |
| 257/E31.107 |
Radiation-sensitive semiconductor device with potential or surface barrier (epo) |
5 |
| 257/E31.104 |
Radiation-sensitive semiconductor device without potential or surface barrier (e.g., photoresistor) (epo) |
8 |
| 257/E31.105 |
Light source being semiconductor device having potential or surface barrier (e.g., light-emitting diode) (epo) |
44 |
| 257/E31.106 |
Optical potentiometer (epo) |
8 |
| 257/E31.108 |
Semiconductor light source and radiation-sensitive semiconductor device both having potential or surface barrier (epo) |
168 |
| 257/E31.109 |
Formed in or on common substrate (epo) |
87 |
| 257/43 |
Semiconductor is an oxide of a metal (e.g., cuo, zno) or copper sulfide |
583 |
| 257/42 |
Semiconductor is selenium or tellurium in elemental form |
137 |
| 257/E43.001 |
Semiconductor or solid-state devices using galvano-magnetic or similar magnetic effects, processes or apparatus peculiar to manufacture or treatment of such devices, or of parts thereof (epo) |
42 |
| 257/E43.002 |
Hall-effect devices (epo) |
34 |
| 257/E43.003 |
Semiconductor hall-effect devices (epo) |
77 |
| 257/E43.004 |
Magnetic-field-controlled resistors (epo) |
335 |
| 257/E43.006 |
Processes or apparatus peculiar to manufacture or treatment of these devices or of parts thereof (epo) |
157 |
| 257/E43.007 |
For hall-effect devices (epo) |
16 |
| 257/E43.005 |
Selection of materials (epo) |
174 |
| 257/E29.001 |
Semiconductors devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) |
119 |
| 257/E29.002 |
Electrical characteristics due to properties of entire semiconductor body rather than just surface region (epo) |
146 |
| 257/E29.105 |
Characterized by combinations of two or more features of crystalline structure, shape, materials, physical imperfections, and concentration/distribution of impurities in bulk material (epo) |
28 |
| 257/E29.109 |
Characterized by concentration or distribution of impurities in bulk material (epo) |
158 |
| 257/E29.11 |
Planar doping (e.g., atomic-plane doping, delta-doping) (epo) |
67 |
| 257/E29.068 |
Characterized by materials of semiconductor body (epo) |
82 |
| 257/E29.082 |
Only element from fourth group of periodic system in uncombined form (epo) |
155 |
| 257/E29.083 |
Amorphous materials (epo) |
48 |
| 257/E29.086 |
Further characterized by doping material (epo) |
210 |
| 257/E29.084 |
Including two or more of elements from fourth group of periodic system (epo) |
79 |
| 257/E29.085 |
In different semiconductor regions (e.g., heterojunctions) (epo) |
130 |
| 257/E29.094 |
Only group ii-vi compounds (epo) |
44 |
| 257/E29.095 |
Amorphous materials (epo) |
7 |
| 257/E29.099 |
Cdx compounds being one element of sixth group of periodic system (epo) |
9 |
| 257/E29.098 |
Further characterized by doping material (epo) |
17 |
| 257/E29.096 |
Including two or more compounds (e.g., alloys) (epo) |
32 |
| 257/E29.097 |
In different semiconductor regions (e.g., heterojunctions) (epo) |
18 |
| 257/E29.089 |
Only group iii-v compounds (epo) |
139 |
| 257/E29.092 |
Amorphous materials (epo) |
13 |
| 257/E29.093 |
Further characterized by doping material (epo) |
88 |
| 257/E29.09 |
Including two or more compounds (e.g., alloys) (epo) |
63 |
| 257/E29.091 |
In different semiconductor regions (e.g., heterojunctions) (epo) |
244 |
| 257/E29.087 |
Selenium or tellurium only (epo) |
11 |
| 257/E29.088 |
Amorphous materials (epo) |
3 |
| 257/E29.1 |
Semiconductor materials other than group iv, selenium, tellurium, or group iii-v compounds (epo) |
61 |
| 257/E29.101 |
Amorphous materials (epo) |
24 |
| 257/E29.102 |
Group i-vi or i-vii compounds (e.g., cu 2 o, cui) (epo) |
9 |
| 257/E29.103 |
Pb compounds (e.g., pbo) (epo) |
15 |
| 257/E29.104 |
Si compounds (e.g., sic) (epo) |
485 |
| 257/E29.069 |
Single quantum well structures (epo) |
56 |
| 257/E29.071 |
Quantum box or quantum dot structures (epo) |
185 |
| 257/E29.07 |
Quantum wire structures (epo) |
121 |
| 257/E29.072 |
Structures with periodic or quasi-periodic potential variation, (e.g., multiple quantum wells, superlattices) (epo) |
52 |
| 257/E29.075 |
Compositional structures (epo) |
31 |
| 257/E29.076 |
With layered structures with quantum effects in vertical direction (epo) |
35 |
| 257/E29.077 |
Comprising at least one long-range structurally disordered material (e.g., one-dimensional vertical amorphous superlattices) (epo) |
16 |
| 257/E29.078 |
Comprising only semiconductor materials (epo) |
199 |
| 257/E29.073 |
Doping structures (e.g., doping superlattices, nipi-superlattices) (epo) |
25 |
| 257/E29.074 |
Structures without potential periodicity in direction perpendicular to major surface of substrate (e.g., lateral superlattice) (epo) |
33 |
| 257/E29.079 |
Two or more elements from two or more groups of periodic table of elements (e.g., alloys) (epo) |
32 |
| 257/E29.08 |
Amorphous materials (epo) |
23 |
| 257/E29.081 |
In different semiconductor regions (e.g., heterojunctions) (epo) |
190 |
| 257/E29.106 |
Characterized by physical imperfections; having polished or roughened surface (epo) |
11 |
| 257/E29.108 |
Imperfections on surface of semiconductor body (epo) |
34 |
| 257/E29.107 |
Imperfections within semiconductor body (epo) |
152 |
| 257/E29.005 |
Characterized by specified shape or size of pn junction or by specified impurity concentration gradient within the device (epo) |
71 |
| 257/E29.006 |
Characterized by particular design considerations to control electrical field effect within device (epo) |
38 |
| 257/E29.018 |
Comprising internal isolation within devices or components (epo) |
58 |
| 257/E29.02 |
Isolation by dielectric regions (epo) |
340 |
| 257/E29.021 |
For source or drain region of field-effect device (epo) |
333 |
| 257/E29.019 |
Isolation by pn junctions (epo) |
55 |
| 257/E29.007 |
For controlling surface leakage or electric field concentration (epo) |
28 |
| 257/E29.008 |
For controlling breakdown voltage of reverse biased devices (epo) |
37 |
| 257/E29.012 |
By doping profile or shape or arrangement of the pn junction, or with supplementary regions (e.g., guard ring, ldd, drift region) (epo) |
322 |
| 257/E29.014 |
With breakdown supporting region for localizing breakdown or limiting its voltage (epo) |
58 |
| 257/E29.013 |
With supplementary region doped oppositely to or in rectifying contact with semiconductor containing or contacting region(e.g., guard rings with pn or schottky junction) (epo) |
412 |
| 257/E29.009 |
With field relief electrode (field plate) (epo) |
353 |
| 257/E29.01 |
With at least two field relief electrodes used in combination and not electrically interconnected (epo) |
157 |
| 257/E29.011 |
With one or more field relief electrode comprising resistance material (e.g., semi insulating material, lightly doped poly-silicon) (epo) |
94 |
| 257/E29.015 |
With insulating layer characterized by dielectric or electrostatic property (e.g., including fixed charge or semi-insulating surface layer) (epo) |
125 |
| 257/E29.016 |
For preventing surface leakage due to surface inversion layer (e.g., channel stop) (epo) |
170 |
| 257/E29.017 |
With field relief electrodes acting on insulator potential or insulator charges (epo) |
116 |
| 257/E29.022 |
Characterized by shape of semiconductor body (epo) |
323 |
| 257/E29.023 |
Adapted for altering junction breakdown voltage by shape of semiconductor body (epo) |
109 |
| 257/E29.024 |
Characterized by shape, relative sizes or dispositions of semiconductor regions or junctions between regions (epo) |
68 |
| 257/E29.025 |
Characterized by particular shape of junction between semiconductor regions (epo) |
40 |
| 257/E29.026 |
Surface layout of device (epo) |
290 |
| 257/E29.027 |
Surface layout of mos gated device (e.g., dmosfet or igbt) (epo) |
507 |
| 257/E29.028 |
With a nonplanar gate structure (epo) |
210 |
| 257/E29.029 |
With semiconductor regions connected to electrode carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (epo) |
18 |
| 257/E29.036 |
Anode or cathode regions of thyristors or gated bipolar-mode devices (epo) |
17 |
| 257/E29.037 |
Anode regions of thyristors or gated bipolar-mode devices (epo) |
175 |
| 257/E29.038 |
Cathode regions of thyristors (epo) |
72 |
| 257/E29.034 |
Collector regions of bipolar transistors (epo) |
259 |
| 257/E29.035 |
Pedestal collectors (epo) |
29 |
| 257/E29.03 |
Emitter regions of bipolar transistors (epo) |
235 |
| 257/E29.032 |
Noninterconnected multiemitter structures (epo) |
40 |
| 257/E29.033 |
Of heterojunction bipolar transistors (epo) |
95 |
| 257/E29.031 |
Of lateral transistors (epo) |
23 |
| 257/E29.039 |
Source or drain regions of field-effect devices (epo) |
63 |
| 257/E29.04 |
Of field-effect transistors with insulated gate (epo) |
1036 |
| 257/E29.041 |
Of field-effect transistors with schottky gate (epo) |
122 |
| 257/E29.042 |
Tunneling barrier (epo) |
65 |
| 257/E29.043 |
With semiconductor regions connected to electrode not carrying current to be rectified, amplified or switched and such electrode being part of semiconductor device which comprises three or more electrodes (epo) |
33 |
| 257/E29.044 |
Base region of bipolar transistors (epo) |
396 |
| 257/E29.045 |
Of lateral transistors (epo) |
39 |
| 257/E29.046 |
Base regions of thyristors (epo) |
22 |
| 257/E29.047 |
Anode base regions of thyristors (epo) |
40 |
| 257/E29.048 |
Cathode base regions of thyristors (epo) |
84 |
| 257/E29.066 |
Body region structure of igfet's with channel containing layer (dmosfet or igbt) (epo) |
530 |
| 257/E29.067 |
With nonplanar gate structure (epo) |
202 |
| 257/E29.049 |
Channel region of field-effect devices (epo) |
30 |
| 257/E29.058 |
Of charge coupled devices (epo) |
116 |
| 257/E29.05 |
Of field-effect transistors (epo) |
183 |
| 257/E29.051 |
With insulated gate (epo) |
204 |
| 257/E29.052 |
Nonplanar channel (epo) |
71 |
| 257/E29.053 |
With nonuniform doping structure in channel region surface (epo) |
66 |
| 257/E29.054 |
Doping structure being parallel to channel length (epo) |
294 |
| 257/E29.056 |
With variation of composition of channel (epo) |
249 |
| 257/E29.055 |
With vertical doping variation (epo) |
132 |
| 257/E29.057 |
With pn junction gate |
37 |
| 257/E29.059 |
Gate region of field-effect devices with pn junction gate (epo) |
116 |
| 257/E29.06 |
Substrate region of field-effect devices (epo) |
16 |
| 257/E29.065 |
Of charge coupled devices (epo) |
21 |
| 257/E29.061 |
Of field-effect transistors (epo) |
96 |
| 257/E29.062 |
With insulated gate (epo) |
111 |
| 257/E29.064 |
Characterized by contact structure of substrate region (epo) |
216 |
| 257/E29.063 |
With inactive supplementary region (e.g., for preventing punch-through, improving capacity effect or leakage current) (epo) |
492 |
| 257/E29.003 |
Characterized by their crystalline structure (e.g., polycrystalline, cubic) particular orientation of crystalline planes (epo) |
333 |
| 257/E29.004 |
With specified crystalline planes or axis (epo) |
301 |
| 257/E29.111 |
Electrodes (epo) |
41 |
| 257/E29.112 |
Characterized by their shape, relative sizes or dispositions (epo) |
115 |
| 257/E29.113 |
Carrying current to be rectified, amplified or switched (epo) |
59 |
| 257/E29.115 |
Cathode or anode electrodes for thyristors (epo) |
77 |
| 257/E29.114 |
Emitter or collector electrodes for bipolar transistors (epo) |
202 |
| 257/E29.116 |
Source or drain electrodes for field-effect devices (epo) |
180 |
| 257/E29.122 |
Characterized by relative position of source or drain electrode and gate electrode (epo) |
305 |
| 257/E29.119 |
For lateral devices where connection to source or drain region is done through at least one part of semiconductor substrate thickness (e.g., with connecting sink or with via-hole) (epo) |
119 |
| 257/E29.117 |
For thin film transistors with insulated gate (epo) |
432 |
| 257/E29.118 |
For vertical current flow (epo) |
236 |
| 257/E29.12 |
Layout configuration for lateral device source or drain region (e.g., cellular, interdigitated or ring structure or being curved or angular) (epo) |
148 |
| 257/E29.121 |
Source or drain electrode in groove (epo) |
181 |
| 257/E29.123 |
Not carrying current to be rectified, amplified, or switched (epo) |
19 |
| 257/E29.124 |
Base electrodes for bipolar transistors (epo) |
152 |
| 257/E29.125 |
Gate electrodes for thyristors (epo) |
69 |
| 257/E29.126 |
Gate stack for field-effect devices (epo) |
51 |
| 257/E29.138 |
For charge coupled devices (epo) |
129 |
| 257/E29.127 |
For field-effect transistors (epo) |
288 |
| 257/E29.128 |
With insulated gate (epo) |
96 |
| 257/E29.134 |
Characterized by configuration of gate electrode layer (epo) |
106 |
| 257/E29.135 |
Characterized by length or sectional shape (epo) |
433 |
| 257/E29.136 |
Characterized by surface lay-out (epo) |
323 |
| 257/E29.137 |
Characterized by configuration of gate stack of thin film fets (epo) |
473 |
| 257/E29.132 |
Characterized by insulating layer (epo) |
107 |
| 257/E29.133 |
Nonuniform insulating layer thickness (epo) |
497 |
| 257/E29.13 |
Gate electrodes for nonplanar mosfet (epo) |
308 |
| 257/E29.131 |
Having drain and source regions at different vertical level having channel composed only of vertical sidewall connecting drain and source layers (epo) |
292 |
| 257/E29.129 |
Gate electrodes for transistors with floating gate (epo) |
1109 |
| 257/E29.139 |
Of specified material (epo) |
42 |
| 257/E29.15 |
Electrodes for igfet (epo) |
63 |
| 257/E29.158 |
Elemental metal gate conductor material (e.g., w, mo) (epo) |
162 |
| 257/E29.159 |
Diverse conductors (epo) |
40 |
| 257/E29.151 |
For tft (epo) |
913 |
| 257/E29.16 |
Gate conductor material being compound or alloy material (e.g., organic material, tin, mosi 2 ) (epo) |
244 |
| 257/E29.161 |
Silicide (epo) |
135 |
| 257/E29.162 |
Insulating materials for igfet (epo) |
698 |
| 257/E29.165 |
Multiple layers (epo) |
709 |
| 257/E29.164 |
With at least one ferroelectric layer (epo) |
156 |
| 257/E29.154 |
Silicon gate conductor material (epo) |
173 |
| 257/E29.155 |
Multiple silicon layers |
189 |
| 257/E29.157 |
Including barrier layer between silicon and non-si electrode |
239 |
| 257/E29.156 |
Including silicide layer contacting silicon layer (epo) |
355 |
| 257/E29.152 |
With lateral structure (e.g., poly-silicon gate with lateral doping variation or with lateral composition variation or characterized by sidewalls being composed of conductive, resistivity) (epo) |
370 |
| 257/E29.14 |
For gate of heterojunction field-effect devices (epo) |
67 |
| 257/E29.143 |
Ohmic electrodes (epo) |
132 |
| 257/E29.144 |
On group iii-v material (epo) |
245 |
| 257/E29.145 |
On thin-film group iii-v material (epo) |
16 |
| 257/E29.146 |
On silicon (epo) |
494 |
| 257/E29.147 |
For thin-film silicon (epo) |
388 |
| 257/E29.141 |
Resistive materials for field-effect devices (epo) |
66 |
| 257/E29.148 |
Schottky barrier electrodes (epo) |
184 |
| 257/E29.149 |
On group iii-v material (epo) |
162 |
| 257/E29.142 |
Superconductor materials (epo) |
13 |
| 257/E29.166 |
Types of semiconductor device (epo) |
53 |
| 257/E29.169 |
Controllable by only signal applied to control electrode (e.g., base of bipolar transistor, gate of field-effect transistor) (epo) |
16 |
| 257/E29.171 |
Bipolar device (epo) |
20 |
| 257/E29.172 |
Double-base diode (epo) |
5 |
| 257/E29.211 |
Thyristor-type device (e.g., having four-zone regenerative action) (epo) |
151 |
| 257/E29.224 |
Asymmetrical thyristor (epo) |
14 |
| 257/E29.215 |
Bidirectional device (e.g., triac) (epo) |
113 |
| 257/E29.217 |
Combined structurally with at least one other device (epo) |
36 |
| 257/E29.218 |
Combined with capacitor or resistor (epo) |
37 |
| 257/E29.219 |
Combined with diode (epo) |
27 |
| 257/E29.22 |
Antiparallel diode (epo) |
37 |
| 257/E29.221 |
Combined with field-effect transistor (epo) |
40 |
| 257/E29.212 |
Gate-turn-off device (epo) |
160 |
| 257/E29.213 |
With turn off by field effect (epo) |
20 |
| 257/E29.214 |
Produced by insulated gate structure (epo) |
211 |
| 257/E29.223 |
Having amplifying gate structure (e.g., darlington configuration) (epo) |
68 |
| 257/E29.222 |
Having built-in localized breakdown/breakover region (epo) |
32 |
| 257/E29.225 |
Lateral thyristor (epo) |
124 |
| 257/E29.216 |
With turn on by field effect (epo) |
165 |
| 257/E29.173 |
Transistor-type device (i.e., able to continuously respond to applied control signal) |
47 |
| 257/E29.174 |
Bipolar junction transistor |
130 |
| 257/E29.18 |
Avalanche transistors (epo) |
11 |
| 257/E29.182 |
Bipolar thin-film transistors (epo) |
155 |
| 257/E29.176 |
Device being resistive element (e.g., ballasting resistor) (epo) |
82 |
| 257/E29.188 |
Hetero-junction transistor (epo) |
72 |
| 257/E29.189 |
Vertical transistors (epo) |
446 |
| 257/E29.193 |
Comprising lattice mismatched active layers (e.g., sige strained layer transistors) (epo) |
348 |
| 257/E29.191 |
Having emitter comprising one or more nonmonocrystalline elements of group iv (e.g., amorphous silicon) alloys comprising group iv elements (epo) |
41 |
| 257/E29.19 |
Having two-dimensional base (e.g., modulation-doped base, inversion layer base, delta-doped base) (epo) |
26 |
| 257/E29.192 |
Resonant tunneling transistors (epo) |
54 |
| 257/E29.187 |
Lateral transistor (epo) |
264 |
| 257/E29.177 |
Point contact transistors (epo) |
3 |
| 257/E29.178 |
Schottky transistors (epo) |
6 |
| 257/E29.175 |
Structurally associated with other devices (epo) |
73 |
| 257/E29.181 |
Transistors with hook collector (i.e., collector having two layers of opposite conductivity type (e.g., scr)) (epo) |
30 |
| 257/E29.179 |
Tunnel transistors (epo) |
20 |
| 257/E29.183 |
Vertical transistor (epo) |
248 |
| 257/E29.184 |
Having emitter-base and base-collector junctions in same plane (epo) |
264 |
| 257/E29.185 |
Having emitter-base junction and base-collector junction on different surfaces (e.g., mesa planar transistor) (epo) |
119 |
| 257/E29.186 |
Inverse vertical transistor (epo) |
28 |
| 257/E29.194 |
Controlled by field effect (e.g., bipolar static induction transistor (bsit)) (epo) |
83 |
| 257/E29.195 |
Gated diode structure (epo) |
97 |
| 257/E29.196 |
With pn junction gate (e.g., field-controlled thyristor (fcth), static induction thyristor (sith)) (epo) |
127 |
| 257/E29.197 |
Insulated gate bipolar mode transistor (e.g., igbt; igt; comfet) (epo) |
220 |
| 257/E29.202 |
Thin-film device (epo) |
126 |
| 257/E29.198 |
Transistor with vertical current flow (epo) |
469 |
| 257/E29.199 |
With both emitter and collector contacts in same substrate side (epo) |
51 |
| 257/E29.2 |
With nonplanar surface (e.g., with nonplanar gate or with trench or recess or pillar in surface of emitter, base, or collector region for improving current density or short-circuiting emitter and base regions) (epo) |
89 |
| 257/E29.201 |
And gate structure lying on slanted or vertical surface or formed in groove (e.g., trench gate igbt) (epo) |
409 |
| 257/E29.17 |
Memory effect devices (epo) |
129 |
| 257/E29.226 |
Unipolar device (epo) |
39 |
| 257/E29.227 |
Charge transfer device (epo) |
15 |
| 257/E29.228 |
Charge-coupled device (epo) |
29 |
| 257/E29.229 |
With field effect produced by insulated gate (epo) |
44 |
| 257/E29.233 |
Buried channel ccd (epo) |
65 |
| 257/E29.236 |
Four-phase ccd (epo) |
21 |
| 257/E29.235 |
Three-phase ccd (epo) |
14 |
| 257/E29.234 |
Two-phase ccd (epo) |
61 |
| 257/E29.23 |
Input structure (epo) |
94 |
| 257/E29.231 |
Output structure (epo) |
141 |
| 257/E29.232 |
Structure for improving output signal (epo) |
23 |
| 257/E29.237 |
Surface channel ccd (epo) |
50 |
| 257/E29.24 |
Four-phase ccd (epo) |
23 |
| 257/E29.239 |
Three-phase ccd (epo) |
23 |
| 257/E29.238 |
Two-phase ccd (epo) |
52 |
| 257/E29.242 |
Field-effect transistor (epo) |
184 |
| 257/E29.243 |
Using static field induced region (e.g., sit, pbt) (epo) |
199 |
| 257/E29.244 |
Velocity modulations transistor (i.e., vmt) (epo) |
11 |
| 257/E29.254 |
With delta-doped channel (epo) |
33 |
| 257/E29.255 |
With field effect produced by insulated gate (epo) |
938 |
| 257/E29.263 |
Comprising gate-to-body connection (i.e., bulk dynamic threshold voltage mosfet) (epo) |
41 |
| 257/E29.272 |
Gate comprising ferroelectric layer (epo) |
179 |
| 257/E29.273 |
Thin-film transistor (epo) |
281 |
| 257/E29.295 |
Characterized by insulating substrate or support (epo) |
318 |
| 257/E29.299 |
Characterized by property or structure of channel or contact thereto (epo) |
760 |
| 257/E29.296 |
Comprising group iii-v or ii-vi compound, or of se, te, or oxide semiconductor (epo) |
172 |
| 257/E29.297 |
Comprising group iv non-si semiconductor materials or alloys (e.g., ge, sin alloy, sic alloy) (epo) |
197 |
| 257/E29.298 |
With multilayer structure or superlattice structure (epo) |
124 |
| 257/E29.285 |
Silicon transistor (epo) |
31 |
| 257/E29.286 |
Monocrystalline only (epo) |
317 |
| 257/E29.287 |
Sos transistor (epo) |
91 |
| 257/E29.288 |
Nonmonocrystalline (epo) |
36 |
| 257/E29.289 |
Amorphous silicon transistor (epo) |
31 |
| 257/E29.291 |
With inverted transistor structure (epo) |
247 |
| 257/E29.29 |
With top gate (epo) |
112 |
| 257/E29.292 |
Polycrystalline or microcrystalline silicon transistor (epo) |
79 |
| 257/E29.294 |
With inverted transistor structure (epo) |
229 |
| 257/E29.293 |
With top gate (epo) |
586 |
| 257/E29.274 |
Vertical transistor (epo) |
204 |
| 257/E29.275 |
With multiple gates (epo) |
709 |
| 257/E29.276 |
With supplementary region or layer in thin film or in insulated bulk substrate supporting it for controlling or increasing voltage resistance of device (epo) |
83 |
| 257/E29.277 |
Characterized by drain or source properties (epo) |
387 |
| 257/E29.278 |
With ldd structure or extension or offset region or characterized by doping profile (epo) |
831 |
| 257/E29.279 |
Asymmetrical source and drain regions (epo) |
323 |
| 257/E29.281 |
For preventing kink or snapback effect (e.g., discharging minority carriers of channel region for preventing bipolar effect) (epo) |
338 |
| 257/E29.28 |
For preventing leakage current (epo) |
216 |
| 257/E29.284 |
With drain or source connected to bulk conducting substrate (epo) |
58 |
| 257/E29.282 |
With light shield (epo) |
192 |
| 257/E29.283 |
With supplementary region or layer for improving flatness of device (epo) |
127 |
| 257/E29.262 |
Vertical transistor (epo) |
599 |
| 257/E29.27 |
With buried channel (epo) |
181 |
| 257/E29.256 |
With channel containing layer contacting drain drift region (e.g., dmos transistor) (epo) |
642 |
| 257/E29.257 |
Having vertical bulk current component or current vertically following trench gate (e.g., vertical power dmos transistor) (epo) |
1000 |
| 257/E29.258 |
With both source and drain contacts in same substrate side (epo) |
204 |
| 257/E29.259 |
With nonplanar surface (epo) |
216 |
| 257/E29.26 |
Channel structure lying under slanted or vertical surface or being formed along surface of groove (e.g., trench gate dmosfet) (epo) |
829 |
| 257/E29.261 |
With at least part of active region on insulating substrate (e.g., lateral dmos in oxide isolated well) (epo) |
204 |
| 257/E29.309 |
With charge trapping gate insulator (e.g., mnos-memory transistors) (epo) |
770 |
| 257/E29.3 |
With floating gate (epo) |
391 |
| 257/E29.302 |
Hi-lo programming levels only (epo) |
306 |
| 257/E29.305 |
Charging by hot carrier injection (epo) |
26 |
| 257/E29.306 |
Hot carrier injection from channel (epo) |
566 |
| 257/E29.307 |
Hot carrier produced by avalanche breakdown of pn junction (e.g., famos) (epo) |
81 |
| 257/E29.303 |
Charging by injection of carriers through conductive insulator (e.g., poole-frankel conduction) (epo) |
36 |
| 257/E29.304 |
Charging by tunneling of carriers (e.g., fowler-nordheim tunneling) (epo) |
702 |
| 257/E29.301 |
Programmable by two single electrons (epo) |
83 |
| 257/E29.308 |
Programmable with more than two possible different levels (epo) |
176 |
| 257/E29.266 |
With lightly doped drain or source extension (epo) |
637 |
| 257/E29.268 |
Source region and drain region having nonsymmetrical structure about gate electrode (epo) |
746 |
| 257/E29.267 |
With nonplanar structure (e.g., gate or source or drain being nonplanar) (epo) |
380 |
| 257/E29.269 |
With overlap between lightly doped extension and gate electrode (epo) |
243 |
| 257/E29.264 |
With multiple gate structure (epo) |
285 |
| 257/E29.265 |
Structure comprising mos gate and at least one non-mos gate (e.g., jfet or mesfet gate) (epo) |
87 |
| 257/E29.271 |
With schottky drain or source contact (epo) |
111 |
| 257/E29.31 |
With field effect produced by pn or other rectifying junction gate (i.e., potential barrier) (epo) |
45 |
| 257/E29.315 |
With heterojunction gate (e.g., transistors with semiconductor layer acting as gate insulating layer) (epo) |
181 |
| 257/E29.316 |
Programmable transistor (e.g., with charge-trapping quantum well) (epo) |
22 |
| 257/E29.312 |
With pn junction gate (e.g., pn homojunction gate) (epo) |
179 |
| 257/E29.314 |
Thin-film jfet (epo) |
41 |
| 257/E29.313 |
Vertical transistors (epo) |
122 |
| 257/E29.311 |
With schottky drain or source contact (epo) |
18 |
| 257/E29.317 |
With schottky gate (epo) |
319 |
| 257/E29.32 |
Thin-film mesfet (epo) |
47 |
| 257/E29.318 |
Vertical transistors (epo) |
85 |
| 257/E29.319 |
With multiple gate (epo) |
84 |
| 257/E29.321 |
With recessed gate (epo) |
129 |
| 257/E29.245 |
With one-dimensional charge carrier gas channel (e.g., quantum wire fet) (epo) |
101 |
| 257/E29.246 |
With two-dimensional charge carrier gas channel (e.g., hemt; with two-dimensional charge-carrier layer formed at heterojunction interface) (epo) |
257 |
| 257/E29.248 |
With confinement of carriers by at least two heterojunctions (e.g., dhhemt, quantum well hemt, dhmodfet) (epo) |
84 |
| 257/E29.249 |
Using group iii-v semiconductor material (epo) |
300 |
| 257/E29.251 |
With delta or planar doped donor layer (epo) |
47 |
| 257/E29.25 |
With more than one donor layer (epo) |
56 |
| 257/E29.252 |
With direct single heterostructure (i.e., with wide bandgap layer formed on top of active layer (e.g., direct single heterostructure mis-like hemt)) (epo) |
78 |
| 257/E29.253 |
With wide bandgap charge-carrier supplying layer (e.g., direct single heterostructure modfet) (epo) |
180 |
| 257/E29.247 |
With inverted single heterostructure (i.e., with active layer formed on top of wide bandgap layer (e.g., ihemt)) (epo) |
49 |
| 257/E29.241 |
Hot electron transistor (het) or metal base transistor (mbt) (epo) |
130 |
| 257/E29.322 |
Single electron transistors: coulomb blockade device (epo) |
97 |
| 257/E29.167 |
Controllable by plural effects that include variations in magnetic field, mechanical force, or electric current/potential applied to device or one or more electrodes of device (epo) |
62 |
| 257/E29.347 |
Controllable by thermal signal (e.g., ir) (epo) |
42 |
| 257/E29.324 |
Controllable by variation of applied mechanical force (e.g., of pressure) (epo) |
361 |
| 257/E29.323 |
Controllable by variation of magnetic field applied to device (epo) |
214 |
| 257/E29.325 |
Controllable only by variation of electric current supplied or only electric potential applied to electrode carrying current to be rectified, amplified, oscillated, or switched (epo) |
73 |
| 257/E29.342 |
Capacitor with potential barrier or surface barrier (epo) |
72 |
| 257/E29.343 |
Conductor-insulator-conductor capacitor on semiconductor substrate (epo) |
322 |
| 257/E29.345 |
Metal-insulator-semiconductor (e.g., mos capacitor) (epo) |
342 |
| 257/E29.346 |
Trench capacitor (epo) |
286 |
| 257/E29.344 |
Variable capacitance diode (e.g., varactors) (epo) |
152 |
| 257/E29.327 |
Diode (epo) |
339 |
| 257/E29.335 |
Avalanche diode (e.g., zener diode) (epo) |
171 |
| 257/E29.331 |
Charge trapping diode (epo) |
37 |
| 257/E29.33 |
Hi-lo semiconductor device (e.g., memory device) (epo) |
50 |
| 257/E29.329 |
Mesa pn junction diode (epo) |
37 |
| 257/E29.336 |
Pin diode (epo) |
157 |
| 257/E29.328 |
Planar pn junction diode (epo) |
126 |
| 257/E29.333 |
Point contact diode (epo) |
3 |
| 257/E29.332 |
Punchthrough diode (i.e., with bulk potential barrier (e.g., camel diode, planar doped barrier diode, graded bandgap diode)) (epo) |
37 |
| 257/E29.338 |
Schottky diode (epo) |
432 |
| 257/E29.337 |
Thyristor diode (i.e., having only two terminals and no control electrode (e.g., shockley diode, break-over diode)) (epo) |
120 |
| 257/E29.334 |
Transit-time diode (e.g., impatt, trapatt diode) (epo) |
66 |
| 257/E29.339 |
Tunneling diode (epo) |
57 |
| 257/E29.341 |
Esaki diode (epo) |
14 |
| 257/E29.34 |
Resonant tunneling diode (i.e., rtd, rtbd) (epo) |
82 |
| 257/E29.326 |
Resistor with pn junction (epo) |
176 |
| 257/E29.168 |
Quantum effect device (epo) |
113 |
| 257/E45.001 |
Solid-state devices adapted for rectifying, amplifying, oscillating, or switching without potential-jump barrier or surface barrier, e.g., dielectric triodes; ovshinsky-effect devices, processes, or apparatus peculiar to manufacture or treatment thereof, or of parts thereof (epo) |
173 |
| 257/E45.002 |
Bistable switching devices, e.g., ovshinsky-effect devices (epo) |
666 |
| 257/E45.004 |
N: light-controlled ovshinsky devices (epo) |
14 |
| 257/E45.003 |
Switching materials being oxides or nitrides (epo) |
120 |
| 257/E45.005 |
Charge density wave transport devices (epo) |
4 |
| 257/E45.006 |
Solid-state travelling-wave devices (epo) |
14 |
| 257/E49.001 |
Solid-state devices with at least one potential-jump barrier or surface barrier using active layer of lower electrical conductivity than material adjacent thereto and through which carrier tunneling occurs, processes or apparatus peculiar to manufacture or treatment of such devices, or of parts thereof (epo) |
42 |
| 257/E49.002 |
Devices using mott metal-insulator transition, e.g., field-effect transistors (epo) |
19 |
| 257/E49.003 |
Quantum devices, e.g., quantum interference devices, metal single electron transistor (epo) |
48 |
| 257/E49.004 |
Thin-film or thick-film devices (epo) |
43 |
| 257/76 |
Specified wide band gap (1.5ev) semiconductor material other than gaasp or gaalas |
467 |
| 257/77 |
Diamond or silicon carbide |
1112 |
| 257/78 |
Ii-vi compound |
216 |
| 257/661 |
Superconductive contact or lead |
92 |
| 257/663 |
On integrated circuit |
99 |
| 257/662 |
Transmission line or shielded |
142 |
| 257/48 |
Test or calibration structure |
1463 |
| 257/930 |
Thermoelectric (e.g., peltier effect) cooling |
151 |
| 257/9 |
Thin active physical layer which is (1) an active potential well layer thin enough to establish discrete quantum energy levels or (2) an active barrier layer thin enough to permit quantum mechanical tunneling or (3) an active layer thin enough to permit carrier transmission with substantially no scattering (e.g., superlattice quantum well, or ballistic transport device) |
447 |
| 257/29 |
Ballistic transport device (e.g., hot electron transistor) |
107 |
| 257/12 |
Heterojunction |
370 |
| 257/26 |
Ballistic transport device |
91 |
| 257/27 |
Field effect transistor |
131 |
| 257/13 |
Incoherent light emitter |
1047 |
| 257/14 |
Quantum well |
987 |
| 257/23 |
Current flow across well |
148 |
| 257/25 |
Employing resonant tunneling |
311 |
| 257/24 |
Field effect device |
493 |
| 257/15 |
Superlattice |
421 |
| 257/20 |
Field effect device |
366 |
| 257/21 |
Light responsive structure |
682 |
| 257/16 |
Of amorphous semiconductor material |
77 |
| 257/18 |
Strained layer superlattice |
390 |
| 257/19 |
Si x ge 1-x |
393 |
| 257/17 |
With particular barrier dimension |
405 |
| 257/22 |
With specified semiconductor materials |
562 |
| 257/10 |
Low workfunction layer for electron emission (e.g., photocathode electron emissive layer) |
375 |
| 257/11 |
Combined with a heterojunction involving a iii-v compound |
209 |
| 257/28 |
Non-heterojunction superlattice (e.g., doping superlattice or alternating metal and insulator layers) |
103 |
| 257/30 |
Tunneling through region of reduced conductivity |
261 |
| 257/37 |
At least one electrode layer of semiconductor material |
75 |
| 257/38 |
Three or more electrode device |
69 |
| 257/31 |
Josephson |
227 |
| 257/35 |
Particular barrier material |
171 |
| 257/32 |
Particular electrode material |
125 |
| 257/33 |
High temperature (i.e., >30o kelvin) |
165 |
| 257/34 |
Weak link (e.g., narrowed portion of superconductive line) |
167 |
| 257/36 |
With additional electrode to control conductive state of josephson junction |
153 |
| 257/39 |
Three or more electrode device |
163 |
| 257/664 |
Transmission line lead (e.g., stripline, coax, etc.) |
426 |
| 257/104 |
Tunneling pn junction (e.g., esaki diode) device |
207 |
| 257/105 |
In three or more terminal device |
59 |
| 257/106 |
Reverse bias tunneling structure (e.g., "backward" diode, true zener diode) |
133 |
| 257/595 |
Voltage variable capacitance device |
144 |
| 257/601 |
Plural diodes in same non-isolated structure, or device having three or more terminals |
74 |
| 257/599 |
With means to increase active junction area (e.g., grooved or convoluted surface) |
35 |
| 257/600 |
With physical configuration to vary voltage dependence (e.g., mesa) |
53 |
| 257/598 |
With plural junctions whose depletion regions merge to vary voltage dependence |
32 |
| 257/596 |
With specified dopant profile |
62 |
| 257/597 |
Retrograde dopant profile (e.g., dopant concentration decreases with distance from rectifying junction) |
21 |
| 257/602 |
With specified housing or contact |
43 |
| 257/594 |
With groove to define plural diodes |
99 |
| 257/913 |
With means to absorb or localize unwanted impurities or defects from semiconductors (e.g., heavy metal gettering) |
77 |
| 257/629 |
With means to control surface effects |
188 |
| 257/652 |
Channel stop layer |
72 |
| 257/631 |
In compound semiconductor material (e.g., gaas) |
118 |
| 257/632 |
Insulating coating |
441 |
| 257/646 |
Coating of semi-insulating material (e.g., amorphous silicon or silicon-rich silicon oxide) |
147 |
| 257/651 |
Details of insulating layer electrical charge (e.g., negative insulator layer charge) |
54 |
| 257/634 |
Insulating coating of glass composition containing component to adjust melting or softening temperature (e.g., low melting point glass) |
97 |
| 257/650 |
Insulating layer of glass |
123 |
| 257/649 |
Insulating layer of silicon nitride or silicon oxynitride |
326 |
| 257/647 |
Insulating layer recessed into semiconductor surface (e.g., locos oxide) |
322 |
| 257/648 |
Combined with channel stop region in semiconductor |
112 |
| 257/635 |
Multiple layers |
443 |
| 257/644 |
At least one layer of glass |
157 |
| 257/642 |
At least one layer of organic material |
447 |
| 257/643 |
Polyimide or polyamide |
213 |
| 257/636 |
At least one layer of semi-insulating material |
94 |
| 257/640 |
At least one layer of silicon nitride |
500 |
| 257/641 |
Combined with glass layer |
111 |
| 257/639 |
At least one layer of silicon oxynitride |
206 |
| 257/645 |
Insulating layer containing specified electrical charge (e.g., net negative electrical charge) |
57 |
| 257/637 |
Three or more insulating layers |
318 |
| 257/638 |
With discontinuous or varying thickness layer (e.g., layer covers only selected portions of semiconductor) |
182 |
| 257/633 |
With thermal expansion compensation (e.g., thermal expansion of glass passivant matched to that of semiconductor) |
71 |
| 257/630 |
With inversion-preventing shield electrode |
143 |
| 257/487 |
With means to increase breakdown voltage threshold |
201 |
| 257/488 |
Field relief electrode |
252 |
| 257/490 |
Combined with floating pn junction guard region |
128 |
| 257/489 |
Resistive |
95 |
| 257/495 |
Floating pn junction guard region |
154 |
| 257/491 |
In integrated circuit |
172 |
| 257/492 |
With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., resurf devices) |
275 |
| 257/494 |
Reverse-biased pn junction guard region |
100 |
| 257/493 |
With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., resurf devices) |
254 |
| 257/496 |
With physical configuration of semiconductor surface to reduce electric field (e.g., reverse bevels, double bevels, stepped mesas, etc.) |
158 |
| 257/923 |
With means to optimize electrical conductor current carrying capacity (e.g., particular conductor aspect ratio) |
83 |
| 257/922 |
With means to prevent inspection of or tampering with an integrated circuit (e.g., "smart card", anti-tamper) |
81 |
| 257/44 |
With metal contact alloyed to elemental semiconductor type pn junction in nonregenerative structure |
50 |
| 257/45 |
Elongated alloyed region (e.g., thermal gradient zone melting, tgzm) |
46 |
| 257/47 |
In bipolar transistor structure |
47 |
| 257/46 |
In pn junction tunnel diode (esaki diode) |
67 |
| 257/924 |
With passive device (e.g., capacitor), or battery, as integral part of housing or housing element (e.g., cap) |
119 |
| 257/659 |
With shielding (e.g., electrical or magnetic shielding, or from electromagnetic radiation or charged particles) |
840 |
| 257/660 |
With means to shield device contained in housing or package from charged particles (e.g., alpha particles) or highly ionizing radiation (i.e., hard x-rays or shorter wavelength) |
342 |
| 257/928 |
With shorted pn or schottky junction other than emitter junction |
44 |
| 257/607 |
With specified dopant (e.g., plural dopants of same conductivity in same region) |
311 |
| 257/610 |
Deep level dopant |
105 |
| 257/612 |
Deep level dopant other than gold or platinum |
83 |
| 257/611 |
With specified distribution (e.g., laterally localized, with specified concentration distribution or gradient) |
134 |
| 257/609 |
For compound semiconductor (e.g., deep level dopant) |
121 |
| 257/608 |
Switching device based on filling and emptying of deep energy levels |
37 |
| 257/655 |
With specified impurity concentration gradient |
298 |
| 257/657 |
Stepped profile |
97 |
| 257/656 |
With high resistivity (e.g., "intrinsic") layer between p and n layers (e.g., pin diode) |
267 |
| 257/653 |
With specified shape of pn junction |
206 |
| 257/654 |
Interdigitated pn junction or more heavily doped side of junction is concave |
47 |
| 257/915 |
With titanium nitride portion or region |
191 |
