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Class Information
Number: 148/DIG.51
Name: Metal treatment > Etching
Description:










Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
6780338 Method for processing a stent processed with tools containing magnetizing components Aug. 24, 2004
6197210 Process for treating brass components to substantially eliminate leachabale lead Mar. 6, 2001
5981326 Damascene isolation of CMOS transistors Nov. 9, 1999
5926705 Method for manufacturing a semiconductor device with stabilization of a bipolar transistor and a schottky barrier diode Jul. 20, 1999
5895259 Polysilicon diffusion doping method employing a deposited doped oxide layer with a highly uniform thickness Apr. 20, 1999
5801103 Etching process which protects metal Sep. 1, 1998
5801071 Method for producing semiconductor laser diode Sep. 1, 1998
5789301 Method for reducing extrinsic base-collector capacitance Aug. 4, 1998
5700701 Method for reducing junction capacitance and increasing current gain in collector-up bipolar transistors Dec. 23, 1997
5698063 Intermediate workpiece employing a mask for etching an aperture aligned with the crystal planes in the workpiece substrate Dec. 16, 1997
5580800 Method of patterning aluminum containing group IIIb Element Dec. 3, 1996
5573960 Method of manufacturing semiconductor layers by bonding without defects created by bonding Nov. 12, 1996
5565384 Self-aligned via using low permittivity dielectric Oct. 15, 1996
5563094 Buried reverse bias junction configurations in semiconductor structures employing photo induced evaporation enhancement during in situ epitaxial growth and device structures utilizing the same Oct. 8, 1996
5508229 Method for forming solder bumps in semiconductor devices Apr. 16, 1996
5484507 Self compensating process for aligning an aperture with crystal planes in a substrate Jan. 16, 1996
5476813 Method of manufacturing a bonded semiconductor substrate and a dielectric isolated bipolar transistor Dec. 19, 1995
5444020 Method for forming contact holes having different depths Aug. 22, 1995
5434091 Method for making collector up bipolar transistors having reducing junction capacitance and increasing current gain Jul. 18, 1995
5352327 Reduced temperature suppression of volatilization of photoexcited halogen reaction products from surface of silicon wafer Oct. 4, 1994
5346851 Method of fabricating Shannon Cell circuits Sep. 13, 1994
5316979 RIE process for fabricating submicron, silicon electromechanical structures May. 31, 1994
5314837 Method of making a registration mark on a semiconductor May. 24, 1994
5294568 Method of selective etching native oxide Mar. 15, 1994
5266516 Method for making electrical contact through an opening of one micron or less for CMOS technology Nov. 30, 1993
5232868 Method for forming a thin semiconductor film Aug. 3, 1993
5223457 High-frequency semiconductor wafer processing method using a negative self-bias Jun. 29, 1993
5198390 RIE process for fabricating submicron, silicon electromechanical structures Mar. 30, 1993
5182234 Profile tailored trench etch using a SF.sub.6 -O.sub.2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen Jan. 26, 1993
5157000 Method for dry etching openings in integrated circuit layers Oct. 20, 1992
5137847 Method of producing GaAs single crystal substrate using three stage annealing and interstage etching Aug. 11, 1992
5134090 Method of fabricating patterned epitaxial silicon films utilizing molecular beam epitaxy Jul. 28, 1992
5122481 Semiconductor element manufacturing process using sequential grinding and chemical etching steps Jun. 16, 1992
5110765 Selective etch for GaAs-containing group III-V compounds May. 5, 1992
5096854 Method for polishing a silicon wafer using a ceramic polishing surface having a maximum surface roughness less than 0.02 microns Mar. 17, 1992
5093278 Method of manufacturing a semiconductor laser Mar. 3, 1992
5084419 Method of manufacturing semiconductor device using chemical-mechanical polishing Jan. 28, 1992
5075256 Process for removing deposits from backside and end edge of semiconductor wafer while preventing removal of materials from front surface of wafer Dec. 24, 1991
5045503 Microwave monolithic integrated circuit with heat radiating electrode Sep. 3, 1991
5043299 Process for selective deposition of tungsten on semiconductor wafer Aug. 27, 1991
5030590 Process for etching polysilicon layer in formation of integrated circuit structure Jul. 9, 1991
5023197 Manufacturing process of mesa SOI MOS transistor Jun. 11, 1991
5023203 Method of patterning fine line width semiconductor topology using a spacer Jun. 11, 1991
5017511 Method for dry etching vias in integrated circuit layers May. 21, 1991
5001080 Method for producing a monolithically integrated optoelectronic device Mar. 19, 1991
4988644 Method for etching semiconductor materials using a remote plasma generator Jan. 29, 1991
4983540 Method of manufacturing devices having superlattice structures Jan. 8, 1991
4980317 Method of producing integrated semiconductor structures comprising field-effect transistors with channel lengths in the submicron range using a three-layer resist system Dec. 25, 1990
4962057 Method of in situ photo induced evaporation enhancement of compound thin films during or after epitaxial growth Oct. 9, 1990
4962064 Method of planarization of topologies in integrated circuit structures Oct. 9, 1990

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