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Class Information
Number: 148/DIG.13
Name: Metal treatment > Breakdown voltage
Description:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5665634 |
Method of increasing maximum terminal voltage of a semiconductor device |
Sep. 9, 1997 |
| 5434095 |
Method for controlling electrical breakdown in semiconductor power devices |
Jul. 18, 1995 |
| 5399507 |
Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications |
Mar. 21, 1995 |
| 5330922 |
Semiconductor process for manufacturing semiconductor devices with increased operating voltages |
Jul. 19, 1994 |
| 5273927 |
Method of making a ferroelectric capacitor and forming local interconnect |
Dec. 28, 1993 |
| 5248623 |
Method for making a polycrystalline diode having high breakdown |
Sep. 28, 1993 |
| 5120669 |
Method of forming self-aligned top gate channel barrier region in ion-implanted JFET |
Jun. 9, 1992 |
| 5028548 |
Method of manufacturing a planar semiconductor device having a guard ring structure |
Jul. 2, 1991 |
| 4966858 |
Method of fabricating a lateral semiconductor structure including field plates for self-alignment |
Oct. 30, 1990 |
| 4725560 |
Silicon oxynitride storage node dielectric |
Feb. 16, 1988 |
| 4646427 |
Method of electrically adjusting the zener knee of a lateral polysilicon zener diode |
Mar. 3, 1987 |
| 4637126 |
Method for making an avalanche photodiode |
Jan. 20, 1987 |
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