| Patent Number |
Title Of Patent |
Date Issued |
| 6335262 |
Method for fabricating different gate oxide thicknesses within the same chip |
Jan. 1, 2002 |
| 6239041 |
Method for fabricating semiconductor integrated circuit device |
May. 29, 2001 |
| 6168967 |
Reduction of surface leakage current by surface passivation of CdZn Te and other materials using hyperthermal oxygen atoms |
Jan. 2, 2001 |
| 6096613 |
Method for poly-buffered locos without pitting formation |
Aug. 1, 2000 |
| 5920779 |
Differential gate oxide thickness by nitrogen implantation for mixed mode and embedded VLSI circuits |
Jul. 6, 1999 |
| 5863819 |
Method of fabricating a DRAM access transistor with dual gate oxide technique |
Jan. 26, 1999 |
| 5696023 |
Method for making aluminum gallium arsenide semiconductor device with native oxide layer |
Dec. 9, 1997 |
| 5683925 |
Manufacturing method for ROM array with minimal band-to-band tunneling |
Nov. 4, 1997 |
| 5672521 |
Method of forming multiple gate oxide thicknesses on a wafer substrate |
Sep. 30, 1997 |
| 5616515 |
Silicon oxide germanium resonant tunneling |
Apr. 1, 1997 |
| 5576226 |
Method of fabricating memory device using a halogen implant |
Nov. 19, 1996 |
| 5554545 |
Method of forming neuron mosfet with different interpolysilicon oxide thickness |
Sep. 10, 1996 |
| 5532177 |
Method for forming electron emitters |
Jul. 2, 1996 |
| 5480828 |
Differential gate oxide process by depressing or enhancing oxidation rate for mixed 3/5 V CMOS process |
Jan. 2, 1996 |
| 5460985 |
Production method of a verticle type MOSFET |
Oct. 24, 1995 |
| 5385856 |
Manufacture of the fieldless split-gate EPROM/Flash EPROM |
Jan. 31, 1995 |
| 5369052 |
Method of forming dual field oxide isolation |
Nov. 29, 1994 |
| 5358894 |
Oxidation enhancement in narrow masked field regions of a semiconductor wafer |
Oct. 25, 1994 |
| 5308781 |
Semiconductor memory device |
May. 3, 1994 |
| 5258322 |
Method of producing semiconductor substrate |
Nov. 2, 1993 |
| 5225365 |
Method of making a substantially planar semiconductor surface |
Jul. 6, 1993 |
| 5223450 |
Method of producing semiconductor substrate having dielectric separation region |
Jun. 29, 1993 |
| 5106768 |
Method for the manufacture of CMOS FET by P+ maskless technique |
Apr. 21, 1992 |
| 5079191 |
Process for producing a semiconductor device |
Jan. 7, 1992 |
| 5057451 |
Method of forming an antifuse element with substantially reduced capacitance using the LOCOS technique |
Oct. 15, 1991 |
| 5001082 |
Self-aligned salicide process for forming semiconductor devices and devices formed thereby |
Mar. 19, 1991 |
| 4888300 |
Submerged wall isolation of silicon islands |
Dec. 19, 1989 |
| 4830975 |
Method of manufacture a primos device |
May. 16, 1989 |
| 4824795 |
Method for obtaining regions of dielectrically isolated single crystal silicon |
Apr. 25, 1989 |
| 4745086 |
Removable sidewall spacer for lightly doped drain formation using one mask level and differential oxidation |
May. 17, 1988 |
| 4703554 |
Technique for fabricating a sidewall base contact with extrinsic base-on-insulator |
Nov. 3, 1987 |
| 4234362 |
Method for forming an insulator between layers of conductive material |
Nov. 18, 1980 |
| 4209349 |
Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching |
Jun. 24, 1980 |
| 4192059 |
Process for and structure of high density VLSI circuits, having inherently self-aligned gates and contacts for FET devices and conducting lines |
Mar. 11, 1980 |
| 4190466 |
Method for making a bipolar transistor structure utilizing self-passivating diffusion sources |
Feb. 26, 1980 |
| 4139402 |
Method of manufacturing a semiconductor device utilizing doped oxides and controlled oxidation |
Feb. 13, 1979 |
| 3975818 |
Method of forming closely spaced electrodes onto semiconductor device |
Aug. 24, 1976 |
| 3962779 |
Method for fabricating oxide isolated integrated circuits |
Jun. 15, 1976 |
