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n Microsystems, Inc. Patents
Assignee:
n Microsystems, Inc.
Address:
Santa Clara, CA
No. of patents:
1
Patents:




Patent Number Title Of Patent Date Issued
6788123 Unity gain interpolator for delay locked loops September 7, 2004
A method and apparatus for delaying a clock signal involves a first clock path arranged to propagate a first clock signal; a second clock path arranged to propagate a second clock signal; and an interpolator arranged as a unity gain operational amplifier. An amount of delay between the

 
 
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