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VIA Technologies, Inc. Patents
Assignee:
VIA Technologies, Inc.
Address:
New Taipei, TW
No. of patents:
1348
Patents:












Patent Number Title Of Patent Date Issued
8590038 Revokeable MSR password protection November 19, 2013
A microprocessor includes an MSR and fuses. The microprocessor encounters an instruction requesting access to the MSR and specifying the MSR address, performs a function of the specified MSR address and a value read from the fuses to generate a first result, encrypts the first result
8582276 Capacitor structure November 12, 2013
A capacitor structure including a dielectric material layer and at least two metal layers is provided. The metal layers are disposed at intervals in the dielectric material layer. Each of the metal layers includes a zigzaging electrode, a first finger-shaped electrode and a second fi
8572306 USB transaction translator and USB transaction translation method October 29, 2013
The present invention is directed to a universal serial bus (USB) transaction translator and a micro-frame synchronization method. A device interface is coupled to a device via a device bus, and a host interface is coupled to a host via a host bus, wherein the host USB version is hig
8570091 Level shifter October 29, 2013
A level shifter, converting an input signal into an output signal for level shifting, including a leakage blocking circuit having cascaded P-channel transistors and one N-channel transistor. The P-channel transistor at a beginning stage provides a gate for receiving the input signal
8570080 Frequency-control circuits and signal generation devices using the same October 29, 2013
A signal generation device is provided to generate an output signal with constant frequency. The signal generation device includes a frequency-control circuit and a voltage-controlled delay line. The frequency-control circuit is arranged to charge/discharge a voltage-control node acc
8566565 Microprocessor with multiple operating modes dynamically configurable by a device driver based o October 22, 2013
A computing system includes a microprocessor that receives values for configuring operating modes thereof. A device driver monitors which software applications currently running on the microprocessor are in a predetermined list and responsively dynamically writes the values to the mi
8565196 Simultaneous use of multiple phone numbers in mobile device by sharing hardware October 22, 2013
Determining and simultaneously using a base station coupled to a mobile device, the base station comprising a detector for receiving a first identification signal corresponding to a first module and a second identification signal corresponding to a second module from the mobile devic
8564604 Systems and methods for improving throughput of a graphics processing unit October 22, 2013
Systems and methods for improving throughput of a graphics processing unit are disclosed. In one embodiment, a system includes a multithreaded execution unit capable of processing requests to access a constant cache, a vertex attribute cache, at least one common register file, and an
8301842 Efficient pseudo-LRU for colliding accesses October 30, 2012
An apparatus for allocating entries in a set associative cache memory includes an array that provides a first pseudo-least-recently-used (PLRU) vector in response to a first allocation request from a first functional unit. The first PLRU vector specifies a first entry from a set of the
8295455 Computer system and processor having integrated phone functionality October 23, 2012
A computer system including telephone functionality. The computer system includes a first keyboard and a first display. The computer system also includes a processor having at least a first functional unit and a second functional unit, and further includes a phone portion. The computer
8291172 Multi-modal data prefetcher October 16, 2012
A microprocessor includes first and second cache memories occupying distinct hierarchy levels, the second backing the first. A prefetcher monitors load operations and maintains a recent history of the load operations from a cache line and determines whether the recent history indicat
8285885 Universal serial bus device and universal serial bus system October 9, 2012
A universal serial bus (USB) device and a USB system are provided. The USB device comprises an electrical physical layer (EPHY) module, a logical physical layer (LPHY) module and a link layer module. The EPHY module reads the voltages of first and second transmission lines of a USB c
8281223 Detection of fuse re-growth in a microprocessor October 2, 2012
A microprocessor includes a first plurality of fuses, a predetermined number of which are selectively blown. Control values are provided from the fuses to circuits of the microprocessor to control operation thereof. A second plurality of fuses are blown with the predetermined number of
8281222 Detection and correction of fuse re-growth in a microprocessor October 2, 2012
A microprocessor includes a first plurality of fuses selectively blown with control values, a second plurality of fuses selectively blown collectively with an error correction value computed from the control values, control hardware that receives the control values and provides them
8281198 User-initiatable method for detecting re-grown fuses within a microprocessor October 2, 2012
A microprocessor includes a first plurality of fuses, selectively blown with a predetermined value for provision to circuits of the microprocessor to control operation of the microprocessor. The microprocessor also includes a second plurality of fuses, selectively blown with error de
8281171 Adjustment of power-saving strategy depending on working state of CPU October 2, 2012
In a method for adjusting power-saving strategy of a peripheral device controller in communication with a CPU, whether the CPU is in a working state while the peripheral device enters a power-saving mode is first determined. Then, interrupt the CPU at relatively short intervals during
8281110 Out-of-order microprocessor with separate branch information circular queue table tagged by bran October 2, 2012
An out-of-order execution in-order retire microprocessor includes a branch information table comprising N entries. Each of the N entries stores information associated with a branch instruction. The microprocessor also includes a reorder buffer comprising M entries. Each of the M entr
8279920 Intra-frame prediction method and prediction apparatus using the same October 2, 2012
An intra-frame prediction method and a prediction apparatus using the same are provided. The prediction apparatus includes an input data unit, a control unit, an selection unit, a processing unit, and an output data selecting unit. The input data unit provides surroundings pixels of a
8276032 Detection of uncorrectable re-grown fuses in a microprocessor September 25, 2012
A microprocessor includes a first plurality of fuses, a predetermined number of which are selectively blown. Control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor. The microprocessor also includes a
8275049 Systems and methods of improved motion estimation using a graphics processing unit September 25, 2012
Disclosed is a graphics processing unit comprising an instruction decoder and sum-of-absolute-differences (SAD) accleration logic. The instruction decoder is configured to decode a SAD instruction into parameters describing an M.times.N and an n.times.n pixel block in U,V coordinates.
8271762 Mapping management methods and systems September 18, 2012
Mapping management methods and systems are provided. First, a sub-read command comprising mapping directory number, block offset and page offset is obtained. Then, a specific block mapping table is located from a plurality of block mapping tables according to the mapping directory nu
8270840 Backward compatible optical USB device September 18, 2012
An optical USB device includes an electro-optical converter configured to receive optical signals from an optical fiber and to convert them into first electrical signals and configured to receive second electrical signals and to convert them into optical signals for transmission to the
8269329 Multi-chip package September 18, 2012
A multi-chip package structure is provided with a first chip, a substrate adjacent to the first chip, a plurality of contacts connecting the first chip and the substrate, a second chip disposed between the first chip and the substrate and connecting to the first chip, and a underfill fil
8265164 Method and apparatus for determining whether adjacent macroblocks are located in the same slice September 11, 2012
The present invention is directed to a method for determining whether a current macroblock and an adjacent macroblock thereof are located in the same slice. The method is used in a predetermined process for a block-based digitally encoded image. The block-based digitally encoded imag
8261436 Fabricating process of circuit substrate September 11, 2012
A circuit substrate fabricating process includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer
8258775 Method and apparatus for determining phase error between clock signals September 4, 2012
A phase error circuit including phase difference logic and delay and register logic. The phase difference logic provides a pulse difference signal including at least one difference pulse indicative of a timing difference between selected edges of a pair of clock signals. The delay an
8255703 Atomic hash instruction August 28, 2012
A method for performing a hash operation, including providing an atomic hash instruction that directs a microprocessor to perform a the hash operation and to indicate whether the hash operation has been interrupted by an interrupting event; translating the atomic hash instruction into
8253523 Spiral inductor device August 28, 2012
A spiral inductor device is provided. The spiral inductor device includes a first spiral conductive trace with multiple turns and a second spiral conductive trace with multiple turns adjacent thereto, disposed on an insulating layer over a substrate, wherein the outermost turn and the
8250393 Power management method and related chipset and computer system August 21, 2012
A power management method for use in a computer system having a processor, a power management module and a phase lock loop circuit (PLL) is provided. The power management module is coupled to a plurality of peripheral modules and the computer system and the processor are capable of b
8245017 Pipelined microprocessor with normal and fast conditional branch instructions August 14, 2012
A microprocessor includes a first branch condition state and a second branch condition state. The microprocessor also includes a conditional branch instruction of a first type that instructs the microprocessor to wait to correctly resolve the conditional branch instruction of the first
8243815 Systems and methods of video compression deblocking August 14, 2012
An exemplary graphics processing unit (GPU) comprises a decoder and a video processing unit. The decoder is configured to decode a first and a second deblocking filter acceleration instruction. The first and second deblocking filter instructions are associated with a deblocking filter
8242802 Location-based bus termination for multi-core processors August 14, 2012
A multi-core bus termination apparatus includes a location array and a plurality of drivers. The location array generates a plurality of location signals that indicate locations on the bus of a corresponding plurality of nodes that are coupled to the bus, where the locations comprise
8242800 Apparatus and method for override access to a secured programmable fuse array August 14, 2012
An apparatus in an integrated circuit for re-enabling the use of precluded extended JTAG operations. The apparatus includes a JTAG control chain, a feature fuse, a machine specific register, and an access controller. The JTAG control chain is configured to enable/disable the extended
8234543 Detection and correction of fuse re-growth in a microprocessor July 31, 2012
A microprocessor includes control hardware that receives and stores control values and provides the control values to circuits of the microprocessor for controlling operation of the microprocessor. The microprocessor also includes a first plurality of fuses selectively blown collecti
8234530 Serial interface device built-in self test July 31, 2012
A built-in self test circuit includes a pattern generator, an elastic buffer, a symbol detector, and a comparison unit. A pattern generator generates a first test pattern to test a port under test and then a result pattern is gotten and stored in the elastic buffer. The symbol detect
8234450 Efficient data prefetching in the presence of load hits July 31, 2012
A BIU prioritizes L1 requests above L2 requests. The L2 generates a first request to the BIU and detects the generation of a snoop request and L1 request to the same cache line. The L2 determines whether a bus transaction to fulfill the first request may be retried and, if so, genera
8234416 Apparatus interoperable with backward compatible optical USB device July 31, 2012
An apparatus configured to couple to a universal serial bus (USB) 3.0 connector. The apparatus includes a management controller configured to couple to the USB 3.0 connector. The management controller is configured to detect from behavior on the D+ and D- pins of the USB 3.0 connector
8229001 Method and system for calculating flag parameter of image block July 24, 2012
A flag parameter in a digital image decoding is calculated. For a macroblock consisting of M.times.N blocks, a first operation is performed on M block along a first edge to obtain M first parameters, and a second operation is performed on N blocks along a second edge to obtain N second
8214569 Method for reading and writing non-standard register of serial advanced technology attachment (S July 3, 2012
A method for reading non-standard register of Serial Advanced Technology Attachment (SATA) devices discloses an unused input parameter of standard command setting up as an executive parameter. While receiving the standard command, a SATA host controller converts the executive parameter
8209763 Processor with non-volatile mode enable register entering secure execution mode and encrypting s June 26, 2012
An apparatus including a microprocessor and a secure non-volatile memory. The microprocessor is a single integrated circuit disposed on a single die, and executes non-secure application programs and a secure application program. The secure application program is executed in a secure
8209546 Data-securing method of program tool June 26, 2012
A program tool with a data-securing function includes a flow control center and a plurality of processing units for performing respective processing steps. The flow control center receives and transfers an encrypted input data to perform a decryption step, transfers the decrypted dat
8204121 Method and apparatus for MP3 decoding June 19, 2012
A memory optimization method for a MP3 decoder. In a pipeline structure for speeding matrix calculation in Mp3 decoding, an output sequence of IMDCT calculation is altered so that matrix calculation is activated before completing the IMDCT calculation. A decoding control method allows
8195930 Computer system with reduced storage device and associated booting method June 5, 2012
A computer system with integrated storage device for storing both a basic input/output system (BIOS) code and an operating system (OS) code and an associated booting method are provided. The computer system includes a central processing unit, a storage device controller and the storage
8194782 Grouping bits interleaving apparatus and method thereof June 5, 2012
An grouping bits interleaver includes a grouping bits unit and a data storage unit. The grouping bits unit is used for storing N data bits of an input data and outputting an address signal. Wherein each data bit is stored according to a bit position. The data storage unit coupled to the
8194692 Apparatus with and a method for a dynamic interface protocol June 5, 2012
An apparatus with a dynamic interface protocol and a method for a dynamic interface protocol are provided. The apparatus is capable of consolidating multiple interface protocols to a single output terminal to reduce the number of output pins and the complexity and the cost of the app
8194137 Image frame transmission method for data overrun control June 5, 2012
An image frame transmission method for use in a network transmission system is provided. The network transmission system includes an image sensor and an image processor. Firstly, a first image data segment of an image frame captured by the image sensor is outputted to the image proce
8188565 Semiconductor chip and shielding structure thereof May 29, 2012
A semiconductor chip including a substrate, a metal interconnection structure and a circuit region is provided. The substrate has at least one dielectric ring on a substrate surface of the substrate. The metal interconnection structure is disposed on the substrate surface and has at
8181037 Application protection systems and methods May 15, 2012
Application protection systems and methods. The system comprises a security platform device comprising a storage unit and a processing unit. The storage unit comprises a root security key and an application security key. The security platform device receives a unique key from an appl
8179178 Registers with reduced voltage clocks May 15, 2012
A register circuit including a level shift circuit, a latch isolation circuit, and a keeper circuit for registering data with a lower voltage clock signal. The level shift circuit switches a level shift node between a reference voltage level and an upper voltage level in response to a
8176347 Microprocessor that performs adaptive power throttling May 8, 2012
A microprocessor that performs adaptive power throttling includes a calculation unit configured to calculate an average power consumed by the microprocessor over a most recent predetermined sample time and to determine whether the average power is less than a predetermined maximum po

 
 
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