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VLSI Technology Research Association Patents
Assignee:
VLSI Technology Research Association
Address:
Kanagawa, JP
No. of patents:
24
Patents:




Patent Number Title Of Patent Date Issued
4799009 Semiconductor testing device January 17, 1989
A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of
4630095 Packaged semiconductor device structure including getter material for decreasing gas from a prot December 16, 1986
A packaged semiconductor device structure includes a semiconductor chip with an organic material covering thereon. The semiconductor chip is placed in a package and hermetically sealed with a low melting point glass. The organic covering serve to suppress undesirable influence on the
4576678 Pattern forming method March 18, 1986
A pattern forming method for semiconductor devices in which a film layer of a compound containing silicon and nitrogen is formed between a substrate and a resist layer with a desired pattern readily formed utilizing a lift-off technique. A first film layer of a compound such as Si.sub.3
4523213 MOS Semiconductor device and method of manufacturing the same June 11, 1985
An MOS semiconductor device, wherein a buried region of silicon oxide or silicon nitride extends partly over the bottom plane of the channel region of an MOS transistor.
4487161 Semiconductor device manufacturing unit December 11, 1984
A semiconductor device manufacturing unit in which plasma gas is maintained sealed in a quartz tube by a magnet disposed outside the quartz tube to make the density of plasma gas high and uniform thereby improving the quality of CVD films deposited with the gas and reducing the processin
4410951 Positioning apparatus October 18, 1983
A positioning apparatus employing a piezo worm type shifting mechanism in which the position of a platform to be moved to a desired position is measured with a position measuring device and data representing the position thus measured is applied to a microprocessor. The microprocessor
4389125 Method for measuring surface temperature distribution and system June 21, 1983
A method for easily measuring surface temperature distribution of a sample consisting of a plurality of coexisting materials having different radiation factors at a specified temperature and a system for performing the surface temperature measuring method. In this measuring method, a
4377902 Method of manufacturing semiconductor device using laser beam crystallized poly/amorphous layer March 29, 1983
A method of manufacturing a semiconductor device comprising a step of forming a desired opening in an insulating film formed on a single-crystalline semiconductor substrate, a step of forming an impurity-doped amorphous or polycrystalline semiconductor layer to cover the surface of s
4376657 Method of making fault-free surface zone in semiconductor devices by step-wise heat treating March 15, 1983
In a gettering method for processing semiconductor wafers a semiconductor wafer such as a silicon wafer is first annealed in a non-oxidizing atmosphere, for example, in a nitrogen atmosphere, at a temperature in the range of 950.degree. to 1,300.degree. C., preferably at 1,050.degree. C.
4375999 Method of manufacturing a semiconductor device March 8, 1983
A method of manufacturing a semiconductor device for simultaneously forming a plurality of diffused regions of selectively different diffusion depths, comprises forming polycrystalline semiconductor layers of corresponding, selectively different depths on the semiconductor substrate surf
4348804 Method of fabricating an integrated circuit device utilizing electron beam irradiation and selec September 14, 1982
Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated gate electrode is formed to exten
4348577 High selectivity plasma etching method September 7, 1982
A parallel-plate type gas plasma etching apparatus for etching a workpiece having a multilayer structure having a high etch rate ratio. A pair of parallel-plate electrodes are disposed in a reactor. A workpiece to be etched is disposed upon one of the electrodes. The reactor is held at a
4335505 Method of manufacturing semiconductor memory device having memory cell elements composed of a tr June 22, 1982
A method for forming semiconductor memory devices each including either an MNOS-type or MOS-type transistor and an MNOS-type capacitor. Upon a silicon substrate there is formed a thick layer of oxide which defines the individual cells and provides separation therebetween. Exposed portion
4322881 Method for manufacturing semiconductor memory devices April 6, 1982
A method for producing semiconductor memory devices each including an MNOS-type transistor and an MNOS-type capacitor or an MOS-type transistor and an MNOS-type capacitor. A thick oxide layer is formed in predetermined patterns on the surface of the substrate so as to separate the memory
4321284 Manufacturing method for semiconductor device March 23, 1982
A method for manufacturing semiconductor devices having a multi-layer wiring interconnection structure wherein a first interconnection wiring metal layer is formed on a semiconductor substrate followed by the formation of layers of silicon nitride on portions wherein patterns are to
4317200 Method and device for testing a sequential circuit divided into a plurality of partitions February 23, 1982
For test, a sequential circuit operable in a normal and a shift mode is logically divided into a plurality of partitions, each comprising a first and a second sequence of registers. A testing device specifies the first sequence in each partition, one partition after another, and supplies
4314269 Semiconductor resistor comprising a resistor layer along a side surface February 2, 1982
A semiconductor resistor comprises a semiconductor resistor layer along at least an area of an internal side surface of a groove formed in a predetermined configuration, such as a figure of .pi., in a semiconductor block of a conductivity type opposite to that of the resistor layer.
4292156 Method of manufacturing semiconductor devices September 29, 1981
A method of manufacturing a semiconductor device which has a thick insulating layer on a region for isolating semiconductor circuit elements from one another on a semiconductor substrate. This region of the substrate is selectively etched by using an insulating layer to leave the une
4292091 Method of producing semiconductor devices by selective laser irradiation and oxidation September 29, 1981
A method of producing a semiconductor device comprises a step of forming a field isolating oxide layer from an amorphous silicon layer by oxidation at a relatively low temperature. Prior to the oxidizing treatment, a portion of the amorphous silicon layer is recrystallized into a sin
4280854 Method of manufacturing a semiconductor device having conductive and insulating portions formed July 28, 1981
A semiconductor device is manufactured by covering a semiconductor substrate of a predetermined conductivity type with a polycrystal layer of a semiconductor material. Selected portions of the polycrystal layer are oxidized into an insulating material during heat treatment. Remaining
4259724 Device comprising a circuit for making a beam exposure system effectively draw a repetitive patt March 31, 1981
Patterns to be drawn by a controlled electron beam producing system or a like system, as on a mask for integrated circuits, are classified into nonrepetitive and repetitive patterns. Each repetitive pattern is specified by those coordinates of an elementary pattern and those displace
4232439 Masking technique usable in manufacturing semiconductor devices November 11, 1980
A semiconductor layer different in material from a semiconductor substrate formed on at least one part of the surface of the substrate is partially removed in accordance with a planar configuration forming technique employing irradiation of a radiation such as light, electron beam or
4225958 Device comprising circuits for holding, in particular, a test data signal September 30, 1980
An electronic device, such as an LSI, comprising a logic circuit and an electronic circuit that comprises, in turn, a large-capacity memory circuit and/or at least one oscillator is provided with a holding circuit between the logic and the electronic circuits and between the electronic
4193783 Method of treating a silicon single crystal ingot March 18, 1980
A method of treating a silicon single crystal ingot which comprises the steps of purposely producing lattice strains in a silicon single crystal ingot, annealing the ingot at high temperature, and etching off the surface of the annealed ingot, thereby suppressing the occurrence of la

 
 
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