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United Microelectronics Corp. Patents
Assignee:
United Microelectronics Corp.
Address:
Hsinchu, TW
No. of patents:
2497
Patents:












Patent Number Title Of Patent Date Issued
RE40113 Method for fabricating gate oxide February 26, 2008
A method for fabricating gate oxide includes a dilute wet oxidation process with additional nitrogen and moisture and an annealing process with a nitrogen base gas, wherein the volume of additional nitrogen is about .[.6-12.]. .Iadd.6-20 .Iaddend.times of the volume of the additional
D466500 Web pad December 3, 2002
8587462 Digital-to-analog converter November 19, 2013
A digital-to-analog converter includes a clock driver, a first decoder, a second decoder, a current source matrix, a pseudo random mode generator and at least one multiplexer. The first decoder and the second decoder are coupled to the clock driver. The current source matrix is coupled t
8587078 Integrated circuit and fabricating method thereof November 19, 2013
A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The m
8587058 Lateral diffused metal-oxide-semiconductor device November 19, 2013
The present invention provides a lateral diffused metal-oxide-semiconductor device including a first doped region, a second doped region, a third doped region, a gate structure, and a contact metal. The first doped region and the third doped region have a first conductive type, and t
8581338 Lateral-diffused metal oxide semiconductor device (LDMOS) and fabrication method thereof November 12, 2013
A lateral-diffused metal oxide semiconductor device (LDMOS) includes a substrate, a first deep well, at least a field oxide layer, a gate, a second deep well, a first dopant region, a drain and a common source. The substrate has the first deep well which is of a first conductive type.
8580694 Method of patterning hard mask layer for defining deep trench November 12, 2013
A method of patterning a hard mask layer for defining a deep trench is described. A substrate formed with an isolation structure therein is provided. A hard mask layer is formed over the substrate provided. A patterned photoresist layer is formed over the hard mask layer, having ther
8576653 Hidden refresh method and operating method for pseudo SRAM November 5, 2013
In an exemplary hidden refresh method for a pseudo SRAM, a system clock is received. A duty-on period of the system clock signal is adapted for performing a data access operation such as write or read operation. A refresh clock signal subjected to the control of the system clock signal
8575708 Structure of field effect transistor with fin structure November 5, 2013
A method for fabricating a field effect transistor with fin structure includes the following steps. A substrate having an ion well with a first conductivity type is provided, wherein the ion well has a first doping concentration. At least a fin structure disposed on the substrate is
8575691 Lateral-diffusion metal-oxide semiconductor device November 5, 2013
A method for fabricating a lateral-diffusion metal-oxide semiconductor (LDMOS) device is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a first region and a second region both having a first conductive type in the semiconductor substrate, wh
8575683 Semiconductor device and method of fabricating the same November 5, 2013
A method of fabricating a semiconductor device includes the following steps. At first, a semiconductor substrate is provided. A gate stack layer is formed on the semiconductor substrate, and the gate stack layer further includes a cap layer disposed thereon. Furthermore, two first sp
8575043 Semiconductor device and manufacturing method thereof November 5, 2013
A semiconductor device includes a plurality of active areas disposed on a semiconductor substrate. A manufacturing method of the semiconductor device includes performing a first annealing process on the semiconductor substrate by emitting a first laser alone a first scanning direction, a
8574990 Method of manufacturing semiconductor device having metal gate November 5, 2013
The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the
8574978 Method for forming semiconductor device November 5, 2013
A method for forming a semiconductor device includes firstly providing a gate structure disposed on a substrate and a first nitride material layer disposed on the gate structure, secondly performing a protective step to modify the first nitride material layer in the presence of oxygen, t
8569127 Semiconductor device and method for fabricating the same October 29, 2013
A method for fabricating a semiconductor device is described. A substrate having thereon a polysilicon resistor is provided. A dielectric layer is formed over the substrate covering the polysilicon resistor. The dielectric layer is etched to form a contact opening over the polysilicon
8564450 Monitor apparatus and method for detecting movement behavior of object in cylinder October 22, 2013
An object is set to move back and forth between a first position and a second position in a cylinder. A measurement point between the first position and the second position is preset. A counted period indicating a duration that the object moves from the first position to the first me
8564143 Overlay mark for multiple pre-layers and currently layer October 22, 2013
An overlay mark is described, including N (N.gtoreq.2) groups of first x-directional linear patterns each defined from a different one of N pre-layers, N groups of second x-directional linear patterns of a current layer, N groups of first y-directional linear patterns each defined from
8564063 Semiconductor device having metal gate and manufacturing method thereof October 22, 2013
A method of manufacturing a semiconductor device having metal gate includes providing a substrate having at least a dummy gate, a sacrificial layer covering sidewalls of the dummy gate and a dielectric layer exposing a top of the dummy gate formed thereon, forming a sacrificial layer
8300335 Image device having color filter array October 30, 2012
An image device includes a substrate having a die region defined thereon, a layout pattern positioned in the die region, and a color filter array including a plurality of color filters arranged in a matrix in the die region. The die region includes at least a die corner. The color filter
8299555 Semiconductor optoelectronic structure October 30, 2012
A method of fabricating a semiconductor optoelectronic structure is provided. First, a substrate is provided, and a waveguide is formed therein, and then a plurality of dielectric layers is formed on the waveguide. Next, a contact pad and a passivation layer are provided on the diele
8299532 ESD protection device structure October 30, 2012
An ESD protection device structure includes a well having a first conductive type, a first doped region having a second conductive type disposed in the well, a second doped region having the first conductive type, and a third doped region having the second conductive type disposed in
8298950 Method of etching sacrificial layer October 30, 2012
An exemplary method of etching sacrificial layer includes steps of: providing a substrate formed with a sacrificial layer and defined with a first region and a second region, the sacrificial layer disposed in both the first and second regions; forming a hard mask covering the first r
8298935 Dual damascene process October 30, 2012
A dual damascene process is disclosed. The process includes the steps of: forming a dielectric layer on a substrate; forming a first patterned mask on the dielectric layer, wherein the first patterned mask comprises an opening; forming a material layer on the dielectric layer and coverin
8298838 Method for staining sample October 30, 2012
A method for staining a sample includes the following steps. A test device is provided. The test device is sampled to obtain a sample. The sample includes a substrate, an active area disposed within the substrate and having a first doped substrate region and a second doped substrate
8293639 Method for controlling ADI-AEI CD difference ratio of openings having different sizes October 23, 2012
A method for controlling an ADI-AEI CD difference ratio of openings having different sizes is described. The openings are formed through a silicon-containing material layer, an etching resistive layer and a target material layer in turn. Before the opening etching steps, at least one
8288802 Spacer structure wherein carbon-containing oxynitride film formed within October 16, 2012
A spacer structure contains a carbon-containing oxynitride film positioned on a gate sidewall and a nitride film covering the carbon-containing oxide film. The carbon-containing oxynitride film has low etch rate so that the spacer structure can have a good profile during etching the
8288262 Method for fabricating semiconductor device October 16, 2012
A method for fabricating a semiconductor device is described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a
8283941 Alternating current (AC) stress test circuit, method for evaluating AC stress induced hot carrie October 9, 2012
An AC stress test circuit for HCI degradation evaluation in semiconductor devices includes a ring oscillator circuit, first and second pads, and first and second isolating switches. The ring oscillator circuit has a plurality of stages connected in series to form a loop. Each of the
8283093 Optical proximity correction process October 9, 2012
An optical proximity correction process for designing a mask according to a target exposure intensity of each edge of a pattern is provided. Each edge is at a corresponding current edge position which corresponds to a current exposure intensity. The process comprises repeating a converge
8282842 Cleaning method following opening etch October 9, 2012
A cleaning method following an opening etching is provided. First, a semiconductor substrate having a dielectric layer is provided. The hard mask layer includes at least a metal layer. The opening etch is then carried out to form at least an opening in the dielectric layer. A nitroge
8280097 Microelectromechanical system diaphragm and fabricating method thereof October 2, 2012
A microelectromechanical system diaphragm is provided. The microelectromechanical system diaphragm includes a substrate, a first conductive layer, a second conductive layer, a first dielectric layer, and a second dielectric layer. The first conductive layer is disposed on the substra
8278765 Test-key for checking interconnect October 2, 2012
A test key for checking an interconnect structure is described, including a contiguous metal line and multiple conductive plugs on the contiguous metal line, wherein one end of each plug contacts with the contiguous metal line. The other end of at least one plug is not connected to any
8278762 Method of manufacturing photomask and method of repairing optical proximity correction October 2, 2012
A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check is then performed to the graphic data with the optical proximity correction. When at least o
8278761 Circuit layout structure October 2, 2012
A circuit layout structure includes a metal interlayer dielectric layer surrounding a metal interconnect and a metal pattern within a scrub line. The scrub line is in the vicinity of the metal interlayer dielectric layer and the metal interconnect. The metal pattern or the metal inte
8278189 Method for thinning wafer October 2, 2012
The present invention provides a method of thinning a wafer. First, a wafer is provided. The wafer includes an active surface, a back surface and a side surface. The active surface is disposed opposite to the back surface. The side surface is disposed between the active surface and the
8278184 Fabrication method of a non-planar transistor October 2, 2012
A method of forming a non-planar transistor is provided. A substrate is provided. The substrate has a plurality of isolation regions to be formed and a plurality of fin regions to be formed. A first etching process is performed to form a plurality of first trenches having a first depth i
8278166 Method of manufacturing complementary metal oxide semiconductor device October 2, 2012
A method of manufacturing a CMOS device includes providing a substrate having a first region and a second region; forming a first gate structure and a second gate structure, each of the gate structures comprising a sacrificial layer and a hard mask layer; forming a patterned first pr
8277674 Method of removing post-etch residues October 2, 2012
A method of removing post-etch residues is provided. First, a substrate is provided. An isolation layer covers the substrate and a conductive layer is embedded in the isolation layer. A dielectric layer and a hard mask cover the isolation layer. Then, an etching process is performed,
8277567 Method of cleaning turbo pump and chamber/turbo pump clean process October 2, 2012
A method of cleaning a turbo pump is described. The turbo pump is coupled with a CVD chamber of depositing a material and thus accumulates the material therein. The method includes switching off the turbo pump and using another pump to pump a reactive gas, which can react with the ma
8274124 Backside illuminated image sensor September 25, 2012
A backside illuminated (BSI) image sensor including a substrate, a plurality of photosensitive regions, a back-end-of-line (BEOL), a pad, a color filter array, a plurality of micro-lenses and a protection layer is provided. The substrate has a first surface and a second surface. The
8273642 Method of fabricating an NMOS transistor September 25, 2012
A SiC region and a source/drain region are formed such that the SiC region includes a first portion overlapping the source/drain region and a second portion protruding from the source/drain region to a position beneath the LDD region. The concentration of crystalline SiC in the secon
8273631 Method of fabricating n-channel metal-oxide semiconductor transistor September 25, 2012
A method of fabricating an NMOS transistor, in which, an epitaxial silicon layer is formed before a salicide process is performed, then a nickel layer needed for the salicide process is formed, and, thereafter, a rapid thermal process is performed to allow the nickel layer to react w
8269318 MOS device September 18, 2012
A method for forming an offset spacer of a MOS device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; forming a dielectric stack on the substrate and the gate structure, wherein the dielectric stack includes a first dielectric la
8268662 Fabricating method of complementary metal-oxide-semiconductor (CMOS) image sensor September 18, 2012
A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region
8263501 Silicon dioxide film fabricating process September 11, 2012
A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in
8263013 Method for removing micro-bubbles and/or particles from liquid, liquid supply apparatus and imme September 11, 2012
A liquid supply apparatus capable of removing micro-bubbles and particles is described, including a pipe, a laser provider and at least one micro-bubble/particle outlet. The laser provider provides a laser crossing the pipe, wherein the laser is provided in a manner such that a micro
8262915 Method for removing micro-bubbles and/or particles from liquid, liquid supply apparatus and imme September 11, 2012
A liquid supply apparatus capable of removing micro-bubbles and particles is described, including a pipe, a laser provider and at least one micro-bubble/particle outlet. The laser provider provides a laser crossing the pipe, wherein the laser is provided in a manner such that a micro
8252679 Semiconductor process August 28, 2012
A semiconductor process is described. A substrate with at least one conductive region is provided, on which a dielectric layer is formed. An opening is formed in the dielectric layer, such that the conductive region is exposed. A first conductive layer is conformally formed on the su
8252657 Metal gate transistor and resistor and method for fabricating the same August 28, 2012
A method for fabricating metal gate transistor and resistor is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation in the substrate of the resistor region; forming a tank in the shallo
8252650 Method for fabricating CMOS transistor August 28, 2012
A method for fabricating MOS transistor includes the steps of: overlapping a second stress layer on an etching stop layer and a first stress layer at a boundary region of the substrate; forming a dielectric layer on the first stress layer and the second stress layer; performing a fir

 
 
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