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Texas Instruments Incorporated Patents
Assignee:
Texas Instruments Incorporated
Address:
Dallas, TX
No. of patents:
17309
Patents:












Patent Number Title Of Patent Date Issued
8302047 Statistical static timing analysis in non-linear regions October 30, 2012
A method is described for simulating the f-sigma timing path delay of an integrated circuit design when local transistor variations determine the stochastic delay. This is achieved by determining an estimated delay time for a first timing path using non-linear operating point analysis of
8301946 Inverted TCK access port selector with normal TCK data flip-flop October 30, 2012
The disclosure describes a novel method and apparatuses for allowing a controller to select and access different types of access ports in a device. The selecting and accessing of the access ports is achieved using only the dedicated TDI, TMS, TCK, and TDO signal terminals of the device.
8301944 State machine select inputs coupled to TDI, TCK, and TMS October 30, 2012
A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
8301928 Automatic wakeup handling on access in shared memory controller October 30, 2012
A hardware based wake-up scheme initiates memory power-up upon a normal access to a powered down memory. The access that triggered the power-up is buffered. Further accesses are stalled until the memory is completely powered up. The buffered access then proceeds to the memory and the
8301431 Apparatus and method for accelerating simulations and designing integrated circuits and other sy October 30, 2012
A method of accelerating a Monte Carlo (MC) simulation for a system including a first component having a first input parameter and a second component having a second input parameter. The simulation model provided includes a first component model including a first model parameter corr
8301105 Receiver front end October 30, 2012
A low-power receiver front-end includes a transconductance amplifier that produces a single-ended current signal in response to a single-ended voltage signal. An output of the transconductance amplifier is provided to an LC tuned circuit. At resonance, the LC tuned circuit generates a
8300703 System and method for adaptively allocating resources in a transcoder October 30, 2012
An adaptive transcoder is provided that includes a shared memory containing a plurality of decoder buffers to store incoming data packets, a plurality of decoder instances to control a decoding process to generate image raw data based on the incoming data packets, and a plurality of
8300561 Methods and apparatus for canceling distortion in full-duplex transceivers October 30, 2012
Methods and apparatus for canceling distortion in full-duplex transceivers are disclosed. Some example methods to reduce distortion in a full-duplex transceiver include generating a first digital signal, generating a first analog signal based on the first digital signal for transmiss
8300510 Laser diode write driver October 30, 2012
A laser diode write driver is described. This laser diode write driver comprises: a feedback loop coupled for receiving an input current signal, the feedback loop operative for reaching a steady state and comprising a Class AB driver in series with a Class A driver, wherein the feedback
8300451 Two word line SRAM cell with strong-side word line boost for write provided by weak-side word li October 30, 2012
An integrated circuit having a static random access memory (SRAM) includes an array of SRAM cells arranged in rows and columns having a write word line and a read/write word line connected to provide row access to the array of SRAM cells. The SRAM also includes a coupling capacitance
8300446 Ferroelectric random access memory with single plate line pulse during read October 30, 2012
A ferroelectric random access memory (FRAM) with reduced cycle time. During a read cycle, plate line voltages are boosted to a voltage to both transfer charge from the selected row of FRAM cells to corresponding bit lines, and to fully polarize a data state in the selected FRAM cells. In
8299827 High-speed frequency divider and a phase locked loop that uses the high-speed frequency divider October 30, 2012
A frequency divider includes a least significant (LS) stage, multiple cascaded divider stages, and an output stage. The LS stage receives an input signal, a program bit and a first mode signal, and generates a first frequency-divided signal and an output mode signal. Each of the plur
8299612 IC devices having TSVS including protruding tips having IMC blocking tip ends October 30, 2012
A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve, an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to protruding TSV tips is on a portion of the sidewalls of pr
8299588 Structure and method for uniform current distribution in power supply module October 30, 2012
A synchronous Buck converter in a molded package (thickness 101 between 0.8 and 1.0 mm) has vertically assembled control (110) and sync (120) power FET chips and a driver chip (630). The sync chip has one power terminal attached to the leadframe pad (104) and the opposite power termi
8299464 Comparator receiving expected and mask data from circuit pads October 30, 2012
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of t
8298947 Semiconductor device having solder-free gold bump contacts for stability in repeated temperature October 30, 2012
A semiconductor device has a chip (101) with gold studs (212) assembled on a tape substrate (102), which has solder balls (103) for attachment to external parts. The tape substrate (about 30 to 70 .mu.m thick) has on its first surface first copper contact pads (221) covered with a co
8298944 Warpage control for die with protruding TSV tips during thermo-compressive bonding October 30, 2012
A method of fabricating through silicon via (TSV) die includes depositing a first dielectric layer on a substrate that includes a plurality of TSV die. The TSV die have a topside including active circuitry, a bottomside, and a plurality of TSVs including an inner metal core that reaches
8298874 Packaged electronic devices having die attach regions with selective thin dielectric layer October 30, 2012
A method for forming a packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. A second d
8298870 Method for connecting integrated circuit chip to power and ground circuits October 30, 2012
In a method for transferring at least one of power and ground signal between a die and a package base of a semiconductor device, a connector is formed there between. The connector, which is disposed above the die attached to the package base, includes a center pad electrically coupled
8298863 TCE compensation for package substrates for reduced die warpage assembly October 30, 2012
A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom sur
8298854 Method of manufacturing PIN photodiode October 30, 2012
The objective of this invention is to provide a type of photodiode and the method of manufacturing the photodiode characterized by the fact that it has a higher photoelectric conversion efficiency (sensitivity) than that in the prior art. PIN photodiode 100 has a p-type silicon substrate
8297472 Pellet loader with pellet separator for molding IC devices October 30, 2012
A pellet loading apparatus includes a tablet pusher including a support surfaces including a pusher mechanism coupled thereto for vertical movement upon actuation. A tablet holder on the tablet pusher includes locations framed by sidewall members aligned in the vertical direction tha
8296714 System and method for checking analog circuit with digital checker October 23, 2012
Aspects of the present invention provide a system and method for checking a portion of an analog circuit using a digital checker. The method includes establishing a target in the analog circuit, creating an analog target dummy for the target, creating a digital target dummy, binding the
8296701 Method for designing a semiconductor device based on leakage current estimation October 23, 2012
A method of designing a semiconductor device includes preparing a first design for a semiconductor device and estimating leakage current for the first design. The method also includes determining a leakage current cumulative distribution function (CDF) for the first design. The method
8296628 Data path read/write sequencing for reduced power consumption October 23, 2012
A solid-state memory such as a ferroelectric random access memory (FeRAM) with multiplexed internal data bus and reduced power consumption on data transfer. The memory stores data in the form of multi-byte data words with error correction coding (ECC). In a page mode read/write operation
8296614 Moving data through test control register with state machine states October 23, 2012
Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these scan paths improves test access of circuits and cores embedded within ICs and reduces the IC's power consumption during scan
8296607 Serialization module separating pipelined trace-worthy event and sync packet data October 23, 2012
A method and/or a system of a processor-agnostic encoded debug architecture in a pipelined environment is disclosed. In one embodiment, a method of a processor includes processing an event specified by a data processing system coupled to the processor to determine a boundary of the e
8295396 System and method for power control in a wireless transmitter October 23, 2012
A system and method for power control in a wireless transmitter. A power control loop includes a feed forward unit coupled to a data source, the feed forward unit processes a signal for transmission, a feedback unit coupled to the feed forward unit, the feedback unit generates a feedback
8295262 Uplink reference signal for time and frequency scheduling of transmissions October 23, 2012
A method for multiplexing reference signal (RS) transmissions from user equipments (UEs), with the RS having a bandwidth larger than the data signal bandwidth (distributed RS) is provided. A transmission time interval (TTI) comprises of one or more sub-frames and each sub-frame compr
8294473 Cable detector October 23, 2012
A cable detector includes one or more peak detectors that detect when a termination impedance is missing from the output of a line driver. A peak detection signal is asserted when signals on a transmission line exceed a threshold level. A fault condition is asserted when the peak detecti
8294451 Smart sensors for solar panels October 23, 2012
A solar panel smart sensor system is disclosed. The sensor system permits solar power system owners and operators to monitor the voltage of individual panels in a solar array. The system uses a low wire-count bus in which the order of sensors on the bus is automatically determined. A
8294388 Driving system with inductor pre-charging for LED systems with PWM dimming control or other load October 23, 2012
A method includes receiving a control signal associated with a load, where the control signal is to cause a load change from a perspective of a switching-mode power supply. The method also includes causing the power supply to adjust a current through an inductor of the power supply in
8294261 Protruding TSV tips for enhanced heat dissipation for IC devices October 23, 2012
An integrated circuit (IC) device includes a substrate having a top surface including substrate pads, and a through substrate via (TSV) die including a semiconductor substrate including a topside semiconductor surface having active circuitry and a bottomside surface. The topside semi
8294243 Lateral bipolar transistor with compensated well regions October 23, 2012
Conduction between source and drain or emitter and collector regions is an important characteristic in transistor operation, particularly for lateral bipolar transistors. Accordingly, techniques that can facilitate control over this characteristic can mitigate yield loss by promoting the
8294218 Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit October 23, 2012
An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer with electrically active regions in which and on which the MOS device and the bipolar device are formed and electrically
8294210 High voltage channel diode October 23, 2012
A channel diode structure having a drift region and method of forming. A charge balanced channel diode structure having an electrode shield and method of forming.
8293573 Microarray package with plated contact pedestals October 23, 2012
A microarray package includes a leadframe having an array of contact posts, a die carried by the lead frame, and a plurality of bonding wires that electrically connect the die to the lead frame. An encapsulant is included that encapsulates the die, the bonding wire and the leadframe
8291435 JEK class loader notification October 16, 2012
A method and system for performing class loader notification. At least some of the illustrative embodiments are methods comprising raising a notification during execution of a first method (the notification based on an event), identifying the first method, and invoking a second method
8291354 Merging sub-resolution assist features of a photolithographic mask October 16, 2012
Merging sub-resolution assist features includes receiving a mask pattern that includes the sub-resolution assist features. A first sub-resolution assist feature is selected to merge with a second sub-resolution assist feature. A merge bar width of a merge bar is established. A distance
8291254 High speed digital bit stream automatic rate sense detection October 16, 2012
As part of the protocol for Common Public Radio Interface/Open Base Station Architecture Initiative (CPRI/OBSAI) systems, multiple data rates are supported, which are each supported by one or more reference clock frequencies. Traditionally, timing circuits presently used for the phys
8290492 Handover for DVB-H October 16, 2012
A method of wireless handover in a broadcast network (FIGS. 5 and 8) is disclosed. A wireless receiver (FIG. 4) receives a first signal (N) from a first transmitter (f.sub.1). The receiver measures a signal strength (RSSI) of the first signal. The strength of the first signal is compared
8290113 Frequency synthesizer prescaler scrambling October 16, 2012
Various apparatuses, methods and systems for frequency dividing a clock signal are disclosed herein. For example, some embodiments of the present invention provide an apparatus including a plurality of multiplexers connected in series with the clock signal, each having a plurality of
8290098 Closed loop multiple transmit, multiple receive antenna wireless communication system October 16, 2012
A wireless receiver (74) for receiving signals from a transmitter (72). The transmitter comprises a plurality of transmit antennas (TAT.sub.1', TAT.sub.2') for transmitting the signals, which comprise respective independent streams of symbols. Additionally, interference occurs between
8290084 Space time transmit diversity for TDD/WCDMA systems October 16, 2012
A circuit is designed with a matched filter circuit including a plurality of fingers (700, 702, 704) coupled to receive a data symbol. Each finger corresponds to a respective path of the data symbol. Each finger produces a respective output signal. A plurality of decoder circuits (706, 7
8290024 Methods and apparatus to facilitate improved code division multiple access receivers October 16, 2012
Methods and apparatus to facilitate improve code division multiple access (CDMA) receivers are disclosed. An example method disclosed herein comprises: receiving a signal containing first portions that are based on known data and second portions that are based on unknown data; generating
8289832 Input signal processing system October 16, 2012
An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the first input is coupled to receive the input signal; a first resistor coupled to a first input of the first transconductance devi
8289651 Apparatus to control heat dissipation in hard-disk drives October 16, 2012
Methods and apparatus to control heat dissipation in hard-disk drives (HDDs) are disclosed. A disclosed example apparatus comprises a semiconductor die, a ground bump positioned on the die, and a hard-disk drive writer head positioned on the die relative to the ground bump based on a
8289257 Reduced swing differential pre-drive circuit October 16, 2012
A circuit for reducing and offsetting the voltage swing of a differential pre-drive circuit. The circuit includes a first H-bridge of transistors receiving a differential pair of input signals. A swing resister is coupled to the H-bridge for reducing a voltage swing of the differential
8289205 Reacquiring satellite signals quickly October 16, 2012
Embodiments of the invention provide a method of reacquiring satellite signals quickly. A pseudorange of at least one satellite is estimated. A user's position is also estimated. Then a signal from at one or more satellites may be received. By detecting when the user is stationary, the
8289198 Low power bit switches and method for high-voltage input SAR ADC October 16, 2012
A switched capacitor circuit, which may be an SAR ADC, includes a plurality of bit switching circuits (33) each including a high-voltage sampling switch circuit (18) having a first terminal (28) coupled to a first terminal of a corresponding capacitor (22) and a second terminal coupl

 
 
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