| Patent Number |
Title Of Patent |
Date Issued |
| 6456323 |
Color correction estimation for panoramic digital camera |
September 24, 2002 |
| A method for correcting color in a system for creating a panoramic image from a plurality of images taken by a camera. The method comprising the steps of: receiving a color channel from at least a first image and a second image; creating an overlap portion between the first image and |
| 6456148 |
Circuit and method for writing to a memory disk |
September 24, 2002 |
| A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, for selectively providing a current to the write head though the write head terminal. The circuit furthe |
| 6455884 |
Radiation hardened semiconductor memory with active isolation regions |
September 24, 2002 |
| A radiation hardened memory device includes active gate isolation structures placed in series with conventional oxide isolation regions between the active regions of a memory cell array. The active gate isolation structure includes a gate oxide and polycrystalline silicon gate layer |
| 6455412 |
Semiconductor contact via structure and method |
September 24, 2002 |
| A contact opening through an insulating layer is filled with metal and etched back to form a metal plug within the opening. A metal interconnect line can then be formed over the contact, and makes electrical contact with the metal plug. Since the contact opening is filled by the metal |
| 6449710 |
Stitching parcels |
September 10, 2002 |
| The invention provides a method and system for performing instructions in a microprocessor having a set of registers, in which instructions which operate on portions of a register are recognized, and "stitching" instructions are inserted into the instruction stream to couple the inst |
| 6448103 |
Method for making an accurate miniature semiconductor resonator |
September 10, 2002 |
| A cantilevered beam is formed over a cavity to an accurate length by isotropically etching a fast-etching material, such as hydrogen silisquioxane, out of the cavity. The cavity is initially defined within a slow-etching material. The selectivity of the etch rates of the material wit |
| 6442286 |
High security flash memory and method |
August 27, 2002 |
| An integrated circuit includes a sensor that reads a fingerprint and provides data corresponding to the fingerprint to a computation engine coupled to the sensor. The computation engine compares the data to stored data and enables a smart card coupled to the computation engine when the |
| 6440814 |
Electrostatic discharge protection for sensors |
August 27, 2002 |
| A structure and method is disclosed for dissipating electrostatic charges comprising an underlying dielectric layer disposed over capacitor plates of sensor circuitry, and a conductive layer and passivation layers disposed over the underlying dielectric layer wherein the conductive layer |
| 6439464 |
Dual mode smart card and associated methods |
August 27, 2002 |
| A dual-mode IC is provided for operating in first mode such as an ISO mode in accordance with International Standards Organization 7816 (ISO 7816) protocol, and a second, non-ISO mode, such as a USB mode in accordance with Universal Serial Bus (USB) protocol. The dual-mode IC is preferab |
| 6437984 |
Thermally enhanced chip scale package |
August 20, 2002 |
| A heat sink is mounted on an integrated circuit die within a Chip Scale Package, without a substrate supporting the heat sink. The heat sink may be mounted on a central portion of the active surface of the integrated circuit die without impeding wire bond connection of bond pads around |
| 6437583 |
Capacitive distance sensor |
August 20, 2002 |
| A distance sensor has a capacitive element in turn having a first capacitor plate which is positioned facing a second capacitor plate whose distance is to be measured. In the case of fingerprinting, the second capacitor plate is defined directly by the skin surface of the finger being pr |
| 6437525 |
Method and apparatus for spinning a multiphase motor for a disk drive system from an inactive st |
August 20, 2002 |
| A method and apparatus are disclosed for controlling the operation of a multiphase motor, and particular to spinning the motor from an inactive state to an operable state. The method and apparatus include initially sensing an electrical characteristic of one or more phase windings, such |
| 6434665 |
Cache memory store buffer |
August 13, 2002 |
| Methods and an apparatus for storing information in a processing device with flexible security are disclosed. In one embodiment, an apparatus processes back-to-back write and read operations without stalling the processor. A cache memory subsystem buffers write operations between a c |
| 6434189 |
Communications system and method for reducing the effects of transmitter non-linear distortion o |
August 13, 2002 |
| A communications system, a digital modem and method are provided for reducing non-linear distortion generated by a transmitter which adversely affects a receiver attempting to demodulate received data. More specifically, the digital modem includes a controller that controls a receive |
| 6433435 |
Aluminum contact structure for integrated circuits |
August 13, 2002 |
| A method for forming an aluminum contact through an insulating layer includes the formation of an opening. A barrier layer is formed, if necessary, over the insulating layer and in the opening. A thin refractory metal layer is then formed over the barrier layer, and aluminum deposited |
| 6430719 |
General port capable of implementing the JTAG protocol |
August 6, 2002 |
| A memory chip which uses a multi-pin port as a JTAG port includes a JTAG controller, at least one internal block and a configuration unit which selectively configures four pins of the multi-pin port to communicate JTAG data to the JTAG controller or to communicate non-JTAG data to the at |
| 6429737 |
Method and apparatus for multi-channel digital amplification |
August 6, 2002 |
| The invention provides a method and apparatus for the modulation of more than one channel of audio in a digital amplification system. In the preferred embodiment of the invention, pulse width modulator outputs are staggered in time such that at idle only one channel switches states at a |
| 6427194 |
Electronic system and method for display using a decoder and arbiter to selectively allow access |
July 30, 2002 |
| An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the |
| 6426607 |
Programmable system and method for regulating an alternator |
July 30, 2002 |
| A system and method regulates an alternator charging system and includes a memory for storing and regulating voltages used at specific temperatures for the specific alternator charging system requirements of an alternator. A circuit generates a digital signal indicative of both temperatu |
| 6424137 |
Use of acoustic spectral analysis for monitoring/control of CMP processes |
July 23, 2002 |
| Acoustic emission samples for a chemical mechanical polishing process are acquired and analyzed using a Fourier transform to detect wafer vibrations characteristic of scratching. When excess noise levels are detected at frequencies or within frequency bands being monitored, the polishing |
| 6423995 |
Scratch protection for direct contact sensors |
July 23, 2002 |
| In capacitive sensor circuits where physical contact is required and excess pressure may be inadvertently applied to the sensor surface, aluminum is not sufficiently hard to provide "scratch" protection and may delaminate, causing circuit failure, even if passivation integrity remains in |
| 6421626 |
Low voltage/low power temperature sensor |
July 16, 2002 |
| The present invention is a temperature sensor which is based on the actual temperature coefficients of a device in the circuit, rather than a predetermined threshold voltage that varies across different devices. This temperature sensor includes a circuit which determines the temperature |
| 6420764 |
Field effect transitor having dielectrically isolated sources and drains and methods for making |
July 16, 2002 |
| A field-effect transistor and a method for its fabrication is described. The transistor includes a monocrystalline semiconductor channel region overlying and epitaxially continuous with a body region of a semiconductor substrate. First and second semiconductor source/drain regions latera |
| 6418044 |
Method and circuit for determining sense amplifier sensitivity |
July 9, 2002 |
| A dynamic random access memory (DRAM) includes a bit line pair, including a first bit line and a second bit line. Memory cells and a sense amplifier are coupled to the bit lines. A first characterization cell is coupled between the first bit line and a first reference supply line. The fi |
| 6414996 |
System, method and apparatus for an instruction driven digital video processor |
July 2, 2002 |
| The present invention provides a system, method and an apparatus for a digital video processor comprising an error memory and a merge memory, a half pixel filter communicably coupled to the merge memory, a controller communicably coupled to the error memory, the merge memory and the half |
| 6414849 |
Low stress and low profile cavity down flip chip and wire bond BGA package |
July 2, 2002 |
| A low stress, low profile, cavity down wire bond or flip-chip BGA package is formed by injection molding or thermosetting of liquid crystal plastic (LCP) to form a die carrier including a polymer solder grid array (PSGA) of standoff posts formed during molding of the die carrier. The sta |
| 6412047 |
Coherency protocol |
June 25, 2002 |
| A computer system having a memory system where at least some of the memory is designated as shared memory. A transaction-based bus mechanism couples to the memory system and includes a cache coherency transaction defined within its transaction set. A processor having a cache memory is co |
| 6411159 |
Circuit for controlling current levels in differential logic circuitry |
June 25, 2002 |
| A method and circuit are disclosed for controlling the current level of a differential logic circuit having a current source, input transistors which perform current steering based upon the input to the differential logic circuit, and load transistors. The circuit includes a first tr |
| 6410985 |
Silver metallization by damascene method |
June 25, 2002 |
| Silver interconnects are formed by etching deep grooves into an insulating layer over the contact regions, exposing portions of the contact regions and defining the interconnects. The grooves are etched with a truncated V- or U-shape, wider at the top than at any other vertical location, |
| 6408087 |
Capacitive semiconductor user input device |
June 18, 2002 |
| A method of and system for providing user input to a computer, or the like, having a display by detecting a change in fingerprint pattern of a user. The system controls the position of a pointer on a display by detecting motion of ridges and pores of a fingerprint of a user and moving th |
| 6403427 |
Field effect transistor having dielectrically isolated sources and drains and method for making |
June 11, 2002 |
| A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally adjoin opposite sides of the chann |
| 6399961 |
Field effect transistor having dielectrically isolated sources and drains and method for making |
June 4, 2002 |
| A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally adjoin opposite sides of the chann |
| 6395629 |
Interconnect method and structure for semiconductor devices |
May 28, 2002 |
| An improved method for fabricating interconnect signal lines in integrated circuits utilizes variations from standard process conditions to relieve stress during formation of metal signal lines. This prevents AlCu stress migration and TiN ARC cracking caused by subsequent high temperatur |
| 6392636 |
Touchpad providing screen cursor/pointer movement control |
May 21, 2002 |
| A plurality N of capacitance sensing cells are arranged in a row/column array top to cooperate with a fingertip and produce an output signal that controls the movement of a cursor/pointer across a display screen. The output of each individual sensing cell is connected to the correspondin |
| 6392577 |
System and method for regulating an alternator |
May 21, 2002 |
| A system and method regulates an alternator and includes a circuit for digitally generating a sawtooth waveform. An error amplifier circuit generates a divided down and error amplified alternator system voltage. A comparator circuit receives and compares to each other the digitally g |
| 6383905 |
Formation of micro rough poly surface for low sheet resistance salicided sub-quarter micron poly |
May 7, 2002 |
| This invention relates to a method for manufacturing a semiconductor device having polysilicon lines with micro-roughness on the surface. The micro-rough surface of the polysilicon lines help produce smaller grain size silicide graiicide film during the formation phase to reduce the |
| 6381115 |
Redundant electric fuses |
April 30, 2002 |
| A redundant electric fuse circuit is provided that includes a plurality of fuses coupled in series and each having a fuse control device operable for generating a current through each fuse sufficient to blow the fuse. A first fuse control signal is activated to generate a sufficient curr |
| 6380598 |
Radiation hardened semiconductor memory |
April 30, 2002 |
| A radiation hardened memory device having static random access memory cells includes active gate isolation structures to prevent leakage currents between active regions formed adjacent to each other on a substrate. The active gate isolation structure includes a gate oxide and polycrystal |
| 6373737 |
Content addressable memory |
April 16, 2002 |
| A content addressable memory includes a memory array having a plurality of entries. Control circuitry is provided for sequentially presenting each entry in the array to a comparator. An input signal is also provided to the comparator. Entries matching the input signal are identified for |
| 6373650 |
Voice coil motor control circuit having alternative modes of operation and method of operation t |
April 16, 2002 |
| A voice coil motor control circuit provides control signals to a voice coil motor circuit drivel that is coupled to a voice coil motor. A current sensing resistor is coupled in series with the voice coil motor. The control circuit includes a sense amplifier having inputs that couple to |
| 6372543 |
Wrap-around interconnect for fine pitch ball grid array |
April 16, 2002 |
| An apparatus and method for producing a wrap-around interconnect substrate (60) comprising a substrate (42) having semi-circular vias (62) having openings (64) created by separating through cylindrical vias (62) that were positioned along cutting lines (46a, 46b) that formed part of an |
| 6370115 |
Ethernet device and method for applying back pressure |
April 9, 2002 |
| An Ethernet device and the method for applying back pressure within an Ethernet communication network comprising the steps of asserting a back pressure pin of a media access control unit associated with a network communications port of an Ethernet device. In response to asserting the |
| 6369534 |
Circuit and method for detecting backward spin of a spindle motor for a disk drive |
April 9, 2002 |
| A circuit and method are disclosed for determining whether a brushless polyphase motor is spinning in a reverse direction relative to spin direction during normal operation. The circuit receives a back emf signal of a first phase line and determines a polarity of the back emf signal |
| 6366225 |
Circuit and method for determining the phase difference between a sample clock and a sample sign |
April 2, 2002 |
| A phase-calculation circuit includes a buffer, an approximation circuit, and an interpolator. The buffer receives and stores first and second samples of a periodic signal having a peak amplitude. The approximation circuit linearly approximates a portion of the periodic signal, and ca |
| 6365991 |
Method and structure for measurement of a multiple-power-source device during a test mode |
April 2, 2002 |
| A test mode structure and method of a multi-power-source device provides for the device to remain in a test mode, during which current draw of the device may be accurately measured, even after primary power supply to the device has been greatly reduced or completely removed. Significant |
| 6365946 |
Integrated-circuit isolation structure and method for forming the same |
April 2, 2002 |
| An IC isolation structure includes a recess disposed in a conductive layer having a surface portion. The recess has a side wall adjacent to the surface portion, and the isolation structure also includes an insulator disposed in the recess and overlapping the surface portion. Thus, if a |
| 6365496 |
Elimination of junction spiking using soft sputter etch and two step tin film during the contact |
April 2, 2002 |
| A contact opening to a silicon substrate within which a metal contact is to be formed is cleaned by soft sputter etch to clean the substrate surface and remove any residue which would interfere with formation of a continuous silicide layer across the contact region. Contact profile p |
| 6362578 |
LED driver circuit and method |
March 26, 2002 |
| An LED driver circuit and method are disclosed where an array of light emitting diodes have a transistor connected to each respective array of light emitting diodes. A PWM controller has an input for receiving a voltage reference and an output connected to selected transistors for dr |
| 6359819 |
Circuit and method for performing a stress test on a ferroelectric memory device |
March 19, 2002 |
| A circuit and method for performing a stress test on a ferroelectric memory device. The memory device includes a memory cell array having a plurality of row lines, column lines and plate lines. The memory device further includes test circuitry for receiving at least one test control sign |
| 6359743 |
Apparatus and method for reducing thermal interference in MR heads in disk drives |
March 19, 2002 |
| An apparatus (and method) is provided that reduces thermal interference in the read signal of a disk drive. A variable or programmable resistance is used to change the transfer function of a filter in the read channel of the disk drive to filter the read signal. The filter has a first tr |
