| Patent Number |
Title Of Patent |
Date Issued |
| RE36579 |
Sense circuit for reading data stored in nonvolatile memory cells |
February 22, 2000 |
| A sense circuit for reading EPROM and ROM type memory cells employs a circuit for generating an offsetting current which is exempt of error during transients and which thus permits to achieve a reduced access time. On the other hand, the sense circuit maintains the intrinsic advantages o |
| RE36508 |
Method of automatically measuring the horizontal scan frequency of a composite synchronism signa |
January 18, 2000 |
| A method of automatically measuring the horizontal scan frequency of a composite synchronism signal, comprising horizontal synchronization impulses at line frequency, consists of first performing a count of a number of impulses having a repeat frequency higher than said line frequenc |
| RE36311 |
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure |
September 21, 1999 |
| A description is given of two versions of an integrated structure in the emitter switching configuration comprising a high-voltage bipolar power transistor and a low-voltage MOS power transistor. In the vertical MOS version, the emitter region of the bipolar transistor is completely |
| RE36123 |
Circuit for the generation of a scanning clock in an operational analysis device of the serial t |
March 2, 1999 |
| The circuit comprises a first switching circuit which receives at an input a system clock normally provided for the operation of the integrated circuit and produces at an output a machine clock normally coincident with the system clock, circuitry for clamping the first switching circuit |
| RE36046 |
Drive circuit for inductive loads, particularly for fuel injectors |
January 19, 1999 |
| .[.A circuit comprising a switch series connected to a load; a first and second current recirculating branch alternately connectable parallel to the load, for reducing the current in the same; and a logic control unit for opening and closing the switch and recirculating branches, so that |
| RE35827 |
Surface field effect transistor with depressed source and/or drain areas for ULSI integrated dev |
June 23, 1998 |
| A surface field effect integrated transistor has the surface of the silicon in the source and drain areas lowered by 50-500 nm in respect to the surface of the silicon underneath the gate electrode by etching the silicon substrate before forming the source and drain junctions.The transis |
| RE35806 |
Multipurpose, internally configurable integrated circuit for driving a switching mode external i |
May 26, 1998 |
| A multipurpose integrated circuit for driving in a switching mode an externally connected load or loads permits implementation of any appropriate supply scheme of the external load or loads through six output terminals thereof and is therefore useful in a large number of applications |
| RE35745 |
Device for generating a reference voltage for a switching circuit including a capacitive bootstr |
March 17, 1998 |
| This device for generating a reference voltage for a capacitive bootstrap circuit of an output stage can be easily integrated. The output stage comprises a driving block, a capacitive bootstrap circuit and a reference voltage generating block generating a floating reference voltage which |
| RE35642 |
Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure |
October 28, 1997 |
| A description is given of two versions of an integrated structure in the emitter switching configuration comprising a high-voltage bipolar power transistor on a low-voltage MOS power transistor. In the vertical MOS version, the emitter region of the bipolar transistor is completely b |
| RE35588 |
Broad operational range, automatic device for the change of frequency in the horizontal deflecti |
August 19, 1997 |
| A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit incorporating,a frequency meter being input and analog synchronization signal.a phase comparator having two inputs and in tur |
| RE35582 |
Subscriber line interface circuit with power-down mode |
August 12, 1997 |
| A method of lowering the power absorbed by an interface circuit, in the "power-down" state thereof, as incorporated to a telephone exchange and connected to a telephone subscriber line, being of a type which comprises a monitoring circuit portion connected between the line and the exchan |
| RE35494 |
Integrated active low-pass filter of the first order |
April 22, 1997 |
| An integrated, low-pass filter of the first order made using the switched capacitors technique utilizes advantageously a single switched capacitor and only two switches in contrast to the filters of the prior art which utilize two switched capacitors and four switches. The filter of the |
| RE35486 |
Circuital arrangement for preventing latchup in transistors with insulated collectors |
April 1, 1997 |
| A circuital arrangement which comprises a vertical PNP transistor with insulated collector, which has a P-type collector structure surrounded by an N-type well and forms a junction therewith. In order to prevent latch-ups of the parasite SCR which is formed by the structure of the ve |
| RE35472 |
High speed analog-to-digital converter using cells with back-to-back capacitors for both rough a |
March 11, 1997 |
| A high conversion speed analog-to-digital converter is constituted by a plurality of comparison cells which in successive steps determine first the four most significant bits of the analog-to-digital conversion and then the least significant bits of the same, having first accomplished th |
| RE35442 |
Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar tra |
February 4, 1997 |
| A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "c |
| RE35434 |
Bipolar-MOS comparator circuit with saturation prevention |
January 28, 1997 |
| An electronic comparator circuit having a high speed during switch phase and combining the advantages of bipolar technology with those of CMOS technology. The circuit consists of a differential stage input circuit having a differential pair of bipolar transistors forming its outputs. The |
| RE35379 |
Completely differential filter with switched condensers using CMOS operational amplifiers with n |
November 19, 1996 |
| The filter comprises at least one completely differential operational amplifier having two inputs and two outputs and at least one pair of feedback circuits connecting said outputs with respective inputs of said amplifier outside of same. The operational amplifier has no common-mode |
| RE35041 |
Inductance and capacitance charge pump circuit for driving power MOS transistor bridges |
September 26, 1995 |
| The circuit comprises a tank capacitance and a charge circuit supplied with the same voltage as the bridge and comprising an inductance and a control transistor. There is also provided a control circuit, which comprises an oscillator controlling the periodic switching of control transist |
| D408787 |
Adaptor for a motor vehicle lighter socket |
April 27, 1999 |
|
| D394641 |
Battery charger |
May 26, 1998 |
|
| 6973056 |
Information transmitting and receiving method and corresponding transmitter and receiver |
December 6, 2005 |
| In transmission systems whereby data packets of a single type and having a fixed structure are used to transmit a given type of information, the invention optimizes the transmission by utilizing data packets of the same type to transmit information of different types and by differentiati |
| 6841445 |
Method of making floating gate non-volatile memory cell with low erasing voltage having double l |
January 11, 2005 |
| A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer of gate oxide. The gate oxide |
| 6710394 |
Method of making floating gate non-volatile memory cell with low erasing voltage having double l |
March 23, 2004 |
| A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer of gate oxide. The gate oxide |
| 6590247 |
MOS capacitor with wide voltage and frequency operating ranges |
July 8, 2003 |
| A MOS capacitor comprises a semiconductor substrate, a first well region of a first conductivity type formed in the substrate, at least one doped region formed in the first well region, and an insulated gate layer insulatively disposed over a surface of the first well region. The at |
| 6570216 |
EEPROM having a peripheral integrated transistor with thick oxide |
May 27, 2003 |
| A process for manufacturing an integrated circuit provides for the formation of a matrix of floating-gate non-volatile memory cells having dual polysilicon levels, with the two polysilicon levels being isolated by a gate dielectric layer (4) and an interpoly dielectric layer (9) ther |
| 6566690 |
Single feature size MOS technology power device |
May 20, 2003 |
| A MOS technology power device includes a semiconductor material layer of a first conductivity type, a conductive insulated gate layer covering the semiconductor material layer, and a plurality of elementary functional units. The conductive insulated gate layer includes a first insulating |
| 6531714 |
Process for the production of a semiconductor device having better interface adhesion between di |
March 11, 2003 |
| A method for manufacturing a semiconductor device having improved adhesion at an interface between layers of dielectric material, comprising the steps of forming a first layer of dielectric material on at least one part of a structure defined in a semiconductor substrate and forming a se |
| 6472244 |
Manufacturing method and integrated microstructures of semiconductor material and integrated pie |
October 29, 2002 |
| The method inlcudes the steps of forming a sacrificial buried region of insulating material on a substrate of monocrystalline semiconductor material, epitaxially growing a first semiconductor material layer on the substrate, the first semiconductor material layer including a polycrys |
| 6468866 |
Single feature size MOS technology power device |
October 22, 2002 |
| A MOS technology power device comprises a semiconductor material layer of a first conductivity type, a conductive insulated gate layer covering the semiconductor material layer, and a plurality of elementary functional units. The conductive insulated gate layer includes a first insulatin |
| 6465950 |
Method of fabricating flat fed screens, and flat screen obtained thereby |
October 15, 2002 |
| The microtips of charge emitting material, which define the cathode of the flat FED screen and face the grid of the screen, are tubular and have portions with a small radius of curvature. The microtips are obtained by forming openings in the dielectric layer separating the cathode connec |
| 6465840 |
Integrated structure comprising a patterned feature substantially of single grain polysilicon |
October 15, 2002 |
| The electrical performance of a dielectric film for capacitive coupling in an integrated structure is enhanced by forming the polycrystalline electrically conductive layer coupled with the dielectric film substantially unigranular over the coupling area, commonly to be defined by pat |
| 6438669 |
Timesharing internal bus, particularly for non-volatile memories |
August 20, 2002 |
| A non-volatile memory device that comprises an internal bus for the transmission of data and other information of the memory to output pads; a timer; and an enabling/disabling circuit for enabling and disabling access to the internal bus; the timer controlling the internal bus to transmi |
| 6424958 |
Coding and storing method for fuzzy logic rules and circuit architecture for processing such rul |
July 23, 2002 |
| The invention relates to a method of coding and storing fuzzy logic rules, and to a circuit architecture for processing such rules. The method provides for at least one inference rule of the IF/THEN type, having a predetermined number of antecedent parts of fuzzy variables and at least |
| 6417021 |
Method of fabricating a piezoresistive pressure sensor |
July 9, 2002 |
| The pressure sensor is integrated in an SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements and the electronic com |
| 6407594 |
Zero bias current driver control circuit |
June 18, 2002 |
| Static current consumption in a low-side output drive stage is eliminated by employing a switch in series with a current generator that is employed for controlling the discharge process of the driving node (gate) of the output power transistor and by controlling the switch with the volta |
| 6399444 |
Method of making floating gate non-volatile memory cell with low erasing voltage |
June 4, 2002 |
| A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer of gate oxide. The gate oxide |
| 6392469 |
Stable reference voltage generator circuit |
May 21, 2002 |
| A circuit for generating a stable reference voltage (Vref) as temperature and process parameters vary, including at least one field-effect transistor (M1) and an associated resistive bias element (R) connected in series between a supply voltage (Vcc) and ground (GND), further includes a |
| 6380789 |
Switched input circuit structure |
April 30, 2002 |
| A switched input circuit structure of the type which includes an input terminal receiving an input voltage and an output terminal connected to an input capacitor. An operational amplifier is included having a non-inverting terminal connected to a ground reference terminal, an inverti |
| 6377053 |
Device for detecting short-circuits |
April 23, 2002 |
| The short-circuit detecting device includes a current generator for generating a current (I.sub.IN) of predetermined intensity, selectively into or out of the terminal (IN), and a first voltage comparator connected to the terminal (IN) and connected to the current generator in a manner |
| 6359503 |
Basic cell for programmable analog time-continuous filter |
March 19, 2002 |
| An elementary cell structure for programmable time-continuous analog filters and in particular for the processing of analog signals in read/write operations on magnetic supports comprises an amplifier stage provided with a pair of structurally identical transconductance half-cells co |
| 6353243 |
Process for manufacturing an integrated circuit comprising an array of memory cells |
March 5, 2002 |
| A process for manufacturing an integrated circuit comprising an array of memory cells, providing for: a) forming in a memory cell array area of a semiconductor layer (6) an active area for the memory cells; b) forming over said active area for the memory cells a gate oxide layer (8); c) |
| 6350676 |
Method of forming high-stability metallic contacts in an integrated circuit with one or more met |
February 26, 2002 |
| A method of forming high-stability metallic contacts in an integrated circuit with one or more metallized layers wherein, after a preliminary step of providing contact holes in a layer of dielectric material: a prebarrier layer of Ti or TiN is formed overall; a layer of tungsten is f |
| 6332136 |
Fuzzy filtering method and associated fuzzy filter |
December 18, 2001 |
| The fuzzy filtering of a noise signal comprising a plurality of signal samples [s(t,k)] is carried out using as variables the variation of the signal in the considered window and the distance of the samples from a sample to be reconstructed, to distinguish the typical variations of the |
| 6326271 |
Asymmetric MOS technology power device |
December 4, 2001 |
| A MOS technology power device comprises a semiconductor substrate, a semiconductor layer of a first conductivity type superimposed over the semiconductor substrate, an insulated gate layer covering the semiconductor layer, a plurality of substantially rectilinear elongated openings p |
| 6320792 |
Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corre |
November 20, 2001 |
| The invention relates to a row decoding circuit for an electrically programmable and erasable semiconductor non-volatile storage device of the type which includes a matrix of memory cells laid out as cell rows and columns and is divided into sectors, said circuit being input row decode |
| 6320219 |
Memory cell for EEPROM devices and corresponding fabricating process |
November 20, 2001 |
| A memory cell of the EEPROM type formed on a semiconductor material substrate having a first conductivity type includes a drain region having a second conductivity type and extending at one side of a gate oxide region which includes a thin tunnel oxide region. The memory cell also in |
| 6307426 |
Low voltage, band gap reference |
October 23, 2001 |
| A voltage, replica of the difference between two dissimilar base-emitter voltages in the form of an intrinsic input offset voltage of a differential input pair of transistors of a noninverting, buffer-configured operational amplifier, is summed with a pre-established fraction of a ba |
| 6281566 |
Plastic package for electronic devices |
August 28, 2001 |
| A semiconductor electronic device comprises a chip of a semiconductor material, a set of metal conductors adjacent to the plate, a set of wire leads joining selected points on the chip to the metal conductors, and a supporting metal plate formed of three portions having a total surface |
| 6262480 |
Package for electronic device having a fully insulated dissipator |
July 17, 2001 |
| A method for forming a package of plastic material for a semiconductor electronic device having heat sink fully embedded within the package plastic case, is of the type which provides for forming the plastic case within a mold on whose interior a heat sink has been placed which has a |
| 6256617 |
Fuzzy logic electronic processor |
July 3, 2001 |
| A processor operating in a fizzy logic's mode and including a fuzzyfication unit receiving a plurality of input variables on its input and being adapted to compute a membership value of such variables in a membership function, a processing unit connected downstream of the fuzzyfication u |
