| Patent Number |
Title Of Patent |
Date Issued |
| 7376016 |
Method of writing to non-volatile semiconductor memory device storing information depending on v |
May 20, 2008 |
| In a flash memory, after an initial write operation ends, each bit line associated with a memory cell subjected to a write is precharged and each bit line associated with a memory cell that is not subjected to the write is discharged and verified to detect a memory cell low in threshold |
| 7376015 |
Nonvolatile memory, semiconductor device, and method of programming to nonvolatile memory |
May 20, 2008 |
| Disclosed is a nonvolatile memory with a shortened total write time, capable of stably writing data by making a write current constant while reducing fluctuations in a voltage generated by a booster circuit. In a nonvolatile memory such as a flash memory, data is determined at the time |
| 7376005 |
Thin film magnetic memory device including memory cells having a magnetic tunnel junction |
May 20, 2008 |
| In a tunneling magneto-resistance element, first and second free magnetic layers have a magnetization direction according to storage data. The first and second magnetic layers are arranged with an intermediate layer interposed therebetween. The intermediate layer is formed from a non |
| 7376002 |
Semiconductor memory device |
May 20, 2008 |
| In a multiport SRAM memory cell of the present invention, an access transistor of a first port is disposed in a p-type well, and an access transistor of a second port is disposed in a p-type well. The gates of all of transistors disposed in a memory cell extend in the same direction. |
| 7375545 |
Semiconductor device with bus terminating function |
May 20, 2008 |
| The distance between a drain contact and gate electrode in a terminating transistor, which couples a termination resistor connected to an output terminal to a power source node, is set shorter than in an output transistor, which drives an output node in accordance with an internal si |
| 7375399 |
Semiconductor memory device |
May 20, 2008 |
| The present invention is a semiconductor memory device having a logic block and a memory block on the same chip. In the memory device, unit memory cells each include at least two transistors, one of which is a write transistor for storing an electric charge into and releasing it from |
| 7375037 |
Fabrication method for semiconductor integrated circuit device |
May 20, 2008 |
| To improve the shape of a gate electrode having SiGe, after patterning a gate electrode 15G having an SiGe layer 15b by a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF.sub.3 gas. Thereby, the gate electrode 15G can be formed withou |
| 7375013 |
Semiconductor integrated circuit device and process for manufacturing the same |
May 20, 2008 |
| Formation of an WN.sub.X film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WN.sub.X film 24 is suppressed in the heat treatment s |
| 7374973 |
Manufacturing method of semiconductor device and manufacturing method of lead frame |
May 20, 2008 |
| Improvement in the reliability of a semiconductor device is aimed at. By heating a lead frame, after preparing a lead frame with a tape, until a resin molding is performed, at the temperature 160 to 300.degree. C. (preferably 180 to 300.degree. C.) for a total of more than 2 minutes in |
| 7374970 |
Manufacturing method of a tray, a socket for inspection, and a semiconductor device |
May 20, 2008 |
| The yield of semiconductor devices is to be enhanced. A tray is provided with a plurality of pockets each capable of accommodating a wafer level CSP, and each of the pockets is provided with a base for supporting a plurality of bumps of the wafer level CSP and side walls formed around |
| 7374965 |
Manufacturing method of semiconductor device |
May 20, 2008 |
| A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to |
| 7373577 |
CAN system |
May 13, 2008 |
| Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller incorporates error data into receive data or send data, based on error data information st |
| 7372882 |
Driving circuit for and semiconductor device for driving laser diode |
May 13, 2008 |
| A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) |
| 7372741 |
Nonvolatile memory apparatus having a processor and plural memories one or more of which is a no |
May 13, 2008 |
| A nonvolatile memory apparatus which includes plural memories one of which is a nonvolatile memory such as a Flash EEPROM capable of being specified a plurality of operations from a processing unit of the apparatus including an erase operation, the erase operation in the nonvolatile |
| 7372726 |
Semiconductor memory |
May 13, 2008 |
| A phase-change memory for employing chalcogenide as a recording medium is disclosed, which prevents the read disturbance from being generated, and reads data at high speed. In a phase-change memory cell array including a selection transistor and chalcogenide, a substrate potential of the |
| 7372555 |
Method of fabrication of semiconductor integrated circuit device |
May 13, 2008 |
| In the fabrication of a semiconductor integrated circuit device, a 2D-3D inspection technique for solder printed on a substrate is provided which permits easy preparation of data and easy visual confirmation of a defective portion. In a substrate inspecting step, first, a 3D inspection |
| 7372245 |
Semiconductor integrated circuit |
May 13, 2008 |
| A difference between both emitter voltages of a first transistor having an emitter through which a first current flows, and at least one second transistor having an emitter through which such a second current as to reach a current density thereof smaller than that of the emitter of the |
| 7372159 |
Semiconductor device |
May 13, 2008 |
| A glass-sealed type semiconductor device has Dumet electrodes, a glass sealing member, and a semiconductor element tightly sealed in a cavity constituted by the Dumet electrodes and the glass sealing member. The semiconductor element is constituted by a Schottky barrier diode. Extern |
| 7372154 |
Semiconductor device |
May 13, 2008 |
| As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to |
| 7371681 |
Method of manufacturing a semiconductor device |
May 13, 2008 |
| An electrode on a semiconductor substrate includes a polysilicon layer, a silicon-implanted layer on the polysilicon layer, a tungsten nitride layer on the silicon-implanted layer, a tungsten nitride layer on the silicon-implanted layer, and a tungsten layer on the tungsten nitride l |
| 7371631 |
Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconduct |
May 13, 2008 |
| For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory co |
| 7371613 |
Semiconductor device and method of manufacturing the same |
May 13, 2008 |
| A semiconductor device manufacturing method capable of improving the semiconductor device manufacturing yield is disclosed. Semiconductor chips are mounted respectively over semiconductor device regions of a matrix wiring substrate having plural semiconductor device regions, followed |
| 7371606 |
Manufacturing method of a semiconductor device |
May 13, 2008 |
| The yield of a sealing process for a semiconductor device which adopts a flip-chip mounting method is to be improved. In a molding process wherein plural semiconductor chip ICs mounted on a parts mounting surface of a substrate matrix through bump electrodes are to be sealed all together |
| 7370168 |
Memory card conforming to a multiple operation standards |
May 6, 2008 |
| The invention intends to provide a memory card conforming to an HS-MMC mode in a standard of a multimedia card, while securing compatibility of both standards of the multimedia card and an SD card. In a normal MMC mode, the data is outputted at a fall edge of a clock signal. A frequency |
| 7370131 |
High-speed data readable information processing device |
May 6, 2008 |
| A CAN module receives a message from a CAN bus to store the same in a message box unit of a message box. A reception request signal is output from the message box unit to a DMAC/IF. The DMAC/IF outputs a 7-bit encoded address together with a transfer request signal. A DMAC accesses a |
| 7369817 |
Semiconductor integrated circuit |
May 6, 2008 |
| A pin layout which prevents degradation of a frequency characteristic of a low noise amplifier and a receiving mixer included in a semiconductor integrated circuit for dual-band transmission/reception wherein the circuit of the low noise amplifier is provided at a position where the |
| 7369429 |
Non-volatile memory device having toggle cell |
May 6, 2008 |
| A tunneling magneto-resistance element is arranged on an upper layer side of a digit line. The tunneling magneto-resistance element is electrically coupled to a source/drain region of an access transistor through a strap and a contact hole. A bit line is electrically coupled to the tunne |
| 7368996 |
High frequency power amplifier |
May 6, 2008 |
| Disclosed is a power amplifier having highly stable and excellent controllability, and having low noise in comparison with conventional power amplifiers. With the power amplifier, a differential amplifier made up of transistors Q1, Q2 is provided in the initial stage thereof, and bal |
| 7368988 |
High-frequency power amplifier |
May 6, 2008 |
| In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit |
| 7368776 |
Semiconductor device comprising a highly-reliable, constant capacitance capacitor |
May 6, 2008 |
| A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower |
| 7366965 |
Semiconductor integrated circuit |
April 29, 2008 |
| Test functions are expanded by adopting a self test part, and circuit scale is reduced by adding the self test part. A semiconductor integrated circuit includes a memory that includes plural memory banks and is accessed by specifying a bank address, an X address, and a Y address, and |
| 7366489 |
Mobile communication apparatus |
April 29, 2008 |
| A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each |
| 7366034 |
Nonvolatile memory |
April 29, 2008 |
| For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address tran |
| 7366019 |
Nonvolatile memory |
April 29, 2008 |
| There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing th |
| 7366015 |
Semiconductor integrated circuit device, production and operation method thereof |
April 29, 2008 |
| A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot |
| 7365578 |
Semiconductor device with pump circuit |
April 29, 2008 |
| In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC |
| 7365433 |
High-frequency semiconductor device and method of manufacturing the same |
April 29, 2008 |
| The object of the present invention is to implement an enhancement in a noise eliminating characteristic of a wiring compatibly with promotion of microfabrication and simplification of a manufacturing process. Upper and side surfaces of a wiring (6) for transmitting a signal are continuo |
| 7365426 |
Semiconductor device |
April 29, 2008 |
| In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are ele |
| 7365376 |
Semiconductor integrated circuit |
April 29, 2008 |
| A semiconductor integrated circuit effectively makes use of wiring channels of wiring formed by a damascene method. When first cells are used, since the M1 power source lines are laid out at positions spaced away from a boundary between the cells, the power source lines are not combi |
| 7363466 |
Microcomputer |
April 22, 2008 |
| A built-in memory is divided into the following two types: first memories 5 and 7 and second memories 4 and 6, and made accessible in parallel by third buses XAB and XDB and second buses YAB and YDB respectively. Thereby, a CPU core 2 can simultaneously transfer two data values from |
| 7363207 |
Simulator for a chemical mechanical polishing |
April 22, 2008 |
| A simulator is provided which can simulate in consideration of various parameters in a CMP process. A pattern density two-dimensional distribution calculating part takes a pattern density two-dimensional distribution image. A mesh adjusting part performs a mesh adjustment of a measur |
| 7362617 |
Nonvolatile semiconductor memory device and method of rewriting data thereof |
April 22, 2008 |
| The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing dat |
| 7362194 |
Oscillator circuit and L load differential circuit achieving a wide oscillation frequency range |
April 22, 2008 |
| An oscillator circuit is formed of a differential LC resonant circuit formed of an L load differential circuit including inductance-variable portions and a capacitor element, and a positive feedback circuit formed of N-channel MOS transistors. The inductance-variable portion is confi |
| 7361557 |
Insulated gate type semiconductor device and method for fabricating the same |
April 22, 2008 |
| In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pil |
| 7360713 |
Semiconductor device |
April 22, 2008 |
| A semiconductor device includes external interface terminals and processing circuits, and couples to an operating power source when detachably set in a host equipment. Power source feeding terminals (VCC, VSS) among the external interface terminals are long enough to keep touching th |
| 7359678 |
Signal processing semiconductor integrated circuit device and wireless communication system |
April 15, 2008 |
| The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the sub |
| 7359471 |
Data communication method and data communication device and semiconductor device |
April 15, 2008 |
| The present invention provides a data communication method and a data communication device capable of performing high-speed data communication by using a parallel link and higher-speed data communication by reducing a timing skew. A data communication method includes: a step of encoding |
| 7359249 |
Nonvolatile semiconductor memory device and method of rewriting data thereof |
April 15, 2008 |
| The nonvolatile semiconductor memory device of the present invention includes a memory cell array wherein data is stored in a nonvolatile state based on a difference in memory information between two memory cells comprising a memory cell pair, and a writing controller for writing dat |
| 7359244 |
Non-volatile semiconductor memory device and semiconductor disk device |
April 15, 2008 |
| A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based u |
| 7358953 |
Semiconductor device and testing method of semiconductor device |
April 15, 2008 |
| A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functio |
