| Patent Number |
Title Of Patent |
Date Issued |
| 7436837 |
Packet forwarding device and method |
October 14, 2008 |
| The packet forwarding device and method of the invention assign a virtual port number to each peripheral interface. The device and method can recognize and process the packets coming from or transferred to the virtual port according to the packet direct forward function of the forwar |
| 7436787 |
Transceiver for full duplex communication systems |
October 14, 2008 |
| A transceiver in a full duplex communication system includes a transmitting circuit coupled to a channel for transmitting a transmit signal to the channel, a cancellation signal generator coupled to the channel for generating a cancellation signal according to the transmit signal, an |
| 7436752 |
Method and apparatus for signal equalization in a light storage system |
October 14, 2008 |
| A method and apparatus for signal equalization in a light storage system is disclosed. The method includes observing run length of an RF signal read from the optical disc; classifying run lengths into sets; calculating the mean of certain run lengths; comparing the values with expect |
| 7436747 |
Detector and method for detecting synchronization signals in disc system |
October 14, 2008 |
| A detector and a method for detecting synchronization signals in a disc system are disclosed. The method includes sampling a disc signal with a sampling clock to generate a plurality of sampled data, comparing the plurality of sampled data with a predetermined synchronization pattern to |
| 7406144 |
Clock generator circuit using phase modulation technology and method thereof |
July 29, 2008 |
| A clock generator circuit, comprising: a multi-phase clock signal generator for generating a plurality of clock signals having a same frequency but difference phases according to a reference clock signal; a modulation device for generating a phase modulation signal through Delta-Sigm |
| 7406137 |
Carrier recovery system and method thereof |
July 29, 2008 |
| A carrier recovery system includes an in-phase mixer for mixing an incoming signal with an in-phase reference signal to produce an in-phase baseband signal; a quadrature-phase mixer for mixing the incoming signal with a quadrature-phase reference signal to produce a quadrature-phase |
| 7406127 |
Boundary tracking apparatus and related method of OFDM system |
July 29, 2008 |
| A boundary tracking method applied in an OFDM receiver includes generating a plurality of demodulated signal sets corresponding to part of sub-carriers of a packet according to different boundaries with different positions located at the packet, determining the most precise one of the |
| 7406062 |
Method for selecting a channel in a wireless network |
July 29, 2008 |
| A method for selecting one channel from a plurality of channels in a wireless network system is disclosed. The channels include at least one in-use channel, a first idle channel, and a second idle channel. The method includes comparing the frequency band of the in-use channel with th |
| 7405765 |
Method and apparatus for de-interlacing video data |
July 29, 2008 |
| The invention relates to a method and an apparatus for de-interlacing video data by utilizing motion compensation. The method includes performing an operation of motion estimation on a first pixel of the first field and a second target field to generate a first motion vector, wherein |
| 7405604 |
Variable delay clock circuit and method thereof |
July 29, 2008 |
| An apparatus for generating an output clock is disclosed. The apparatus comprises: N variable offset clock circuits for receiving N input clocks and for generating N intermediate clocks having N phase offsets controlled by N intermediate signals, respectively, where N>1; a clock m |
| 7404094 |
Relay set in network device and method thereof |
July 22, 2008 |
| A relay set in a network device. The relay includes a first switch, a switch control unit, and a first AC coupling unit. The first switch is coupled between a first receiving end of the network device and a first transmitting end of the network device. The switch control unit is conf |
| 7403362 |
Latch-up restistant ESD protection circuit and method thereof |
July 22, 2008 |
| The present invention is to provide a latch-up resistant electrostatic discharge (ESD) protection circuit and method thereof, which comprises a clamping circuit being able to discharge when activated, a sustaining unit for directing electrostatic charge via said sustaining unit to said |
| 7403064 |
Dynamically accelerated operational amplifier and method thereof |
July 22, 2008 |
| An operational amplifier is dynamically accelerated depending on its internal state. Acceleration is disabled when the internal state indicates a risk of instability. When the internal state of the operational amplifier indicates no risk of instability, the acceleration is turned on |
| 7403059 |
Baseline wandering correction device and method |
July 22, 2008 |
| A baseline wandering correction device for correcting baseline wandering of signals at a first output terminal and a second output terminal of a receiver includes: a control circuit for outputting a control signal according to voltages of the first and the second output terminals and a |
| 7402988 |
Switching regulator |
July 22, 2008 |
| A switching regulator includes a reference voltage generator and a switching-regulating module. The reference voltage generator receives a digital control signal and generates a reference voltage according to the digital control signal. The switching-regulating module is connected to |
| 7391828 |
Symbol boundary detection device and method for use in OFDM system |
June 24, 2008 |
| A symbol boundary detection device and a method thereof for use in a receiver of a multi-channel communication system. The device utilizes a threshold to make an auxiliary judgement so as to select a proper symbol boundary reference point within an early range. The threshold may be f |
| 7388909 |
Initialization method for a network system |
June 17, 2008 |
| An initialization method for a network system is disclosed, which uses a channel estimation to predetermine coefficients of an FFE and an FBE. As such, convergence of the FFE, the FBE, a timing recovery, an echo canceller and a NEXT canceller is speeded up. Also, interaction of the c |
| 7388407 |
Variable delay clock synthesizer |
June 17, 2008 |
| In an embodiment, a fine resolution of variable clock delay is implemented using a variable DC offset having fine resolution. The proportional ratio between the DC offset and the phase delay/advance of the clock is calibrated in a closed-loop manner. In another embodiment, in a calib |
| 7385983 |
Network address-port translation apparatus and method |
June 10, 2008 |
| A NAPT apparatus and method implemented with hardware circuits inside a network switch controller is provided. The NAPT apparatus comprises: a translation table for storing related information of NAPT connections; an IP table for storing available translated IPs; a packet parser for |
| 7383528 |
Method for checking an IC layout |
June 3, 2008 |
| A method of the invention is used for checking a wire layout causing high wire resistance. The method includes the steps of: selecting a first metal layer, a second metal layer and a third metal layer, wherein each of the first and third metal layer includes a power wire for transmitting |
| 7382203 |
Voltage controlled oscillator and delay circuit thereof |
June 3, 2008 |
| A delay circuit, which is included in a ring oscillator, comprises a current source for providing a current; a first circuit coupled to the current source for receiving an input signal and producing an output signal; a second circuit coupled to the current source and the first circui |
| 7382163 |
Phase frequency detector used in digital PLL system |
June 3, 2008 |
| A phase frequency detector includes a phase error detector outputting a phase error signal according to a first input signal and a second input signal; a phase error judgment unit outputting a phase error judgment signal according to the first input signal and the second input signal; |
| 7378875 |
Compensation circuits for unequal input/output common mode voltages |
May 27, 2008 |
| A circuit apparatus having compensation circuits for unequal input/output common mode voltages is presented. The apparatus includes a circuit unit, a feedback path and a current source. The circuit unit has at least an input terminal for receiving an input signal and at least an output |
| 7375729 |
Animation display apparatus and method |
May 20, 2008 |
| An animation display device, which is a dedicated hardware circuit implemented in an integrated circuit, includes a control register for storing a plurality of control bits, an image memory for storing image data, and a processing unit coupled to the control register and the image da |
| 7375577 |
Mixer capable of detecting or controlling common mode voltage thereof |
May 20, 2008 |
| A mixer capable of detecting or controlling a common mode voltage thereof, includes at least: a mixing module for mixing a first set of differential signals and a second set of differential signals to generate at least one mixed signal; and a compensation module for compensating at least |
| 7373617 |
Chip design-in aid apparatus and method thereof |
May 13, 2008 |
| A chip design-in aid system, wherein the chip has a plurality of chip controlling registers for storing at least one parameter. The system includes a user interfance for inputting user setting data, the user setting data corresponding to at least one function of the chip; a data proc |
| 7372298 |
Chip with adjustable pinout function and method thereof |
May 13, 2008 |
| A chip with an adjustable pinout function is disclosed. The chip includes a first pinout, a second pinout, a logic circuit, and a selecting circuit. The logic circuit includes a first port and a second port. The selecting circuit, which is coupled to the logic circuit, the first pino |
| 7342982 |
Demodulation apparatus for a network transceiver and method thereof |
March 11, 2008 |
| A transceiver of a communication system is disclosed. The transceiver is implemented by a demodulation apparatus including a front-end receiver, a noise canceller, a feedforward equalizer (FFE) and a decoding system. The front-end receiver receives a remote signal and converts it into a |
| 7339902 |
Repeater for performing auto-negotiation between two node devices in a network |
March 4, 2008 |
| The present invention provides a repeater and associated method for performing auto-negotiation between two node devices in the Ethernet network. The repeater includes a receiver receiving related information of auto-negotiation of a first node device, a control unit processing the r |
| 7336398 |
Error prediction method for halftone processing |
February 26, 2008 |
| An error diffusion method applied to halftone processing for image data. The image data comprise a plurality of pixels. The method comprising the steps of dividing the image data into a plurality of image blocks; selecting one of the pixels belonging to each of the image blocks as a |
| 7333491 |
Method and apparatus for packet forwarding in a switch controller |
February 19, 2008 |
| The present invention provides a method and apparatus for packet forwarding within a switch controller. In addition to unicast and broadcast forwarding, the method and apparatus can also analyze and forward IP multicast packets without the need of a CPU and a separate multicast addre |
| 7330075 |
Output impedance control circuit and control method thereof |
February 12, 2008 |
| The invention provides an apparatus and a method for adjusting an output impedance of an output stage. The apparatus comprises a detector for outputting a direct current potential corresponding to the impedance of the output stage circuit. It also comprises a controlling unit for out |
| 7327555 |
Capacitor structure |
February 5, 2008 |
| A capacitor structure includes a first electrode structure, a second electrode structure, and a capacitor dielectric. The first electrode structure includes a plurality of first conductive plates vertically disposed and parallel to one another. The second electrode structure includes |
| 7327188 |
Power amplifier and method for error correcting of output signals thereof |
February 5, 2008 |
| An amplifier includes a subtracting unit for generating an error signal according to an input signal and an output signal; a noise shaping unit for executing a noise shaping operation on the error signal to produce a noise-shaped signal; a pulse adjustment unit for generating a control |
| 7324028 |
Self-calibrating continuous-time delta-sigma modulator |
January 29, 2008 |
| A self-calibrating continuous-time delta-sigma modulator determines whether time constants of its internal integrators are too large or too small by injecting a calibrating sequence into the modulator and examining a correlation between the calibrating sequence and a modulator output |
| 7321325 |
Background calibration of continuous-time delta-sigma modulator |
January 22, 2008 |
| A primary delta-sigma modulator converts a continuous-time input signal into a discrete-time output sequence. A calibration circuit comprising an auxiliary delta-sigma modulator estimates percentage error in an integrator time constant and adjusts the time constant of at least one in |
| 7315219 |
Multiphase voltage controlled oscillator |
January 1, 2008 |
| A multiphase voltage controlled oscillator includes at least one ring oscillating unit and a resistor ring; the ring oscillating unit is formed by connecting a plurality of phase-delay elements in cascade and the resistor ring is formed by connecting a plurality of resistor elements in |
| 7310400 |
Data recovery device and method |
December 18, 2007 |
| A data recovery device. The device adjusts a digital signal according to a pulse signal output by a phase-locked loop circuit. The sampling circuit samples each bit of the digital signal five times to generate a first sampled signal. The data delay buffer decides a sampling range of the |
| 7308190 |
Device for decoding disc read signal and method thereof |
December 11, 2007 |
| A device for decoding a disc read signal generated by accessing data stored in a disc storage medium. The device includes: a multi-level analog-to-digital converter (ADC) for digitizing the disc read signal to generate a digitized disc read signal; a confidence index generating circu |
| 7307965 |
Echo cancellation device for full duplex communication systems |
December 11, 2007 |
| The invention relates to an echo cancellation device for a full duplex communication system. The echo cancellation device utilizes a pull-up current source to increase the DC level, so as to improve the echo cancellation performance with avoiding signal distortion. And the pull-up cu |
| 7304961 |
Echo cancellation device for full duplex communication systems |
December 4, 2007 |
| An echo cancellation device for a full duplex communications system is provided. The full duplex communication system has a transmitter for transmitting a transmit signal and a receiver for receiving a receive signal. The echo cancellation device has a filter for outputting a filter |
| 7304540 |
Source follower and current feedback circuit thereof |
December 4, 2007 |
| A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS |
| 7304523 |
Clock generating apparatus and method in optical storage system |
December 4, 2007 |
| A clock generating apparatus and clock generating method of an optical disc drive for calibrating a clock signal according to an input signal. The clock generating apparatus includes a frequency detector for detecting sampling times in a duration when the clock signal samples an inte |
| 7301489 |
Dithering noise cancellation for a delta-sigma modulator |
November 27, 2007 |
| In an embodiment, a delta-sigma modulator is constructed from one or more stages of a first order low-pass filter, which has a modest gain compared to the integrator used in other embodiments of delta-sigma modulators. Delta-sigma modulators can be converted into low-pass filter based |
| 7298928 |
Method for converting image from low resolution into high resolution |
November 20, 2007 |
| A method of scaling up an image. The method converts a source image with M*N pixels into a target image with KM*HN pixels and includes the steps of: choosing a pixel from the source image as a processing pixel; analyzing the character of the processing pixel according to values of a |
| 7295571 |
xDSL function ASIC processor and method of operation |
November 13, 2007 |
| An improved type of application-specific integrated circuit block (ASIC) is disclosed that is optimized for use in a communications system, and is somewhat programmble through the use of particular data objects that can specify an instruction and operand for the ASIC. The ASIC can be |
| 7288976 |
Charge pump circuit and method thereof |
October 30, 2007 |
| A charge pump circuit capable of canceling current mismatch and suppressing clock feedthrough. The charge pump circuit comprises a current source enabled by a first logical signal, a current sink enabled by a second logical signal, an integrating capacitor coupled to both the current |
| 7283081 |
Application circuit and method for shaping noises |
October 16, 2007 |
| An application circuit for shaping noises and method thereof involve an analog-to-digital converter which converts a first analog signal into an n-bit digital signal for an encoder to generate a p-bit digital signal. Then a control circuit generates a plurality of control signals based o |
| 7282998 |
Method and apparatus for calibrating center frequency of power amplifier |
October 16, 2007 |
| A method and an apparatus for calibrating the center frequency of a power amplifier. The apparatus includes a capacitor unit and an inductor unit. The capacitor unit and the inductor unit are connected in parallel so as to control the center frequency of the power amplifier. The method |
| 7280164 |
Apparatus for channel scanning and method thereof |
October 9, 2007 |
| A method for scanning at least a channel of a received signal includes scanning a plurality of frequency bands in sequence and analyzing each frequency band to determine if the frequency band holds the received signal. If it does, the method includes detecting a frequency response of |
