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Phoenix Precision Technology Corporation Patents
Assignee:
Phoenix Precision Technology Corporation
Address:
Hsinchu, TW
No. of patents:
65
Patents:


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Patent Number Title Of Patent Date Issued
8058723 Package structure in which coreless substrate has direct electrical connections to semiconductor November 15, 2011
A package structure in which a coreless substrate has direct electrical connections to a semiconductor chip and a manufacturing method thereof are disclosed. The method includes the following steps: providing a metal carrier board having a cavity; placing a chip having a plurality of
7768119 Carrier structure embedded with semiconductor chip August 3, 2010
A carrier structure embedded with semiconductor chips is disclosed, which comprises a core board and a plurality of semiconductor chips mounted therein. The core board comprises two metal plates between which an adhesive material is disposed. An etching stop layer is deposited on the
7763969 Structure with semiconductor chips embeded therein July 27, 2010
An embedded semiconductor chip structure and a method for fabricating the same are proposed. The structure comprises: a carrier board, therewith a plurality of through openings formed in the carrier board, and through trenches surrounding the through openings in the same; a plurality of
7754598 Method for manufacturing coreless packaging substrate July 13, 2010
Method for making a coreless packaging substrate are disclosed in the present invention. The coreless packaging substrate is made by first providing a metal adhesion layer having a melting point lower than that of the substrate, and removing a core board connected with the substrate
7754538 Packaging substrate structure with electronic components embedded therein and method for manufac July 13, 2010
A packaging substrate structure with electronic components embedded therein and a method for manufacturing the same are disclosed. The packaging substrate structure comprises: a core board; a built-up structure disposed on at least one surface of the core board, wherein the built-up
7719853 Electrically connecting terminal structure of circuit board and manufacturing method thereof May 18, 2010
An electrically connecting terminal structure of a circuit board and a manufacturing method thereof are disclosed. The method includes: providing a circuit board defined with first and second predetermined areas; forming the first electrically connecting pad in the first predetermine
7719104 Circuit board structure with embedded semiconductor chip and method for fabricating the same May 18, 2010
The present invention provides a circuit board structure with an embedded semiconductor chip and a method for fabricating the same. The circuit board structure includes a carrier board having a first surface, a second surface, and a through hole penetrating the carrier board from the fir
7718470 Package substrate and method for fabricating the same May 18, 2010
A package substrate and a method for fabricating the same are provided according to the present invention. The package substrate includes: a substrate body with a die attaching side and a ball implanting side lying opposite each other, having a plurality of wire bonding pads and a pl
7706148 Stack structure of circuit boards embedded with semiconductor chips April 27, 2010
A stack structure of circuit boards embedded with semiconductor chips is proposed. At least two circuit boards are provided. Each of the circuit boards includes circuit layers formed on surfaces thereof and at least one opening embedded with a semiconductor chip, wherein, the circuit
7705471 Conductive bump structure of circuit board and method for forming the same April 27, 2010
A conductive bump structure of a circuit board and a method for forming the same are proposed. A conductive layer is formed on an insulating layer on the surface of the circuit board. A first resist layer is formed on the conductive layer and a plurality of first openings is formed in
7705456 Semiconductor package substrate April 27, 2010
A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias;
7674986 Circuit board structure having capacitor array and embedded electronic component and method for March 9, 2010
A circuit board structure having a capacitor array and an embedded electronic component and a method for fabricating the same are proposed. Two carrier boards and a high dielectric constant material layer are provided, wherein the carrier boards have electronic components embedded th
7674362 Method for fabrication of a conductive bump structure of a circuit board March 9, 2010
A method for fabricating a conductive bump structure of a circuit board is disclosed. The circuit board with a plurality of electrical connection pads is provided. An insulating protective layer and a resist layer are successively applied on the circuit board, wherein openings are formed
7659193 Conductive structures for electrically conductive pads of circuit board and fabrication method t February 9, 2010
Conductive structures for electrically conductive pads of a circuit board and fabrication method thereof are proposed. The fabrication method includes: providing a circuit board with a plurality of first, second and third electrically conductive pads; forming first and second conductive
7656040 Stack structure of circuit board with semiconductor component embedded therein February 2, 2010
A stack structure of circuit boards embedded with semiconductor components therein is proposed, which includes at least two semiconductor components embedded circuit boards, a plurality of conductive bumps, and at least one adhesive layer. The circuit boards are each formed with a circui
7656015 Packaging substrate having heat-dissipating structure February 2, 2010
Provided is a packaging substrate with a heat-dissipating structure, including a core layer with a first surface and an opposite second surface having a first metal layer and a second metal layer respectively. Portions of the first metal layer are exposed from a second cavity penetra
7629204 Surface roughening method for embedded semiconductor chip structure December 8, 2009
A surface roughening method for an embedded semiconductor chip structure is proposed. The method includes providing a carrier board with an opening and mounting a semiconductor chip in the opening of the carrier board, the semiconductor chip having a plurality of electrode pads; and
7627946 Method for fabricating a metal protection layer on electrically connecting pad of circuit board December 8, 2009
This invention discloses a method for electroplating nickel/gold on electrically connecting pads on a substrate for chip package and structure thereof. The method comprises: forming a conductive film on a substrate circuit-patterned and defined with a circuit layer; forming on the su
7626270 Coreless package substrate with conductive structures December 1, 2009
A method of manufacturing a coreless package substrate together with a conductive structure of the substrate is disclosed. The method can produce a coreless package substrate which comprises: at least a built-up structure having a first solder mask and a second solder mask, wherein a
7619317 Carrier structure for semiconductor chip and method for manufacturing the same November 17, 2009
A carrier structure for a semiconductor chip and a method for manufacturing the same are disclosed. The method includes the following steps: providing a carrier board having at least one through cavity, wherein a removable film is formed on the surface of the carrier board, and a sem
7614146 Method for fabricating circuit board structure November 10, 2009
The present invention provides a circuit board structure and a method of fabricating circuit board structure the same, the circuit board structure consisting of a carrier board having a first surface and an opposed second surface, the carrier board being formed with at least one through
7608929 Electrical connector structure of circuit board and method for fabricating the same October 27, 2009
An electrical connector structure of circuit board and a method for fabricating the same are proposed. A circuit board having a conductive layer is formed with a first resist layer and a second resist layer thereon, so as to form electrical connection pads and metal bumps on the elec
7598610 Plate structure having chip embedded therein and the manufacturing method of the same October 6, 2009
A plate structure having a chip embedded therein, comprises an aluminum plate having at least one aluminum oxide layer formed on its surface, and a cavity therein; a chip embedded in the cavity, wherein the chip has an active surface; at least one electrode pad mounted on the active surf
7592706 Multi-layer circuit board with fine pitches and fabricating method thereof September 22, 2009
A method for fabricating a multi-layer circuit board with fine pitch is provided. First, a plurality of contact pads is disposed on a core substrate. Next, a first dielectric layer, a second dielectric layer, and a third dielectric layer are formed on the core circuit board, in which a
7582961 Package structure with circuits directly connected to semiconductor chip September 1, 2009
A package structure with circuit directly connected to semiconductor chip, which comprises: a carrier board, a semiconductor chip, and at least a built-up structure. The carrier board is formed with a through cavity therein. The semiconductor chip is mounted in the through cavity of the
7579690 Semiconductor package structure August 25, 2009
A semiconductor package structure relates to a chip-embedded semiconductor package electrically connected to a second semiconductor component. The semiconductor package structure comprises a first packaging substrate having a first surface, a second surface and at least a first cavity
7554131 Chip embedded package structure and fabrication method thereof June 30, 2009
A chip embedded package structure and a fabrication method thereof are proposed. An adhesive layer is formed on a bottom surface of a carrier board having at least one cavity to seal one end of the cavity. At least one semiconductor chip is mounted via its non-active surface on the a
7553750 Method for fabricating electrical conductive structure of circuit board June 30, 2009
A method for fabricating an electrical conductive structure of a circuit board is disclosed. The method includes providing a circuit board having a plurality of first and second electrically conductive pads; forming on the circuit board an insulating protection layer having a plurality o
7546682 Methods for repairing circuit board having defective pre-soldering bump June 16, 2009
A method for repairing a circuit board having defective pre-soldering bumps is proposed. Firstly, the circuit board having a plurality of pre-soldering bumps on a surface thereof is provided, wherein at least one of the pre-soldering bumps has a defect. Then, a micro-electroplating p
7544599 Manufacturing method of solder ball disposing surface structure of package substrate June 9, 2009
A manufacturing method of a solder ball disposing surface structure on a core board including: providing a core board with a first metal layer and an opposing metal bump-equipped second metal layer; forming resists on the first and second metal layers respectively; forming third, fourth
7539022 Chip embedded packaging structure May 26, 2009
A chip embedded packaging structure includes a first metal board, a second metal board having at least a through cavity, in which the second metal board is disposed on the upper surface of the first metal board to form a heat dissipating substrate, at least a semiconductor chip and a cap
7519244 Circuit board with optoelectronic component embedded therein April 14, 2009
A circuit board structure with optoelectronic component embedded therein comprises a carrier board with at least two through openings; a first optoelectronic component and a second optoelectronic component disposed in the openings respectively, wherein a plurality of electrode pads and
7514786 Semiconductor chip electrical connection structure April 7, 2009
A semiconductor chip electrical connection structure includes electrode pads formed on a surface of a semiconductor chip, wherein the semiconductor chip is mounted via another surface thereof on a carrier; a plurality of conductive bumps formed on the electrode pads respectively, and
7514770 Stack structure of carrier board embedded with semiconductor components and method for fabricati April 7, 2009
A stack structure of a carrier board embedded with semiconductor components and a method for fabricating the same are proposed. The stack structure includes first and second carrier boards having a through hole respectively, first and second semiconductors component disposed in throu
7508006 Circuit board structure of integrated optoelectronic component March 24, 2009
A circuit board structure of an optoelectronic component is proposed. A supporting structure has a first surface and a second surface. At least one optical transceiver has an active surface and an inactive surface. The inactive surface of the optical transceiver is mounted on the first
7507915 Stack structure of carrier boards embedded with semiconductor components and method for fabricat March 24, 2009
A stack structure of carrier boards embedded with semiconductor components and a method for fabricating the same are proposed. A first carrier board and a second carrier board, each of which having at least one through hole, are provided. A first protecting layer and a second protecting
7485970 Semiconductor package substrate having contact pad protective layer formed thereon February 3, 2009
A semiconductor package substrate and a method for fabricating the same are proposed. An insulating layer has a plurality of blind vias to expose inner traces underneath the insulating layer. A conductive film is formed on the insulating layer and over the bind vias. A first resist is fo
7453155 Method for fabricating a flip chip package November 18, 2008
A flip chip packaging method is disclosed. First, a substrate is provided, in which the substrate comprises a plurality of integrated circuit (IC) package substrate units therein and the surface of each IC package substrate unit comprises a plurality of connecting pads. Next, an insu
7450793 Semiconductor device integrated with opto-electric component and method for fabricating the same November 11, 2008
A semiconductor device integrated with opto-electric component and method for fabricating the same provides a wafer with a plurality of optical transmitter/receiver components, and each of the optical transmitter/receiver components having an active surface and an opposite non-active
7449363 Semiconductor package substrate with embedded chip and fabrication method thereof November 11, 2008
A semiconductor package substrate with embedded chip and a fabrication method thereof are provided. A first insulating layer is applied on a metallic board, and formed with at least one opening for exposing a portion of the metallic board. At least one semiconductor chip is mounted o
7435618 Method to manufacture a coreless packaging substrate October 14, 2008
A method for manufacturing a coreless packaging substrate is disclosed. The method can produce a coreless packaging substrate which comprises: at least a built-up structure having a first solder mask and a second solder mask, wherein a plurality of openings are formed in the first and se
7417299 Direct connection multi-chip semiconductor element structure August 26, 2008
A direct connection multi-chip semiconductor element structure is proposed. A plurality of semiconductor chips are mounted and supported on a metal heat sink, such that heat generated by the chips during operation can be dissipated via the heat sink. A circuit structure is extended from
7399399 Method for manufacturing semiconductor package substrate July 15, 2008
A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphe
7396753 Semiconductor package substrate having bonding pads with plated layer thereon and process of man July 8, 2008
A semiconductor package substrate is provided having a plurality of bonding pads on at least one surface thereof and covered by a conductive film. A photoresist layer formed over the conductive film has a plurality of first openings for exposing portions of the conductive film corres
7396700 Method for fabricating thermally enhanced semiconductor device July 8, 2008
A method for fabricating a thermally enhanced semiconductor device. A support plate having at least one opening is mounted on a heat sink. At least one chip is mounted on the heat sink and received in the opening. An insulating layer is formed over the chip and the support plate and
7382057 Surface structure of flip chip substrate June 3, 2008
A flip chip substrate comprises a substrate that is defined a chip connect zone which has a plurality of first conductive pads and passive component connect zone which has at least a second conductive pads. A first patterned insulating layer within opening that covers on the chip connect
7378345 Metal electroplating process of an electrically connecting pad structure of circuit board and st May 27, 2008
A metal electroplating process of an electrically connecting pad structure of a circuit board and structure thereof are proposed. First, a circuit board with a patterned circuit layer formed on at least one surface thereof is provided, wherein the circuit layer defines a plurality of
7359590 Semiconductor device integrated with optoelectronic components April 15, 2008
A semiconductor device integrated with optoelectronic components includes a carrier board with at least two openings; a first and a second optoelectronic component disposed in the openings respectively, each of them having an active surface and an opposite non-active surface, wherein
7351916 Thin circuit board April 1, 2008
A thin circuit board includes a dielectric layer with at least one cavity formed on a surface thereof; a metal pad formed in the cavity; at least one circuit layer formed on another surface of the dielectric layer; and a plurality of conductive vias formed in the dielectric layer to
7350298 Method for fabricating circuit board with conductive structure April 1, 2008
A method for fabricating a circuit board having a conductive structure is disclosed. The method includes: forming first and second insulating protective layers respectively on first and second surfaces of a circuit board; forming a conductive layer on the first insulating protective
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