| Patent Number |
Title Of Patent |
Date Issued |
| 6963340 |
Graphics processor and system with microcontroller for programmable sequencing of power up or po |
November 8, 2005 |
| A graphics processor or display device including a microcontroller that functions as a sequencer, a computer system including at least one such graphics processor or display device, and a microcontroller for use in such a graphics processor or display device. In preferred embodiments, th |
| 6961057 |
Method and apparatus for managing and accessing depth data in a computer graphics system |
November 1, 2005 |
| A computer graphics system provides for processing image data including Z data for use in displaying three-dimensional images on a display unit. The system includes: a depth buffer providing for temporary storage of Z data; and a graphics processing unit having a graphics engine for gene |
| 6959110 |
Multi-mode texture compression algorithm |
October 25, 2005 |
| A multi-mode texture compression algorithm is provided for effective compression and decompression texture data during graphics processing. Initially, a request is sent to memory for compressed texture data. Such compressed texture data is then received from the memory in response to |
| 6957298 |
System and method for a high bandwidth-low latency memory controller |
October 18, 2005 |
| A memory controller system is provided including a plurality of memory controller subsystems each coupled between memory and one of a plurality of computer components. Each memory controller subsystem includes at least one queue for managing pages in the memory. In use, each memory contr |
| 6956579 |
Private addressing in a multi-processor graphics processing system |
October 18, 2005 |
| Systems and methods for private addressing in a multi-processor graphics processing subsystem having a number of memories and a number of graphics processors. Each of the memories includes a number of addressable storage locations, and storage locations in different memories may share a |
| 6954204 |
Programmable graphics system and method using flexible, high-precision data formats |
October 11, 2005 |
| A programmable graphics system and method for processing high precision graphics data represented in one or more data formats in one or more passes. Graphics program instructions executed by the system control the processing and format conversion of the data. The program instructions and |
| 6952217 |
Graphics processing unit self-programming |
October 4, 2005 |
| A method of self-programming a graphics processing unit (GPU) includes receiving a blit instruction defining a blit operation and storing a first control value in a control register, which determines the behavior of the GPU, using the blit operation. The blit instruction is read by the G |
| 6952206 |
Graphics application program interface system and method for accelerating graphics processing |
October 4, 2005 |
| A system, method and computer program product are provided for accelerating graphics processing utilizing a graphics application program interface. Initially, graphics data is processed in a graphics system with components including a central processing unit, a geometry processing module |
| 6950107 |
System and method for reserving and managing memory spaces in a memory resource |
September 27, 2005 |
| System and method for reserving a memory space for multithreaded processing is described. Memory space within a memory resource is allocated responsive to thread type. Examples of thread types for graphics processing include primitive, vertex and fragment types. Memory space allocate |
| 6947865 |
Method and system for dynamic power supply voltage adjustment for a semiconductor integrated cir |
September 20, 2005 |
| A processor power supply voltage controller. The controller includes a temperature sensor configured to sense a temperature of a processor and generate a temperature signal in accordance therewith. A regulator is coupled to provide a power supply voltage to the processor. The regulator |
| 6947049 |
Method and system for synchronizing updates of vertex data with a graphics processor that is fet |
September 20, 2005 |
| A method and system for synchronizing updates of vertex data by a processor with a graphics accelerator module that is fetching vertex data is disclosed. The method and system comprises providing vertex array range (VAR) and writing vertex data into the VAR. The method and system include |
| 6947047 |
Method and system for programmable pipelined graphics processing with branching instructions |
September 20, 2005 |
| A programmable, pipelined graphics processor (e.g., a vertex processor) having at least two processing pipelines, a graphics processing system including such a processor, and a pipelined graphics data processing method allowing parallel processing and also handling branching instruct |
| 6942521 |
VGA connector with integral filter |
September 13, 2005 |
| An improved VGA connector that supports enhanced graphic performance by internally incorporating one or more functions of fusing, filtering, shielding, and the controlling of signal line impendances. The improved VGA connector is dimensionally interchangeable with many aspects of sta |
| 6940515 |
User programmable primitive engine |
September 6, 2005 |
| A fixed function engine and method are described for processing a set of primitive commands. One embodiment of the fixed function engine includes a means for receiving one or more primitive commands, where each such primitive command includes information for processing vertex data using |
| 6938176 |
Method and apparatus for power management of graphics processors and subsystems that allow the s |
August 30, 2005 |
| A graphics processing device implementing a set of techniques for power management, preferably at both a subsystem level and a device level, and preferably including peak power management, a system including a graphics processing device that implements such a set of techniques for power |
| 6937290 |
Method and apparatus using the Bresenham algorithm to synthesize a composite SYNC signal |
August 30, 2005 |
| A method and circuit for generating a train of synthesized sync pulses in accordance with the Bresenham algorithm in response to an input clock having frequency F.sub.i, such that the leading edges of the pulses occur at least nearly periodically, with time-averaged frequency at least ne |
| 6927781 |
Method and apparatus for averaging sub-samples |
August 9, 2005 |
| A method of generating pixels in a graphics system including providing a plurality of sub-samples, and providing a source pixel. It is determined which of the plurality of sub-samples are covered by the source pixel, and which of the plurality of sub-samples are not covered. The sub-samp |
| 6924811 |
Circuit and method for addressing a texture cache |
August 2, 2005 |
| A method of storing a texel in a texel cache comprising reading a t coordinate of the texel, the t coordinate comprising a plurality of bits, reading a s coordinate of the texel, the s coordinate comprising a plurality of bits, forming an offset by concatenating bits of the t coordin |
| 6920484 |
Method and apparatus for providing an integrated virtual disk subsystem |
July 19, 2005 |
| A novel network architecture that integrates the functions of an internet protocol (IP) router into a network processing unit (NPU) that resides in a host computer's chipset such that the host computer's resources are perceived as separate network appliances. In one embodiment, functions |
| 6919904 |
Overbright evaluator system and method |
July 19, 2005 |
| A system, method and computer program product are provided for use in a graphics pipeline. Initially, a pixel is determined within a primitive that is to be texture mapped. Next, texture coordinates associated with the pixel are identified along with a plurality of sets of light values |
| 6919895 |
Texture caching arrangement for a computer graphics accelerator |
July 19, 2005 |
| A method and apparatus which includes a graphics accelerator, circuitry responsive to pixel texture coordinates to select texels and generate therefrom a texture value for any pixel the color of which is to be modified by a texture, a cache to hold texels for use by the circuitry to |
| 6911984 |
Desktop compositor using copy-on-write semantics |
June 28, 2005 |
| Tile data for drawing and desktop buffers in a desktop compositor system is managed using "copy-on-write" semantics, in which tile data stored in a memory location is not transferred to another location until the tile data for one of the buffers is modified. For each tile in drawing buff |
| 6911983 |
Double-buffering of pixel data using copy-on-write semantics |
June 28, 2005 |
| Tile buffers in a graphics processing system are managed use "copy-on-write" semantics, in which tile data stored in a memory location is not transferred to another location until the tile data for one of the buffers is modified. Two memory spaces store tile data, and two logical buf |
| 6906716 |
Integrated tessellator in a graphics processing unit |
June 14, 2005 |
| An integrated graphics pipeline system is provided for graphics processing. Such system includes a tessellation module that is positioned on a single semiconductor platform for receiving data for tessellation purposes. Tessellation refers to the process of decomposing either a complex su |
| 6900810 |
User programmable geometry engine |
May 31, 2005 |
| A programmable geometry engine is described. One embodiment of the programmable geometry engine includes a programmable primitive engine configured to receive primitive commands that include information for processing vertex data using user-developed programs or subroutines. The prog |
| 6897874 |
Method and apparatus for providing overlay images |
May 24, 2005 |
| A circuit for providing an overlay in a window on a computer output display including scaling circuitry, storage circuitry for receiving a plurality of lines of source data, input circuitry for loading the storage circuitry in a first prefill mode and in a second low water mark mode, and |
| 6894689 |
Occlusion culling method and apparatus for graphics systems |
May 17, 2005 |
| A system, method and computer program product are provided for avoiding reading z-values in a graphics pipeline. Initially, near z-values are stored which are each representative of a near z-value on an object in a region. Such region is defined by a tile and a coverage mask therein. |
| 6894687 |
System, method and computer program product for vertex attribute aliasing in a graphics pipeline |
May 17, 2005 |
| A system, method and article of manufacture are provided for aliasing vertex attributes during vertex processing. Initially, a plurality of identifiers are each mapped to one of a plurality of parameters associated with vertex data. Thereafter, the vertex data is processed by calling the |
| 6894385 |
Integrated circuit package having bypass capacitors coupled to bottom of package substrate and s |
May 17, 2005 |
| An integrated circuit package is disclosed. The integrated circuit package includes a package substrate having a top and a bottom. Further, the integrated circuit package includes a plurality of bypass capacitors coupled to the bottom of the package substrate without a cavity. Moreover, |
| 6879207 |
Defect tolerant redundancy |
April 12, 2005 |
| Circuits, methods, and apparatus for using redundant circuitry on integrated circuits in order to increase manufacturing yields. One exemplary embodiment of the present invention provides a circuit configuration wherein functional circuit blocks in a group of circuit blocks are selec |
| 6876362 |
Omnidirectional shadow texture mapping |
April 5, 2005 |
| An invention is provided for rendering using an omnidirectional light. A shadow cube texture map having six cube faces centered by a light source is generated. Each cube face comprises a shadow texture having depth data from a perspective of the light source. In addition, each cube face |
| 6874160 |
Digital video recorder and method of operating the same |
March 29, 2005 |
| A digital video recorder is described. In one embodiment, the digital video recorder includes a feature detector configured to derive a set of features from content within a television commercial. The digital video recorder also includes a television program identifier coupled to the |
| 6870542 |
System and method for filtering graphics data on scanout to a monitor |
March 22, 2005 |
| A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of |
| 6870540 |
System, method and computer program product for a programmable pixel processing model with instr |
March 22, 2005 |
| A system, method and computer program product are provided for programmable pixel processing in a computer graphics pipeline. Initially, pixel data is received from a source buffer. Thereafter, programmable operations are performed on the pixel data in order to generate output. The opera |
| 6867780 |
System, method and article of manufacture for allowing direct memory access to graphics vertex d |
March 15, 2005 |
| A system, method, and article of manufacture are provided for allowing direct memory access to graphics vertex data by a graphics accelerator module. First, vertex data is stored in memory. Next, an index is received which is representative of a portion of the vertex data in the memory. |
| 6864893 |
Method and apparatus for modifying depth values using pixel programs |
March 8, 2005 |
| A method and apparatus for generating depth values in a programmable graphics system. Depth values are calculated under control of a pixel program using a variety of sources as inputs to programmable computation units (PCUs) in the programmable graphics systems. The PCUs are used to |
| 6853382 |
Controller for a memory system having multiple partitions |
February 8, 2005 |
| A memory system having a number of partitions each operative to independently service memory requests from a plurality of memory clients while maintaining the appearance to the memory client of a single partition memory subsystem. The memory request specifies a location in the memory |
| 6853377 |
System and method of improved calculation of diffusely reflected light |
February 8, 2005 |
| The present invention is related to rendering computer animated video and/or images generally, and to improving the calculation of diffusely reflected light. The present invention includes a system and method of computing diffusely reflected light at one or more positions on surfaces |
| 6850243 |
System, method and computer program product for texture address operations based on computations |
February 1, 2005 |
| A system, method and computer program product are provided for texture sampling in a graphics pipeline. Initially, texture information is retrieved using texture coordinates. Thereafter, the texture information is utilized to generate results. Next, the texture information and the re |
| 6848057 |
Method and apparatus for providing a decoupled power management state |
January 25, 2005 |
| A novel method and apparatus for providing a decoupled power management state. The present invention decouples the operating system's perspective of the power management state from that of the actual hardware state of a host resource. Namely, the resources of a host computer can still op |
| 6844880 |
System, method and computer program product for an improved programmable vertex processing model |
January 18, 2005 |
| A system, method and computer program product are provided for branching during programmable processing in a computer graphics pipeline. Initially, data is received. Programmable operations are then performed on the data in order to generate output. Such operations are programmable by a |
| 6829689 |
Method and system for memory access arbitration for minimizing read/write turnaround penalties |
December 7, 2004 |
| A method and system for arbitrating among memory access commands from clients seeking access to a DRAM or other memory, and an arbiter for use in implementing such method or system. When arbitrating among competing commands that include at least one command of the same read/write type as |
| 6828980 |
System, method and computer program product for z-texture mapping |
December 7, 2004 |
| A system, method and computer program product are provided for computer graphics processing. Initially, a height parameter is determined. Thereafter, a depth-direction component of the height parameter is calculated. A depth-value of a pixel is then modified utilizing the computed de |
| 6825847 |
System and method for real-time compression of pixel colors |
November 30, 2004 |
| A system and method are provided for the compression of pixel data for communicating the same with a frame buffer. Initially, a plurality of samples is received. It is first determined whether the samples are reducible, in that a single sample value can take the place of a plurality |
| 6825843 |
Method and apparatus for loop and branch instructions in a programmable graphics pipeline |
November 30, 2004 |
| A method and apparatus for executing loop and branch program instructions in a programmable graphics shader. The programmable graphics shader converts a sequence of instructions comprising a portion of a shader program and selects a first set of fragments to be processed. Subsequent |
| 6825840 |
System and method of adjusting ray origins when shading vertices with rays |
November 30, 2004 |
| The present invention is related to rendering computer animated video and/or images generally, and to adjusting the origins of rays cast for object-edge positions. The present invention includes identifying a location of a vertex positioned on a perimeter of an object defined in the |
| 6820173 |
Data prefetcher with predictor capabilities |
November 16, 2004 |
| A system, method and article of manufacture are provided for retrieving information from memory. Initially, processor requests for information from a first memory are monitored. A future processor request for information is then predicted based on the previous step. Thereafter, one o |
| 6812927 |
System and method for avoiding depth clears using a stencil buffer |
November 2, 2004 |
| A system and method are provided for reducing the number of depth clear operations in a hardware graphics pipeline. Initially, a frame count is stored into a frame buffer associated with the hardware graphics pipeline. The stored frame count is associated with a pixel. A depth clear oper |
| 6809732 |
Method and apparatus for generation of programmable shader configuration information from state- |
October 26, 2004 |
| A graphics subsystem having a programmable shader controllable by both state-based control information, such as DirectX 8 control information, and program instructions, such as DirectX 9 shader program instructions. The programmable shader translates state-based control information r |
| 6806886 |
System, method and article of manufacture for converting color data into floating point numbers |
October 19, 2004 |
| A system, method and article of manufacture are provided for converting color data into floating point values in a graphics pipeline. First, color data is received. Next, the color data is separated into a plurality of components each including an integer. The components of color data ar |
