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Novellus Systems, Inc. Patents
Novellus Systems, Inc.
San Jose, CA
No. of patents:

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Patent Number Title Of Patent Date Issued
D668211 Segmented electroplating anode and anode segment October 2, 2012
D648289 Electroplating flow shaping plate having offset spiral hole pattern November 8, 2011
D641829 Plasma reactor showerhead face plate having concentric ridge pattern July 19, 2011
8580697 CVD flowable gap fill November 12, 2013
The present invention meets these needs by providing improved methods of filling gaps. In certain embodiments, the methods involve placing a substrate into a reaction chamber and introducing a vapor phase silicon-containing compound and oxidant into the chamber. Reactor conditions ar
8575028 Method and apparatus for filling interconnect structures November 5, 2013
Methods, apparatus, and systems for depositing copper and other metals are provided. In some implementations, a wafer substrate is provided to an apparatus. The wafer substrate has a surface with field regions and a feature. A copper layer is plated onto the surface of the wafer subs
8569179 Method for etching organic hardmasks October 29, 2013
A method of etching or removing an amorphous carbon organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an amorphous carbon organic hardmask to be removed, the dielectric film having a d
8563414 Methods for forming conductive carbon films by PECVD October 22, 2013
Conductive carbon films having a resistivity of less than about 0.2 Ohm-cm, preferably less than about 0.05 Ohm-cm, are deposited by PECVD. Conductive carbon films are essentially free of sp.sup.3-hybridized carbon and contain predominantly sp.sup.2 carbon, based on IR spectral featu
8298936 Multistep method of depositing metal seed layers October 30, 2012
Metal seed layers are deposited on a semiconductor substrate having recessed features by a method that involves at least three operations. In this method, a first layer of metal is deposited onto the substrate to cover at least the bottom portions of the recessed features. The first
8298933 Conformal films on semiconductor substrates October 30, 2012
A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle inc
8291935 Flexible gas mixing manifold October 23, 2012
Each of plurality of gas sources flows to a different one of a plurality of separate source gas flow paths. Then, a source gas is distributed directly from each of plurality of separate source gas flow paths to a plurality of separate gas mixture flow paths, thereby distributing a pl
8288292 Depositing conformal boron nitride film by CVD without plasma October 16, 2012
A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted
8288288 Transferring heat in loadlocks October 16, 2012
Methods that increase the overall rate of heat transfer between a substrate and a heat sink or source, e.g., in a loadlock are provided. According to various embodiments, the methods involve varying the heat transfer coefficient of a heat transfer gas in the loadlock or other chamber
8283644 Measuring in-situ UV intensity in UV cure tool October 9, 2012
Provided are improved apparatus and methods for radiative treatment. In some embodiments, a semiconductor processing apparatus for radiative cure includes a process chamber and a radiation assembly external to the process chamber. The radiation assembly transmits radiation into the c
8282983 Closed loop control system for RF power balancing of the stations in a multi-station processing October 9, 2012
Apparatus and methods to minimize wafer-to-wafer process variation in RF-based semiconductor processing reactors with shared RF source for multiple processing areas. RF sensors associated with each processing area sends signal to the RF balance controller. The controller modifies sta
8282768 Purging of porogen from UV cure chamber October 9, 2012
An apparatus for purging a space in a processing chamber comprises a source of a purge gas; an inlet portion of a purge ring; an inlet baffle located in the inlet portion and fluidically connected to the source of purge gas; and an exhaust portion of the purge ring. The inlet portion
8278224 Flowable oxide deposition using rapid delivery of process gases October 2, 2012
Methods and apparatus for filling gaps on partially manufactured semiconductor substrates with dielectric material are provided. In certain embodiments, the methods include introducing a first process gas into the processing chamber and accumulating a second process gas in an accumul
8278216 Selective capping of copper October 2, 2012
The present invention provides methods of selectively depositing refractory metal and metal nitride cap layers onto copper lines inlaid in a dielectric layer. The methods result in formation of a cap layer on the copper lines without significant formation on the surrounding dielectric
8273670 Load lock design for rapid wafer heating September 25, 2012
A semiconductor processing tool heats wafers using radiant heat and resistive heat in chamber or in a load lock where pressure changes. The wafers are heated in greater part with a resistive heat source until a transition temperature or pressure is reached, then they are heated in gr
8273259 Ashing method September 25, 2012
Ashing of organic material is conducted initially at a low temperature and then at a high temperature. A low flow rate of ashing gas maximizes ashing rate at the low temperature, and a high flow rate of ashing gas maximizes ashing rate at a high temperature. Preferably, a crossover t
8268722 Interfacial capping layers for interconnects September 18, 2012
Adhesive layers residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Adhesion layers are formed by depositing a precursor layer of metal-containing material (e.g., materi
8268155 Copper electroplating solutions with halides September 18, 2012
Methods, electroplating solution, and apparatuses for electroplating copper into a surface of a partially fabricated semiconductor substrate are provided. Electroplating solutions include copper ions, suppressor additives, chloride ions, and alternative halide ions, which include bro
8268154 Selective electrochemical accelerator removal September 18, 2012
Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions;
8268135 Method and apparatus for electrochemical planarization of a workpiece September 18, 2012
An electrochemical planarization apparatus for planarizing a metallized surface on a workpiece includes a polishing pad and a platen. The platen is formed of conductive material, is disposed proximate to the polishing pad and is configured to have a negative charge during at least a port
8262871 Plating method and apparatus with multiple internally irrigated chambers September 11, 2012
An apparatus for electroplating a layer of metal onto a work piece surface includes a membrane separating the chamber of the apparatus into a catholyte chamber and an anolyte chamber. In the catholyte chamber is a catholyte manifold region that includes a catholyte manifold and at least
8262800 Methods and apparatus for cleaning deposition reactors September 11, 2012
Improved methods of removing tungsten film from the interior reactor and reactor component surfaces between tungsten deposition operations are provided. The methods involve increasing the availability of molecular fluorine to remove tungsten from the reactor while maintaining fast re
8261758 Apparatus and method for cleaning and removing liquids from front and back sides of a rotating w September 11, 2012
An apparatus for simultaneously rinsing and drying front and back surfaces of a workpiece comprises a chuck adapted to spin the workpiece, a plurality of posts coupled to the chuck and adapted to support the workpiece, and first and second mechanical arms. The first mechanical arm is
8257781 Electroless plating-liquid system September 4, 2012
A main reservoir holds cool reactant liquid. A reaction vessel for treating a substrate is connected to the main reservoir by a feed conduit. A heater is configured to heat reactant liquid in the feed conduit before the liquid enters the reaction vessel. Preferably, the heater is a m
8247332 Hardmask materials August 21, 2012
Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about -600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped sil
8242028 UV treatment of etch stop and hard mask films for selectivity and hermeticity enhancement August 14, 2012
A method for the ultraviolet (UV) treatment of etch stop and hard mask film increases etch selectivity and hermeticity by removing hydrogen, cross-linking, and increasing density. The method is particularly applicable in the context of damascene processing. A method provides for form
8236160 Plating methods for low aspect ratio cavities August 7, 2012
The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative
8217513 Remote plasma processing of interface surfaces July 10, 2012
Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus includes a processing chamber, a load lock coupled
8211510 Cascaded cure approach to fabricate highly tensile silicon nitride films July 3, 2012
A highly tensile dielectric layer is generated on a heat sensitive substrate while not exceeding thermal budget constraints. Cascaded ultraviolet (UV) irradiation is used to produce highly tensile films to be used, for example, in strained NMOS transistor architectures. Successive UV
8207062 Method for improving adhesion of low resistivity tungsten/tungsten nitride layers June 26, 2012
Methods of improving the adhesion of low resistivity tungsten/tungsten nitride layers are provided. Low resistivity tungsten/tungsten nitride layers with good adhesion are formed by treating a tungsten or tungsten nitride layer before depositing low resistivity tungsten. Treatments i
8197662 Deposit morphology of electroplated copper June 12, 2012
The present invention provides improved methods and devices for electroplating copper on a wafer. Some implementations of the present invention involve the pre-treatment of the wafer with a solution containing accelerator molecules. Preferably, the bath into which the wafer is subseq
8193096 High dose implantation strip (HDIS) in H.sub.2 base chemistry June 5, 2012
Plasma is generated using elemental hydrogen, a weak oxidizing agent, and a fluorine containing gas. An inert gas is introduced to the plasma downstream of the plasma source and upstream of a showerhead that directs gas mixture into the reaction chamber where the mixture reacts with the
8192806 Plasma particle extraction process for PECVD June 5, 2012
A plasma-enhanced chemical vapor deposition (PECVD) process including plasma particle extraction is described. Charged particles suspended in discharge volume are moved together with a plasma and can then be flushed away. The particle extraction process reduces unwanted particles on the
8192131 Architecture for high throughput semiconductor processing applications June 5, 2012
A semiconductor wafer processing system in accordance with an embodiment of the present invention includes a loading station, a load lock, a process module, an intermediate process module, and a transport module which further includes a load chamber, a transfer chamber, and a pass-th
8187951 CVD flowable gap fill May 29, 2012
Methods of lining and/or filling gaps on a substrate by creating flowable silicon oxide-containing films are provided. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such
8187486 Modulating etch selectivity and etch rate of silicon nitride thin films May 29, 2012
Etching of nitride and oxide layers with reactant gases is modulated by etching in different process regimes. High etch selectivity to silicon nitride is achieved in an adsorption regime where the partial pressure of the etchant is lower than its vapor pressure. Low etch selectivity to
8178443 Hardmask materials May 15, 2012
Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about -600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped sil
8173537 Methods for reducing UV and dielectric diffusion barrier interaction May 8, 2012
Stability of an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer is critical for successful integration. UV-resistant diffusion barrier layers are formed by depositing the layer in a hydrogen-starved environmen
8172992 Wafer electroplating apparatus for reducing edge defects May 8, 2012
Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the
8172646 Magnetically actuated chuck for edge bevel removal May 8, 2012
Provided are magnetically actuated wafer chucks that permit a wafer to be clamped or unclamped at any time during a process and at any rotational speed, as desired. Such wafer chucks may include constraining members that are movable between open and closed positions. In a closed position
8168540 Methods and apparatus for depositing copper on tungsten May 1, 2012
Apparatus and methods for depositing copper on tungsten are presented. The invention finds particular use in the semiconductor industry for depositing copper seed layers onto fields or through silicon vias having tungsten barrier layers, both reducing cost and complexity of existing
8158532 Topography reduction and control by selective accelerator removal April 17, 2012
Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the me
8156892 Edge profiling for process chamber shields April 17, 2012
Process chamber shields having specially profiled edges exhibit increased lifetime in PVD and CVD deposition chambers. Edge profiling reduces flaking and delamination of materials deposited onto the shields, thereby prolonging shield life, and, consequently, reducing costs associated wit
8153520 Thinning tungsten layer after through silicon via filling April 10, 2012
Methods of processing partially manufactured semiconductor substrates with one or more through silicon vias to partially remove a tungsten layer formed on the field region during filling the through silicon vias are provided. In certain embodiments, the methods produce substrates with
8147660 Semiconductive counter electrode for electrolytic current distribution control April 3, 2012
A semiconductive counter electrode covers a highly electronically conductive electric current buss. The semiconductive counter electrode is impervious to ion flow. A substrate holder is operable to hold a substrate and to form a thin fluid gap between the semiconductive counter elect
8137467 Temperature controlled showerhead March 20, 2012
A temperature controlled showerhead for chemical vapor deposition (CVD) chambers enhances heat dissipation to enable accurate temperature control with an electric heater. Heat dissipates by conduction through a showerhead stem and fluid passageway and radiation from a back plate. A t
8137465 Single-chamber sequential curing of semiconductor wafers March 20, 2012
The present invention relates to curing of semiconductor wafers. More particularly, the invention relates to cure chambers containing multiple cure stations, each featuring one or more UV light sources. The wafers are cured by sequential exposure to the light sources in each station. In
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