| Patent Number |
Title Of Patent |
Date Issued |
| 7622400 |
Method for improving mechanical properties of low dielectric constant materials |
November 24, 2009 |
| Methods of forming a dielectric layer having a low dielectric constant and high mechanical strength are provided. The methods involve depositing a sub-layer of the dielectric material on a substrate, followed by treating the sub-layer with a plasma. The process of depositing and plasma |
| 7622380 |
Method of improving adhesion between two dielectric films |
November 24, 2009 |
| A method of improving adhesion between layers in the formation of a semiconductor device and integrated circuit, and the resultant intermediate semiconductor structure, which include a substrate layer with a low k insulating layer thereover. The low k insulating layer includes a trea |
| 7622162 |
UV treatment of STI films for increasing tensile stress |
November 24, 2009 |
| Using UV radiation, methods to modify shallow trench isolation (STI) film tensile stress to generate channel strain without adversely impacting the efficiency of the transistor fabrication process are disclosed. Methods involve a two phase process: a deposition phase, wherein silanol gro |
| 7622052 |
Methods for chemical mechanical planarization and for detecting endpoint of a CMP operation |
November 24, 2009 |
| Methods are provided for chemical mechanical planarization of a layer and for determining the endpoint of a CMP operation. In accordance with one embodiment the method for determining an endpoint comprises making a plurality of eddy current thickness measurement of the layer being pl |
| 7622024 |
High resistance ionic current source |
November 24, 2009 |
| A substantially uniform layer of a metal is electroplated onto a work piece having a seed layer thereon. This is accomplished by employing a "high resistance ionic current source," which solves the terminal problem by placing a highly resistive membrane (e.g., a microporous ceramic or |
| 7611757 |
Method to improve mechanical strength of low-K dielectric film using modulated UV exposure |
November 3, 2009 |
| Methods and apparatus for improving mechanical properties of a dielectric film on a substrate are provided. In some embodiments, the dielectric film is a carbon-doped oxide (CDO). The methods involve the use of modulated ultraviolet radiation to increase the mechanical strength while |
| 7605082 |
Capping before barrier-removal IC fabrication method |
October 20, 2009 |
| Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an |
| 7601393 |
Controlling the temperature of a substrate in a film deposition apparatus |
October 13, 2009 |
| A system and method for that allows one part of an atomic layer deposition (ALD) process sequence to occur at a first temperature while allowing another part of the ALD process sequence to occur at a second temperature. In such a fashion, the first temperature can be chosen to be low |
| 7589028 |
Hydroxyl bond removal and film densification method for oxide films using microwave post treatme |
September 15, 2009 |
| Methods of forming dielectric films with increased density and improved film properties are provided. The methods involve exposing dielectric films to microwave radiation. According to various embodiments, the methods may be used to remove hydroxyl bonds, increase film density, reduc |
| 7589017 |
Methods for growing low-resistivity tungsten film |
September 15, 2009 |
| Improved methods for depositing low resistivity tungsten films are provided. The methods involve depositing a tungsten nucleation layer on a substrate and then depositing a tungsten bulk layer over the tungsten nucleation layer to form the tungsten film. The methods provide precise c |
| 7585777 |
Photoresist strip method for low-k dielectrics |
September 8, 2009 |
| The present invention pertains to methods for removing unwanted material from a semiconductor wafer during wafer manufacturing. More specifically, the invention pertains to stripping photo-resist material and removing etch-related residues from a semiconductor wafer. Methods involve |
| 7585399 |
Rotating magnet arrays for magnetron sputtering apparatus |
September 8, 2009 |
| In one embodiment, a magnetron sputtering apparatus includes one or more magnet arrays for moving ions or charged particles on at least two plasma discharge paths on a target. Charged particles on one of the plasma discharge paths are moved in one direction, while charged particles on |
| 7585370 |
Gas-purged vacuum valve |
September 8, 2009 |
| A vacuum valve assembly for use in a vacuum processing chamber includes a seat defining an opening in the vacuum valve, with the seat having a sealing face adjacent the opening and normal to the direction of the opening; and a gate having a sealing face adapted to mate with the seat |
| 7582555 |
CVD flowable gap fill |
September 1, 2009 |
| The present invention meets these needs by providing improved methods of filling gaps. In certain embodiments, the methods involve placing a substrate into a reaction chamber and introducing a vapor phase silicon-containing compound and oxidant into the chamber. Reactor conditions ar |
| 7578923 |
Electropolishing system and process |
August 25, 2009 |
| The present invention provides a process for electropolishing a conductive surface of a semiconductor wafer. During the process, a contact electrode in a contact solution contacts a contact region on surface of the conductive layer with the contact solution. Further, during the process a |
| 7576006 |
Protective self-aligned buffer layers for damascene interconnects |
August 18, 2009 |
| Capping protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. Encapsulating PSAB layers are formed not only at the surface of the metal layers, but also within the |
| 7573061 |
Low-k SiC copper diffusion barrier films |
August 11, 2009 |
| Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the invention are composed of one or more layers of silicon carbide, at least one of the s |
| 7572354 |
Electrochemical processing of conductive surface |
August 11, 2009 |
| The present invention relates to methods and apparatus for plating a conductive material on a semiconductor substrate by rotating pad or blade type objects in close proximity to the substrate, thereby eliminating/reducing dishing and voids. This is achieved by providing pad or blade |
| 7569492 |
Method for post-etch cleans |
August 4, 2009 |
| The current invention provides methods for performing a cleaning process that provides greater cleaning efficiency with less damage to device structures. After etching and photoresist stripping, a first plasma clean is performed. The first plasma clean may comprise one or more steps. |
| 7569123 |
Optimizing target erosion using multiple erosion regions in a magnetron sputtering apparatus |
August 4, 2009 |
| In one embodiment, the erosion profile of a shaped target (e.g., hollow cathode target) of a magnetron apparatus is enhanced by using a plurality of sputtering tracks, such as plasma loops, on the target. The erosion profile may be optimized by recording the erosion profile and making |
| 7560016 |
Selectively accelerated plating of metal features |
July 14, 2009 |
| To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in |
| 7558045 |
Electrostatic chuck assembly with capacitive sense feature, and related operating method |
July 7, 2009 |
| A semiconductor workpiece processing system for treating a workpiece, such as a semiconductor wafer, is provided. A related operating control method is also provided. The system includes an electrostatic chuck configured to receive a workpiece, and a clamping voltage power supply coupled |
| 7550851 |
Adhesion of tungsten nitride films to a silicon surface |
June 23, 2009 |
| A process is described that forms a low resistivity connection between a tungsten layer and a silicon surface with high adherence of the tungsten to the silicon. The silicon surface is plasma-cleaned to remove native oxide. A very thin layer (one or more monolayers) of Si-NH.sub.2 is |
| 7550070 |
Electrode and pad assembly for processing conductive layers |
June 23, 2009 |
| An electrode assembly includes a distribution plate having a plurality of grooves that communicate with openings in an overlying polishing pad layer. The grooves include end openings that allow for draining of process solution, both during processing and subsequent cleaning/rinsing o |
| 7544115 |
Chemical mechanical polishing assembly with altered polishing pad topographical components |
June 9, 2009 |
| A chemical-mechanical polishing apparatus is provided that creates a uniform kinematical pattern on the surface of a wafer being polished. The apparatus may have a polishing pad comprising a polishing pad surface having a center point that lies within an axis of motion for the polish |
| 7541200 |
Treatment of low k films with a silylating agent for damage repair |
June 2, 2009 |
| The present invention provides methods of repairing damage to low-k dielectric film that is incurred by commonly used processes in IC fabrication. The methods may be integrated into an IC fabrication process flow at various stages. According to various embodiments, the methods of inv |
| 7531463 |
Fabrication of semiconductor interconnect structure |
May 12, 2009 |
| An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently remove |
| 7531079 |
Method and apparatus for uniform electropolishing of damascene IC structures by selective agitat |
May 12, 2009 |
| The present invention pertains to apparatus and methods for planarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by increasing the fluid agitation in raised regions with respect to recessed regions. |
| 7524735 |
Flowable film dielectric gap fill process |
April 28, 2009 |
| Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the subs |
| 7517444 |
Plating method and apparatus for controlling deposition on predetermined portions of a workpiece |
April 14, 2009 |
| The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative |
| 7514375 |
Pulsed bias having high pulse frequency for filling gaps with dielectric material |
April 7, 2009 |
| During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a puls |
| 7510982 |
Creation of porosity in low-k films by photo-disassociation of imbedded nanoparticles |
March 31, 2009 |
| Porous dielectric layers are produced by embedding and removing nanoparticles in composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive materi |
| 7510634 |
Apparatus and methods for deposition and/or etch selectivity |
March 31, 2009 |
| Disclosed are apparatus and method embodiments for achieving etch and/or deposition selectivity in vias and trenches of a semiconductor wafer. That is, deposition coverage in the bottom of each via of a semiconductor wafer differs from the coverage in the bottom of each trench of such |
| 7503830 |
Apparatus for reduction of defects in wet processed layers |
March 17, 2009 |
| The present invention provides an apparatus for wet processing of a conductive layer using a degassed process solution such as a degassed electrochemical deposition solution, a degassed electrochemical polishing solution, a degassed deposition solution, and a degassed cleaning soluti |
| 7503334 |
Apparatus and methods for processing semiconductor substrates using supercritical fluids |
March 17, 2009 |
| A system is provided for cleaning wafers that includes specialized pressurization, process vessel, recirculation, chemical addition, depressurization, and recapture-recycle subsystems. A solvent delivery mechanism converts a liquid-state sub-critical solution to a supercritical clean |
| 7491660 |
Method of forming nitride films with high compressive stress for improved PFET device performanc |
February 17, 2009 |
| A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride l |
| 7491653 |
Metal-free catalysts for pulsed deposition layer process for conformal silica laminates |
February 17, 2009 |
| A metal- and metalloid-free nanolaminate dielectric film can be formed according to a pulsed layer deposition (PDL) process. A metal- and metalloid-free compound is used to catalyze the reaction of silica deposition by surface reaction of alkoxysilanols. Films can be grown at rates f |
| 7491308 |
Method of making rolling electrical contact to wafer front surface |
February 17, 2009 |
| Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. |
| 7482247 |
Conformal nanolaminate dielectric deposition and etch bag gap fill process |
January 27, 2009 |
| Conformal nanolaminate dielectric deposition and etch back processes that can fill high aspect ratio (typically at least 5:1, for example 6:1), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps with significantly reduced incidence of voids or weak spots involv |
| 7482245 |
Stress profile modulation in STI gap fill |
January 27, 2009 |
| High density plasma (HDP) techniques form silicon oxide films having sequentially modulated stress profiles. The HDP techniques use low enough temperatures to deposit silicon oxide films in transistor architectures and fabrication processes effective for generating channel strain without |
| 7479191 |
Method for endpointing CVD chamber cleans following ultra low-k film treatments |
January 20, 2009 |
| Methods of determining the endpoint of cleaning residues from the internal surfaces of a chemical vapor deposition chamber are described. The methods are especially useful for determining when organic-based residues deposited from an ultra low-k film precursor deposition are removed from |
| 7477948 |
Apparatus and methods for precompiling program sequences for wafer processing |
January 13, 2009 |
| Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level cont |
| 7476621 |
Halogen-free noble gas assisted H.sub.2 plasma etch process in deposition-etch-deposition gap fi |
January 13, 2009 |
| Plasma etch processes incorporating H.sub.2/Noble gas etch chemistries. In particular, high density plasma chemical vapor etch-enhanced (deposition-etch-deposition) gap fill processes incorporating etch chemistries which incorporate hydrogen and one or more Noble gases as the etchant |
| 7476304 |
Apparatus for processing surface of workpiece with small electrodes and surface contacts |
January 13, 2009 |
| Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side wi |
| 7473653 |
Methods for producing low stress porous low-k dielectric materials using precursors with organic |
January 6, 2009 |
| Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon |
| 7468322 |
Methods of multi-step electrochemical mechanical planarization of Cu |
December 23, 2008 |
| A method is provided for removing conductive material from a metal layer deposited on a wafer having die level thickness variations on its surface. The method includes contacting the metal layer with a composition capable of planarizing die level thickness variations while using a cu |
| 7462527 |
Method of forming nitride films with high compressive stress for improved PFET device performanc |
December 9, 2008 |
| A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride l |
| 7456102 |
Electroless copper fill process |
November 25, 2008 |
| Disclosed is a procedure for bottom-up fill of electroless copper film in sub-micron integrated circuit features. By repeatedly placing an integrated circuit wafer in an electroless bath, a transient period of time of accelerated growth in the feature is repeated to achieve many smal |
| 7456101 |
Method for enhancing the nucleation and morphology of ruthenium films on dielectric substrates u |
November 25, 2008 |
| Methods for depositing a ruthenium metal layer on a dielectric substrate are provided. The methods involve, for instance, exposing the dielectric substrate to an amine-containing compound, followed by exposing the substrate to a ruthenium precursor and an optional co-reactant such that |
| 7449099 |
Selectively accelerated plating of metal features |
November 11, 2008 |
| To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in |
