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National Semiconductor Corporation Patents
Assignee:
National Semiconductor Corporation
Address:
Santa Clara, CA
No. of patents:
3899
Patents:




Patent Number Title Of Patent Date Issued
7298223 Methods and systems for electronic component test time improvement November 20, 2007
A timer circuit that has a normal mode and a test mode is disclosed. The test mode includes a power-up phase and a power-down phase. The timer circuit includes an oscillator and a first timer circuit portion coupled to the oscillator. The first timer circuit portion includes an input and
7298159 Method of measuring the leakage current of a deep trench isolation structure November 20, 2007
The trench leakage current of a deep trench isolation structure is measured. The deep trench isolation structure, which is filled with polysilicon, contacts both a first region of a first conductivity type and a second region of a second conductivity type, and is proximate to a third
7296124 Memory interface supporting multi-stream operation November 13, 2007
A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of conse
7295071 High speed, high DC gain and wide dynamic range amplifier November 13, 2007
A two-stage amplifier circuit fabricated in a dual gate oxide fabrication process having thick gate oxide devices as high voltage MOS transistors and thin gate oxide devices as low voltage MOS transistors includes a first stage amplifier and a second stage amplifier. The first stage
7292626 Method and system for efficient quantization in DAC and ADC for discrete multitone systems November 6, 2007
An ADSL modem includes a modulator unit with an output analog expander and/or a demodulator unit with an input analog compressor. The modulator unit further includes (a) a first DSP engine outputting a plurality of k-bit words to a non-linear discrete compressor, which compresses the
7291541 System and method for providing improved trench isolation of semiconductor devices November 6, 2007
A system and method is disclosed for providing improved trench isolation of semiconductor devices. An isolation trench of the present invention is manufactured as follows. A substrate of a semiconductor device is provided and a trench is etched in the substrate. Then a silicon liner is
7291525 System and method for manufacturing thin film resistors using a trench and chemical mechanical p November 6, 2007
A system and method is disclosed for manufacturing thin film resistors using a trench and chemical mechanical polishing. A trench is etched in a layer of dielectric material and a thin film resistor layer is deposited so that the thin film resistor layer lines the trench. A thin film
7289921 System and method for providing an improved voltage monitor for an adjustable supply voltage in October 30, 2007
A system and method is disclosed for providing an improved voltage monitor that is capable of determining that a value of an adjustable supply voltage is suitable for a requested performance level in an adaptive voltage scaling system. An integrator circuit of the voltage monitor int
7288439 Leadless microelectronic package and a method to maximize the die size in the package October 30, 2007
Arrangements and methods of packaging integrated circuits in leadless leadframe packages configured for maximizing a die size are disclosed. The package is described having an exposed die attach pad and a plurality of exposed contacts formed from a common substrate material. The cont
7287323 Materials and structure for a high reliability BGA connection between LTCC and PB boards October 30, 2007
A ceramic circuit structure comprising a plurality of ceramic layers and at least one electronic component embedded within the plurality of ceramic layers. Within a first one of the ceramic layers is a via that passes through the ceramic layer. A contact pad is formed on a surface of
7286810 Capacitor load mixer with PAM function October 23, 2007
A phase alternating mixer is implemented by common-base differential transistor pairs, with two cross-coupled pairs providing a switching mixer function with harmonic gating suppression of harmonic responses to the switching mixing by control of local oscillator signals controlling s
7286593 System and method for channel estimation in a radio frequency receiver October 23, 2007
A channel estimator for determining channel weighting coefficients for a finger of the RAKE receiver. The channel estimator comprises: 1) a first correlator for receiving a first pilot channel signal and correlating the first pilot channel signal with a first pilot channel chip pattern
7286589 Method and apparatus for generation of downlink scrambling code in wideband CDMA mobile devices October 23, 2007
An initialization method is performed to initialize the states for producing downlink scrambling code for a wideband code division multiple access (WCDMA) mobile device. The initialization method uses an auxiliary linear feedback shift register (x-LFSR) advance the x-initial state to a
7286383 Bit line sharing and word line load reduction for low AC power SRAM architecture October 23, 2007
In a SRAM structure, space and power saving is achieved by providing row and column select lines to select a specific bit cell, and reducing the number of bit lines in the structure used for writing to and reading from the bit cells. The number of bit lines is reduced by sharing bit line
7286175 Bias control circuitry for cathode ray tube beam currents October 23, 2007
Bias control circuitry and method for use in controlling one or more cathode ray tube (CRT) beam currents.
7285992 Amplifier with charge-pump generated local supplies October 23, 2007
An amplifier system includes a follower-type output stage that is driven by a pre-driver circuit. The follower-type output stage that is operated from VCC and GND (or VEE) power supplies. The pre-driver circuit for the follower output stage is operated from local power supplies correspon
7285978 Circuit and method for impedance calibration of output impedance of LVDS driver October 23, 2007
An H-bridge LVDS driver circuit includes a means to calibrate the output impedance of the switches of an LVDS driver to any desired value.
7285805 Low reference voltage ESD protection device October 23, 2007
In a low voltage ESD protection device, an extra control electrode is created by not connecting the n+ drain and p+ emitter regions of the LVTSCR, and controlling the control electrode by means of a diode connected NMOS.
7283083 Pipelined analog-to-digital converter with mid-sampling comparison October 16, 2007
A double-sampled pipeline analog-to-digital conversion (ADC) system and method in which latching of the intrastage digital quantization signals occurs approximately midway the leading and trailing edges of the clock signals.
7282375 Wafer level package design that facilitates trimming and testing October 16, 2007
A wafer level method of packaging, trimming and testing integrated circuits is described. A wafer having trim pads is bumped before the wafer is trimmed. After the bumping, the dice on the wafer are trimmed and tested using standard trim probing and test probing techniques. After the
7279976 Differential amplifier with controlled common mode output voltage October 9, 2007
A differential amplifier circuit with a self-controlled common mode output voltage.
7279960 Reference voltage generation using compensation current method October 9, 2007
A reference voltage generator that may be useful in analog-to-digital converter (ADC) circuits includes compensation for errors such as from non-ideal considerations such as semiconductor processing variations, mismatch errors, temperature gradients, and parasitic effects. The compen
7279958 Synthesized resonation for an EL driver circuit October 9, 2007
A driver circuit for an electroluminescent (EL) lamp that consumes less power and reduces electromagnetic interference (EMI). Electrical charge is stored during a discharge cycle of an AC signal employed to illuminate an EL lamp, and subsequently reused during the AC signal's charging
7279940 Switched-capacitor circuit with time-shifted switching scheme October 9, 2007
A switched-capacitor circuit for sampling a pair of differential input signals includes a first bootstrapped switch and a first non-boosted switch connected in parallel between a first output terminal of an amplifier and a first feedback node of the switched-capacitor circuit to form
7279921 Apparatus and method for testing power and ground pins on a semiconductor integrated circuit October 9, 2007
To achieve the foregoing, and in accordance with the purpose of the present invention, a method and apparatus for testing individual power and ground pins on a semiconductor integrated circuit are disclosed. The method and apparatus includes organizing the power pins of the die into a
7279343 De-packaging process for small outline transistor packages October 9, 2007
A method to de-packaging a semiconductor device to access and test the die within the package. The method involves initially removing molding compound from a first surface of the package to expose the underlying die attach pad of the package. A mask is then formed over the die attach-pad
7277135 Video display signal brightness control circuit October 2, 2007
Video signal control circuitry for use in a video display system in which a variation in a brightness level of a video display signal causes a corresponding variation in a beam current signal, wherein such video signal control circuitry maintains a controllable video display signal b
7276962 Circuit topology for reduced harmonic distortion in a switched-capacitor programmable gain ampli October 2, 2007
A switched-capacitor programmable gain amplifier (PGA) has improved circuit performance that avoids impracticably small capacitors, while providing low total harmonic distortion (THD) and reasonable gain linearity. The sampling capacitor (CS) in the PGA is designed with a C-2C capaci
7276938 Transfer gate having overvoltage protection and method October 2, 2007
A circuit includes a first native or depletion n-channel Metal Oxide Semiconductor (MOS) transistor and a second native or depletion n-channel MOS transistor. The first and second native or depletion n-channel MOS transistors are capable of receiving an input signal. The circuit also
7276890 Precision bandgap circuit using high temperature coefficient diffusion resistor in a CMOS proces October 2, 2007
Disclosed are bandgap circuits that use a resistive divider circuit to modulate the gate voltage of a reference source transistor. The reference voltage transistor is modulated at the base by a voltage that varies inversely with temperature. In this fashion, high sheet resistance poly
7276885 Apparatus and method for power sequencing for a power management unit October 2, 2007
A PMU that includes LDOs is provided. The PMU also includes, for each LDO, a corresponding reference circuit that provides a reference voltage for the LDO. Further, the PMU includes a central bias circuit that provides a reference current to each of the voltage reference circuits. Each
7274183 Versatile system for high-power switching controller in low-power semiconductor technology September 25, 2007
The present invention provides a versatile system for providing a current-mode switching controller--in low voltage commercial semiconductor technologies--that is compatible with applications having very high input voltage ranges. The system provides an output transistor and a sense
7274114 Integrated tracking voltage regulation and control for PMUIC to prevent latch-up or excessive le September 25, 2007
A tracking and control method and circuit for use in a power management unit integrated circuit (PMUIC) that enables multiple voltage regulator outputs to maintain a same voltage or a ratiometric relation to a reference voltage source. When the reference voltage source is powered dow
7272376 Look-up table implementation of WCDMA frame synchronization and cell group ID detection September 18, 2007
The present invention is directed towards a look-up table implementation of a WCDMA frame synchronization and a cell group ID detection (both of which are comprised within a "secondary search" process). The secondary search process receives a signal (which is formatted as slots within a
7272159 Apparatus and method for a laserdiode driver with a distributed current mirror September 18, 2007
A LDD that includes write channels and a distributed output current mirror is provided. The distributed output current mirror includes a current mirror for each of the write channels. For each write channel, if the write channel is enabled, it provides a current to the corresponding
7271788 Generating adjustable-delay clock signal for processing color signals September 18, 2007
Circuits, devices and methods provide a phase delay and use it to select when an analog color signal is converted to digital. The phase delay is adjustable, which permits choosing a moment in time when conversion results in improved processing. A PLL circuit receives the synchronizing
7271660 Selectively adding auxiliary frequency compensation depending on the behaviour of an output tran September 18, 2007
A frequency compensation device for providing added compensation to an operational amplifier, such as a bipolar or MOS rail-to-rail output operational amplifier, when the output device of the operational amplifier is in saturation. The device comprises a detector circuit for detectin
7271626 Suppression of parasitic ringing at the output of a switched capacitor DC/DC converter September 18, 2007
A multi-stage transistor circuit is provided in which the multiple transistor stages are coupled in parallel and switched individually in sequence by a series arrangement of buffers. Each buffer drives the gate of a corresponding stage of the multi-stage transistor circuit with a gat
7271606 Spring-based probe pin that allows kelvin testing September 18, 2007
The voltage at a node of an integrated circuit can be measured or controlled using a two-wire kelvin contact with spring-based probe pins by offsetting and tapering the lower end section of the spring-based probe pin. As a result, multiple spring-based probe pins can be connected to
7271029 Method of forming a package-ready light-sensitive integrated circuit September 18, 2007
A package-ready light-sensitive integrated circuit and process for preparing a light-sensitive semiconductor substrate for packaging that provide for a reduced exposure of a light-sensitive integrated circuit to light. The package-ready light-sensitive integrated circuit includes a s
7269027 Ceramic optical sub-assembly for optoelectronic modules September 11, 2007
Optoelectronic components, specifically, ceramic optical sub-assemblies are described. In one aspect, the optoelectronic component includes a ceramic base substrate having a pair of angled (or substantially perpendicular) faces. The electrical traces are formed directly on the cerami
7268790 Display system with framestore and stochastic dithering September 11, 2007
A display system provides temporal stochastic dithering to image data for storage in a frame buffer for display. Stochastic dithering is used to reduce the size of the frame buffer and the complexity of the drive circuitry that is used to display an image in accordance with the image
7268609 Logarithmic detector or logarithmic amplifier having chopper stabilized logarithmic intercept September 11, 2007
One embodiment of the present invention is directed to an apparatus for reducing errors affecting the intercept of a logarithmic device, the apparatus including a first switching device coupled to an input of the logarithmic device. The first switching device for switches the input of
7268593 Apparatus and method for single pin current-programmable multi-function/multi-purpose selector September 11, 2007
A circuit for providing an output current is provided. The circuit includes a differential amplifier, a transistor having a gate that is coupled to the output of the differential amplifier, a comparator, and a sense resistor that is coupled between the drain of the transistor and the
7268526 Switch mode power supply control circuit September 11, 2007
An apparatus and method is arranged to dynamically adjust a pulse width (e.g., off-time pulse) associated with a switching device in a converter such as a buck converter, a boost converter, or a buck-boost regulator. A one-shot circuit is configured to dynamically initiate a pulse cycle
7268410 Integrated switching voltage regulator using copper process technology September 11, 2007
Improvements in the level of integration of a core buck and/or boost DC-DC voltage regulator sub-circuit lead to a lower manufacturing cost structure, an improved performance from lessened intrinsic parasitic resistance, a smaller die size and, thus, higher wafer yield. Further, by i
7268398 ESD protection cell with active pwell resistance control September 11, 2007
In an NMOS device, the turn-on voltage or the triggering voltage is reduced by adding an NBL connected to an n-sinker and contacted through an n+ region, which is connected to a bias voltage. The bias voltage may be provided by the drain contact or by a separate bias voltage.
7267930 Techniques for manufacturing a waveguide with a three-dimensional lens September 11, 2007
Optical transmission structures include a waveguide and an optical lens wherein the optical lens has a sufficiently large thickness to allow the formation of a curved front lens surface that collimates transmitted light rays so that they travel within a plane that is coplanar to a wo
7265705 Opamp and capacitor sharing scheme for low-power pipeline ADC September 4, 2007
A first stage circuit for a high-speed, high-resolution pipeline analog-to-digital converter (ADC) implements operational amplifier (opamp) sharing and capacitor sharing to combine the sample-and-hold (SAH) and the MDAC (multiplying digital to analog converter) functions in the first
7265621 Fully differential operational amplifier with fast settling time September 4, 2007
An operational amplifier includes a pair of differential input transistors, a pair of cascode transistors and a keep-alive circuit. The pair of differential input transistors is connected together at the source terminals and the gate terminals of the input transistors receive a pair

 
 
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