| Patent Number |
Title Of Patent |
Date Issued |
| 7468723 |
Apparatus and method for creating large display back-lighting |
December 23, 2008 |
| A driver for a series-coupled white LED string is provided. The driver includes a boost converter that is arranged to provide an output voltage from a source voltage. Also, the driver includes one switch that is coupled across half of the series-coupled LEDs, and another switch that |
| 7468288 |
Die-level opto-electronic device and method of making same |
December 23, 2008 |
| The invention includes a die-level opto-electronic device with a semiconductor die and a photonic device including a conductive structure formed in the die away from the edges of the die. The conductive structure is electrically connected to the photonic device. The device also inclu |
| 7464459 |
Method of forming a MEMS actuator and relay with vertical actuation |
December 16, 2008 |
| A method of forming an actuator and a relay using a micro-electromechanical (MEMS)-based process is disclosed. The method first forms the lower sections of a square copper coil, and then forms a magnetic core member. The magnetic core member, which lies directly over the lower coil s |
| 7463131 |
Patterned magnetic layer on-chip inductor |
December 9, 2008 |
| An on-chip inductor structure includes top and bottom metal plates that are formed to surround a conductor coil formed between the top and bottom plates, but is separated therefrom by intervening dielectric material. The top and bottom plates are preferably formed from a ferromagnetic |
| 7463089 |
Class D audio power amplifier for mobile applications |
December 9, 2008 |
| A fully differential class D amplifier is provided. The class D amplifier includes an active amplifier in the feedback path of the modulator. In one embodiment, the class D amplifier includes a fully differential amplifier as an input buffer, in which a supply-independent reference v |
| 7462874 |
Silicon-based light-emitting structure |
December 9, 2008 |
| A silicon-based light emitting structure is formed as a high density array of light-emitting p-n junctions that substantially increases the intensity of the light emitted in a planar region. The p-n junctions are formed using standard CMOS processing methods, and emit light in response |
| 7461974 |
Beta variation cancellation in temperature sensors |
December 9, 2008 |
| An apparatus and method for canceling variations in the beta for a bipolar junction transistor so that the diode equation can be employed to accurately measure the temperature of the transistor based at least in part on a ratio of two target collector currents and two measurements of |
| 7460024 |
Active sensor circuitry for operating at low power and low duty cycle while monitoring occurrenc |
December 2, 2008 |
| Active sensor circuitry for operating at low power and a low duty cycle while monitoring for an occurrence of an anticipated event. |
| 7459886 |
Combined LDO regulator and battery charger |
December 2, 2008 |
| A method and circuit for simultaneously charging a battery and providing supply voltage to a load. The circuit includes a low-drop-out voltage (LDO) regulator and a constant-current, constant-voltage (CC-CV) regulator. In one embodiment, CC-CV regulator provides a control voltage to |
| 7457386 |
System and method for cancelling signal echoes in a full-duplex transceiver front end |
November 25, 2008 |
| There is disclosed an echo canceller circuit for use in a full duplex transceiver of the type comprising a line driver capable of sending analog transmit signals through a cable and comprising a line receiver capable of receiving analog receive signals from the cable. An echo cancell |
| 7457317 |
Method and system for using variable-size frame-based events for communicating over an interface |
November 25, 2008 |
| A method for minimizing bandwidth consumption for communicating over an interface is provided that includes defining a one-frame event that comprises a specified operation type and defining an n-frame event that comprises the specified operation type. A single frame is assembled for |
| 7456677 |
Fractional gain circuit with switched capacitors and smoothed gain transitions for buck voltage |
November 25, 2008 |
| A switch array circuit that enables voltage regulation by bucking a relatively larger input voltage as it declines over time with different fractional gains that are based on different gain phase arrangements for a plurality of capacitors. A common rest phase is provided during the s |
| 7456503 |
Integrated circuit package |
November 25, 2008 |
| A semiconductor device, including methods and arrangements for making the same, are described. The device includes an integrated circuit die having a plurality of bond pads. At least one bond pad on the active surface of the die is an extended I/O pad. Each extended I/O pad extends to at |
| 7456097 |
System and method for faceting via top corners to improve metal fill |
November 25, 2008 |
| A system and method is disclosed for providing an etch procedure to facet the top corners of a via in a semiconductor device. A vertical anisotropic dry etch process is applied through an aperture in a resist mask to etch through a dielectric layer down to a bottom conductor layer. T |
| 7456030 |
Electroforming technique for the formation of high frequency performance ferromagnetic films |
November 25, 2008 |
| A hybrid method of fabricating magnetic core elements of an on-chip inductor structure addresses issues associated with conventional bottom up and damascene magnetic core plating techniques. The process uses two seed layers: a low resistance seed layer that solves the IR drop problem |
| 7454647 |
Apparatus and method for skew measurement |
November 18, 2008 |
| A skew measurement system and method wherein each of the signals among which the skew is to be determined is connected one at a time to a clock recovery loop. The locked state of the clock recovery loop is used as an indicator of the skew of the data signal relative to the internal clock |
| 7454640 |
System and method for providing a thermal shutdown circuit with temperature warning flags |
November 18, 2008 |
| A system and method is disclosed that provides a thermal shutdown circuit that generates a plurality of temperature warning flag signals. Each temperature warning flag signal represents a different temperature. The thermal shutdown circuit comprises a plurality of inverter circuits in |
| 7453726 |
Non-volatile memory cell with improved programming technique and density |
November 18, 2008 |
| A single 4-transistor non-volatile memory (NVM) cell includes a shared static random access memory cell. The NVM cell utilizes a reverse Fowler-Nordheim tunneling programming technique that, in combination with the shared SRAM cell structure, allows an entire cell array to be program |
| 7453389 |
Correlated double sampling ping-pong architecture with reduced DAC capacitors |
November 18, 2008 |
| A method and apparatus can be arranged with a correlated double sampler circuit (CDS) for processing an output signal from an imaging device such as a charge-coupled device (CCD) image sensor. The CDS circuit includes an amplifier, a set of capacitors that are dynamically configured for |
| 7453252 |
Circuit and method for reducing reference voltage drift in bandgap circuits |
November 18, 2008 |
| A circuit includes a bandgap core and a bandgap amplifier. The bandgap core is capable of receiving an input voltage and generating an output voltage. A second-order temperature coefficient in the output voltage is at least partially reduced by the bandgap core while a first-order te |
| 7453245 |
Method and system for providing precise current regulation and limitation for a power supply |
November 18, 2008 |
| A method for providing precise current regulation and limitation for a power supply is provided. The method includes amplifying any difference between a load current signal and a current setting reference signal with a feedback loop amplifier to generate a feedback signal. A power output |
| 7453244 |
Low dropout regulator with control loop for avoiding hard saturation |
November 18, 2008 |
| A hard saturation mode of operation can be avoided in an LDO regulator by providing an additional feedback control loop. The additional control loop cooperates with the LDO regulator's amplifier stage and output stage to maintain at least a minimum desired voltage drop across the output |
| 7450359 |
System and method for providing a temperature compensated under-voltage-lockout circuit |
November 11, 2008 |
| A system and a method are disclosed for providing a temperature compensated under-voltage-lockout circuit that has a trip point voltage that is not sensitive to temperature variation. The under-voltage-lockout circuit of the invention comprises (1) an inverter circuit that is coupled |
| 7450047 |
Sigma-delta modulator with DAC resolution less than ADC resolution and increased dynamic range |
November 11, 2008 |
| A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfe |
| 7449943 |
Matching for time multiplexed resistors |
November 11, 2008 |
| An embodiment of the present invention is directed to a method of matching time-multiplexed resistors to a known ratio including generating a control signal from a control circuit, which includes a value that defines a configuration. The method also includes receiving the control sig |
| 7447064 |
System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transi |
November 4, 2008 |
| A system and method is disclosed for providing a CMOS compatible single poly electrically erasable programmable read only memory (EEPROM) with memory cells that comprise an NMOS program transistor. In a first embodiment the memory cells of the EEPROM comprise a PMOS control capacitor |
| 7444042 |
Optical switch |
October 28, 2008 |
| An optical switch is implemented with one or more cantilevered optical channels, which are formed in a flexible waveguide structure, and an actuator which is connected to the cantilevered optical channels, to position the cantilevered optical channels to direct an optical signal alon |
| 7443936 |
Sequence detector using Viterbi algorithm with reduced complexity sequence detection via state r |
October 28, 2008 |
| A sequence detector (1600-w) operating generally according to the Viterbi algorithm uses state reduction via division into symbol families to reduce the complexity of sequence detection. The sequence detector contains a branch metric generator (1402-w), comparison circuitry (1603-w), |
| 7443905 |
Apparatus and method for spread spectrum clock generator with accumulator |
October 28, 2008 |
| A method and apparatus for spread spectrum clock generation is provided. Modulation of the clock signal may be accomplished with an N/N-1 clock divider. The N/N-1 clock divider is configured to divide the clock signal by N or N-1, depending on the carry output signal of an accumulator |
| 7443226 |
Emitter area trim scheme for a PTAT current source |
October 28, 2008 |
| A current source for generating a PTAT current using two bipolar transistors with an 1:A emitter area ratio implements a split resistor architecture to cancel mismatch errors in the current mirror of the current source. In one embodiment, a first resistor is coupled to the unit area |
| 7441219 |
Method for creating, modifying, and simulating electrical circuits over the internet |
October 21, 2008 |
| The present invention enables a user to create, modify, simulate and save an electrical circuit using an Internet browser over an Internet connection. The user can change the connectivity of the circuit as well as add and/or remove components in a free form manner. The schematic is d |
| 7436243 |
Integrated circuits with on-chip AC noise suppression |
October 14, 2008 |
| On-chip AC noise suppression is provided for a target circuit within an integrated circuit chip. A power supply line filter is provided in the power supply line that feeds the target circuit. The filter includes a polysilicon resistor formed over a charged substrate well, with a diel |
| 7436242 |
System and method for providing an input voltage invariant current source |
October 14, 2008 |
| A system and method is disclosed for providing a current source that has an approximately constant value of output current over a range of supply voltages. The current source of the invention comprises a plurality of peaking current source circuits coupled in parallel. Each of the pl |
| 7436203 |
On-chip transformer arrangement |
October 14, 2008 |
| An integrated circuit requires on-chip termination resistor for minimizing reflections from input signals supplied by an external signal source. The input signal is applied across two bonding pads which serve as input terminals for the integrated circuit. The first bonding pad is coupled |
| 7436197 |
Virtual test head for IC |
October 14, 2008 |
| In a test system for a semiconductor device, the device under test (DUT) is remotely located relative to the tester that generates the test vector signals. The tester and remotely located DUT are connected by a serial connection and each includes a serializer-deserializer for converting |
| 7436152 |
Method and system for charge current control |
October 14, 2008 |
| A charge current control system is disclosed. One embodiment of the present invention includes a voltage detecting component that determines whether voltage stored by a load is at a voltage threshold. Also included are current supplying components that supply a charge current to the load |
| 7435628 |
Method of forming a vertical MOS transistor |
October 14, 2008 |
| A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain region, the channel region, and partially into the source region. The vertical MOS transis |
| 7433375 |
Laser trim and compensation methodology for passively aligning optical transmitter |
October 7, 2008 |
| A method embodiment of the invention includes a scheme for trimming and compensation of a laser emitter in a fiber optic link. A laser emitter is provided. Also a reference optical power value is determined using data models of laser emitter performance generated by statistical analysis |
| 7432752 |
Duty cycle stabilizer |
October 7, 2008 |
| A duty cycle stabilizer circuit (50) receiving an input clock signal and generating an output clock signal having a first duty cycle includes a leading edge pulse generator (52) and a pulse width extender circuit (54). The pulse generator generates a first clock pulse (V.sub.1) having |
| 7432696 |
Apparatus and method for low input voltage current mirror circuit |
October 7, 2008 |
| A low-voltage current mirror circuit is provided. The low-voltage current mirror circuit includes a current mirror including first and second transistors, a buffer circuit, and a third transistor. The first transistor is the input transistor to the low-voltage current mirror circuit. |
| 7432671 |
Method and apparatus for a level-shift inverter for cathode ray tube blanking |
October 7, 2008 |
| A level-shifting inverting circuit provides a blanking signal to Grid 1 of a CRT. The circuit provides the blanking signal from a blanking logic signal according to a voltage transfer characteristic that is substantially similar to the voltage transfer characteristic of a standard CM |
| 7432583 |
Leadless leadframe package substitute and stack package |
October 7, 2008 |
| A semiconductor package is provided with an internal package formed in the cavity of the external leadless leadframe package (LLP). The internal package is a leadless leadframe package and provides a substrate for mounting one or more die and passive devices to form the external LLP. By |
| 7432575 |
Two-layer electrical substrate for optical devices |
October 7, 2008 |
| A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of t |
| 7431516 |
Optical sub-assembly packaging techniques that incorporate optical lenses |
October 7, 2008 |
| Techniques for manufacturing an optical transmission device in a manner so that the photonic device is protected from damage that can be caused by exposure to the environment and physical handling are described. The invention involves placing a lens or a lens array over a photonic device |
| 7430133 |
Apparatus and method for switch connected as a diode in a charge pump |
September 30, 2008 |
| A switched-capacitor type voltage regulator is provided. The regulator includes a flying capacitor and switches, including first and second transistors which operate as switches. The switches are arranged to operate such that the flying capacitor is coupled to an input voltage during |
| 7425741 |
EEPROM structure with improved data retention utilizing biased metal plate and conductive layer |
September 16, 2008 |
| A biased conductive plate is provided over an NVM cell structure to overcome data retention charge loss due to the presence of dielectric films that are conductive at higher temperatures. The biased conductive plate is preferably formed from the lowest metal layer in the fabrication |
| 7425503 |
Apparatus and method for enhanced thermal conductivity packages for high powered semiconductor d |
September 16, 2008 |
| An apparatus and method for an enhanced thermally conductive package for high powered semiconductor devices. The package includes a semiconductor die having an active surface and a non-active surface and a metal layer formed on the non-active surface of the die. The package is intended t |
| 7424507 |
High speed, low power, pipelined zero crossing detector that utilizes carry save adders |
September 9, 2008 |
| A zero crossing detector employs carry save adders combined with fully pipelined logic to provide two-bit, three-bit or four-bit zero crossing detection. The detector offers the advantages of very high operating speed, very low power dissipation, low adder cell count and reduced chip |
| 7423494 |
Apparatus and method for a spread-spectrum oscillator for magnetic switched power converters |
September 9, 2008 |
| A method and apparatus for a spread-spectrum oscillator for a switched power converter is provided. The spread-spectrum oscillator includes a current waveform generation circuit, a capacitor, a switch, and a comparator. The capacitor is arranged to receive an oscillator current to pr |
| 7423467 |
Circuit for controlling duty cycle distortion |
September 9, 2008 |
| A circuit for controlling a duty cycle of a clock signal. The circuit includes a duty cycle control loop that includes a voltage-to-duty cycle (V-to-DC) converter, an output driver, a duty-cycle-to voltage (DC-to-V) converter, and an operational amplifier. The V-to-DC converter receives |
