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National Semiconductor Corporation Patents
Assignee:
National Semiconductor Corporation
Address:
Santa Clara, CA
No. of patents:
3903
Patents:




Patent Number Title Of Patent Date Issued
7541861 Matching for time multiplexed transistors June 2, 2009
An embodiment of the present invention is directed to a method of matching currents to a known ratio including generating a control signal from a control circuit, which includes a value that defines a configuration. The method also includes receiving the control signal at a switching cir
7541795 Apparatus and method for start-up and over-current protection for a regulator June 2, 2009
A regulator is provided. In one embodiment, the regulator operates as follows. During steady-state conditions, the switching frequency is maintained substantially constant. During start-up and/or in response to an over-current event, the reference voltage is attenuated. For example,
7541253 Method of forming an integrated resistor June 2, 2009
In a semiconductor device, a thin film resistor is formed by making use of an interconnect structure and etching back the layers over the glue layer of the interconnect structure and using the glue layer as a thin film resistor.
7539467 Low leakage IC input structures including slaved standby current shut-off and increased gain for May 26, 2009
Leakage current at the inputs of an integrated circuit can be reduced by providing a master/slave arrangement wherein a plurality of slave inputs are controlled by an enable input acting as a master. When the enable input is deactivated, the slave inputs break their leakage current paths
7538589 Cable driver using signal detect to control input stage offset May 26, 2009
A system, apparatus and method are arranged for monitoring an input signal for a line driver and determining if a valid data signal is present. When the input signal is determined to be an invalid data signal, an offset is introduced into the input stage of the line driver to prevent noi
7535195 Battery charger that employs current sharing to simultaneously power an application and charge a May 19, 2009
Circuitry for powering a load and charging of a battery from a power source by a smart power supply is provided. The smart power supply controls the maximum current for battery charging based in part upon variables such as the maximum rate of charge of the battery and maximum source
7532496 System and method for providing a low voltage low power EPROM based on gate oxide breakdown May 12, 2009
A system and method are disclosed for providing an electrically programmable read only memory (EPROM) in which each memory cell comprises an NMOS select transistor and a PMOS program transistor with a thick gate oxide and a PMOS breakdown transistor with a thin gate oxide. The source
7532252 Video mode detection circuit May 12, 2009
A video signal mode detector for automatically detecting and indicating the type of video signal being received in terms of its video signal characteristics, including horizontal line count and progressive or interlaced scanning.
7532043 Signal detector output for cable driver applications May 12, 2009
The present disclosure relates to a system, apparatus and method for a line driver circuit to generate a signal detect (SD) signal when an invalid data signal is detected at its input. An invalid signal may be present either when no signal is available or when the line driver circuit
7531896 Semiconductor device having a minimal via resistance created by applying a nitrogen plasma to a May 12, 2009
A system and method is disclosed for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition. A via in a semiconductor device is formed by placing a metal layer on a substrate and placing a layer of anti-reflective coating (ARC) titanium
7531824 High value inductor with conductor surrounded by high permeability polymer formed on a semicondu May 12, 2009
An apparatus and method for fabricating high value inductors embedded on semiconductor integrated circuit. The apparatus and method involve forming a conductor on the semiconductor substrate. Once the conductor is formed, a polymer material is provided on the substrate surrounding the
7528012 Method for forming heat sinks on silicon on insulator wafers May 5, 2009
An apparatus and method for a heat sink to dissipate the heat sourced by the encapsulated transistors in a SOI wafer. The apparatus includes a transistor formed in the active silicon layer of the wafer. The active surface is formed over an oxide layer and a bulk silicon layer. A heat
7526053 Sequence detector using viterbi algorithm with soft output error correction April 28, 2009
A sequence detector (1400-w) operating generally according to the Viterbi algorithm contains a branch metric generator (1402-w), comparison circuitry (1403-w), and symbol generation circuitry (1404, 1405, and 1406) for converting digital values of a detector input signal into a seque
7525464 Sigma-delta modulator with DAC resolution less than ADC resolution April 28, 2009
A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfe
7525365 System and method for providing an offset voltage minimization circuit April 28, 2009
A system and method is disclosed for providing an offset voltage minimization circuit for an amplifier circuit. The present invention comprises a flip flop zero amplifier circuit that is capable of operating in a first configuration during a first period of time to obtain a first val
7525358 Duty-cycle correction for clock receiver April 28, 2009
A clock receiver for an integrated circuit includes duty-cycle correction capabilities based on monitoring an average value associated with an internally generated clock signal. An active adjustment circuit within the clock receiver provides correction to each leg of the differential
7525348 Differential voltage comparator April 28, 2009
A circuit and method for comparing and providing a signal indicative of a difference in magnitude between a differential signal voltage and a differential reference voltage.
7525323 Method for measuring permeability of a ferromagnetic material in an integrated circuit April 28, 2009
A method for determining consistency of a permeability of a ferromagnetic material in integrated circuits in which a test strip of the subject ferromagnetic material is included for testing with an impedance measurement instrument, such as an inductance-capacitance-resistance (LCR) m
7524107 Dual purpose output thermostat April 28, 2009
A thermostat circuit is arranged for dual purpose operation to save pins in a small package. The circuit includes a temperature sensor circuit, a trip-point reference circuit, a switching circuit, an amplifier circuit, and a comparator circuit. The trip-point reference circuit provides a
7523374 Method and apparatus for initial BCH decoding in a WCDMA system April 21, 2009
When an initial frame alignment during decoding of multi-frame data segments fails a cyclic parity check, a portion of the received data is retained and reused for a second decode attempt using a different frame alignment. For BCH data transmitted within a WCDMA system, the second of
7522216 Video synchronization signal detection circuit April 21, 2009
A video synchronization signal detector for detecting occurrences of single and double frequency synchronization signal pulses present during a vertical synchronization interval.
7522079 Sigma-delta modulator with DAC resolution less than ADC resolution and increased tolerance of no April 21, 2009
A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfe
7521963 System and method for providing a low standby power interface for a low voltage I2C compatible b April 21, 2009
A system and method for providing a low standby power interface for a low voltage I2C compatible bus is disclosed. A level shifter circuit is provided that comprises a first input connected to the I2C compatible bus, a second input connected to a busy signal line from an I2C slave mo
7521310 Vertical thyristor in complementary SiGe bipolar process April 21, 2009
In a complementary SiGe bipolar process, a pnpn thyristor structure is formed from some of the layers of a pnp transistor and an npn transistor formed on top of each other and making use of the SiGe gates to define the blocking junction.
7519789 Method and system for dynamically selecting a clock edge for read data recovery April 14, 2009
A method for dynamically selecting a clock edge for recovering read data received from a slave at a master is provided that includes determining whether an internal clock signal is high when a first bit of read data is received at the master. One of a falling edge and a rising edge of th
7518442 Circuit and method for suppressing switching and supply-related errors in a PWM power stage by i April 14, 2009
A class D amplifier is provided. The class D amplifier includes a modulator and a class D power stage. The modulator provides a PWM output signal to the class D power stage. For each pulse of the PWM input signal, the class D amplifier provides a corresponding pulse in the PWM output
7518439 High precision gain amplifier without precision passive components April 14, 2009
An amplifier circuit uses capacitor as voltage sources so that the amplifier can achieve high precision gain without either ratioed capacitors or absolute value of capacitors or resistors. In one embodiment, the amplifier circuit includes two or more capacitors that are each charged
7518436 Current differencing circuit with feedforward clamp April 14, 2009
A current difference circuit is provided. The currents difference circuit provides an output current that is the difference of two input currents, while employing feedforward to clamp the output current. The current difference circuit brings the lower of the two input currents along with
7518421 System and method for providing a kick back compensated charge pump with kicker capacitor April 14, 2009
A kick back compensated charge pump circuit with kicker capacitor is disclosed. The charge pump circuit comprises a pump up circuit that comprises a first PMOS transistor and a second PMOS transistor in a cascode configuration and coupled to a first kicker capacitor. The charge pump
7518419 Wideband power-on reset circuit April 14, 2009
A power-on reset circuit includes a trigger circuit that indicates when a power supply has been turned on, and when the supply has reached a voltage level that is sufficient for normal chip operation. For chips that contain a crystal oscillator, the power-on reset circuit also includ
7518348 Adaptive error amplifier clamp circuit to improve transient response of DC/DC converter with cur April 14, 2009
A current mode controlled DC/DC converter that includes an adaptive clamp voltage circuit at an error amplifier output to significantly reduce overshoot in the output of the converter if the target voltage changes rapidly. If a current limiter is active, the clamp level of the adaptive
7516377 System and method for testing an on-chip initialization counter circuit April 7, 2009
An apparatus and method is disclosed for providing automated testing for an on-chip initialization counter circuit that comprises a plurality of counter flip-flop circuits that are used in the initialization of an integrated circuit. The apparatus comprises a state machine and a state
7515310 Programmable gain amplifier with hybrid digital/analog architecture April 7, 2009
Circuits, devices, and methods for enabling the digitization of scanned images with an Analog Front End (AFE) circuit. The AFE circuit includes a sampler for sampling a signal produced by an image sensor and in response generating analog image samples. The AFE circuit also includes a
7514940 System and method for determining effective channel dimensions of metal oxide semiconductor devi April 7, 2009
A system and method are disclosed for determining the effective channel width (Weff) and the effective channel length (Leff) of metal oxide semiconductor devices. One advantageous embodiment of the method provides a plurality of metal oxide semiconductor field effect transistor capac
7514769 Micro surface mount die package and method April 7, 2009
A micro surface mount die package is described that includes a die attach pad having a plurality of integrally formed risers. A bumped die is mounted on the die attach pad such that the risers are located to the side of the die and the contact bumps face away from the die attach pad.
7514751 SiGe DIAC ESD protection structure April 7, 2009
A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very thin collector region. ESD protection for a pair of to-be-protected pads is provided by
7512499 System and method for determining substrate doping density in metal oxide semiconductor devices March 31, 2009
A system and method are disclosed for very accurately determining a value of a substrate doping density in a metal oxide semiconductor device. A plurality of values of threshold voltage of a device under test are measured using a plurality of different values of source to substrate b
7512193 Circuit and method for pre-emphasis in data serialization March 31, 2009
A circuit for pre-emphasis in data serialization. The circuit has a signal delayline to incrementally delay a serialized signal, producing a delayed serialized signal. The circuit has a one bit generator circuit, which determines the interval between receipt of one bit and a second bit.
7511645 Apparatus and method for auto-zeroing a sampled comparator March 31, 2009
A comparator compares an input voltage and a reference voltage and generates an output based on the comparison. The comparator may receive the input voltage in a normal mode of operation. Voltage band circuitry provides first and second test voltages to the comparator. The test volta
7511379 Surface mountable direct chip attach device and method including integral integrated circuit March 31, 2009
A surface mountable chip comprises a semiconductor substrate having IC devices formed thereon and also vertically exposed electrical contacts formed as part of the IC fabrication substrate. Metallization lines electrically connect the IC devices with the contacts. The inventor also c
7510944 Method of forming a MIM capacitor March 31, 2009
In a method of forming MIM capacitor structure, a TiW layer is formed and a capacitor mask is used to define areas of the TiW layer that will be sued in the formation of the MIM capacitor. A capacitor mask is then used to expose surface areas of the TiW layer, followed by deposition of a
7510908 Method to dispense light blocking material for wafer level CSP March 31, 2009
Disclosed is a packaged semiconductor device. The device includes a die with an active surface having a plurality of electrical contacts, a back surface located opposite the active surface, and a plurality of side surfaces. The device also includes a first light blocking protective c
7509595 Method and system for enabling energy efficient wireless connectivity March 24, 2009
An apparatus and method that enables several different factors associated with the implementation of a particular wireless application to be considered in the design of an energy efficient wireless connectivity solution for an integrated circuit. Factors regarding the implementation
7509512 Instruction-initiated method for suspending operation of a pipelined data processor March 24, 2009
An instruction-initiated method for suspending operation of a pipelined data processor by selectively disabling a clock signal to pipeline subcircuitry in response to an instruction executed by the pipeline subcircuitry.
7508890 Apparatus and method for FSK demodulation with integrated time and frequency tracking March 24, 2009
An FSK receiver comprising: 1) demodulation circuitry for receiving an incoming FSK signal and generating a baseband signal comprising an amplitude modulated symbol stream, of Logic 0 symbols and Logic 1 symbols having a data rate, R; 2) auto-correlation circuitry for sampling the ba
7508806 Communication signal processor architecture March 24, 2009
An architecture for a wideband code-division multiple access (WCDMA) baseband system is provided. The system comprises separate processing blocks (e.g. cell search, RAKE receiver, transmitter engine, and error correction). Each block comprises a hard-wired logic block and a CSP (comm
7508531 System and method for measuring germanium concentration for manufacturing control of BiCMOS film March 24, 2009
A system and method is disclosed for measuring a germanium concentration in a semiconductor wafer for manufacturing control of BiCMOS films. Germanium is deposited over a silicon substrate layer to form a silicon germanium film. Then a rapid thermal oxidation (RTO) procedure is perfo
7507607 Method of forming a silicide bridged anti-fuse with a tungsten plug metalization process March 24, 2009
A silicide bridged anti-fuse and a method of forming the anti-fuse are disclosed. The silicide bridged anti-fuse can be formed with a tungsten plug metalization process that does not require any additional process steps. As a result, anti-fuses can be added to an electrical circuit as
7507589 Method of forming a MEMS inductor with very low resistance March 24, 2009
A very, very low resistance micro-electromechanical system (MEMS) inductor, which provides resistance in the single-digit milliohm range, is formed by utilizing a single thick wide loop of metal formed around a magnetic core structure. The magnetic core structure, in turn, can utiliz
7504979 System and method for providing an ultra low power scalable digital-to-analog converter (DAC) ar March 17, 2009
A system and method are disclosed for providing an ultra low power scalable digital-to-analog converter architecture. Refresh buffer circuits are provided to buffer a voltage reference resistor string. The refresh buffer circuits may be coupled to the resistor string at selected bina

 
 
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