| Patent Number |
Title Of Patent |
Date Issued |
| 6937294 |
Multiplexed video signal interface signal, system and method |
August 30, 2005 |
| A multiplexed video signal interface in accordance with the present invention provides a multiplexed component video signal which includes component video signals with OSD data and user-controllable contrast and video gain, along with the ability to individually control such signal c |
| 6937179 |
Resistor tuning network and method for tuning a resistor in an electronic circuit |
August 30, 2005 |
| A resistor tuning network is disclosed that comprises a first resistor connected in parallel with a second variable resistor and a third resistor coupled in series with the first resistor and the second variable resistor. The second variable resistor comprises an R-2R ladder network |
| 6937104 |
High speed high current gain operational amplifier |
August 30, 2005 |
| An operational amplifier having a low impedance input and a high current gain output. The operational amplifier comprises: 1) a first N-channel transistor having a source coupled to the low impedance input of the operational amplifier; 2) a first constant current source coupled between |
| 6936929 |
Multichip packages with exposed dice |
August 30, 2005 |
| Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package. When the mother die is connected to the package contacts, the back of the flip chip is higher |
| 6934779 |
Analog signal interface for digital control |
August 23, 2005 |
| An integrated circuit is configured to receive encoded digital data from a system controller over a single signal line. The system controller encodes the digital data into a singular analog quantity such as a voltage, a current, a sine wave frequency, a sine wave amplitude, a pulse train |
| 6933770 |
Metal oxide semiconductor (MOS) bandgap voltage reference circuit |
August 23, 2005 |
| A metal oxide semiconductor (MOS) bandgap voltage reference circuit with a plurality of dummy bipolar junction transistors (BJTs) coupled to the mismatched parasitic substrate BJTs for improving parasitic capacitance matching, thereby improving startup behavior of the bandgap reference |
| 6933597 |
Spacer with passive components for use in multi-chip modules |
August 23, 2005 |
| A method for providing passive circuit functions in a multi-chip module and the multi-chip modules that result from incorporating these function is disclosed. Passive components such as resistors, capacitors and inductors are fabricated on or within a non-conductive spacer. The spacer is |
| 6933588 |
High performance SCR-like BJT ESD protection structure |
August 23, 2005 |
| In a NPN transistor electrostatic discharge (ESD) protection structure, certain parameters, including maximum lattice temperature, are improved by introducing certain process changes to provide for SCR-like characteristics during ESD events. A p+region is formed adjacent the collecto |
| 6933562 |
Power transistor structure with non-uniform metal widths |
August 23, 2005 |
| A power transistor structure uses metal drain and source strips with non-uniform widths to reduce variations in current density across the power transistor structure. The reductions in current density, in turn, reduce the source-to-drain turn on resistance and maximize the overall cu |
| 6933223 |
Ultra-low loop wire bonding |
August 23, 2005 |
| A wire bonding technique for manufacturing semiconductor devices that results in a bonded wire having a small loop height. The wire bonding technique involves a capillary tool that ball bonds a wire to a first contact point, then moves upwards, and then towards a second contact point |
| 6933212 |
Apparatus and method for dicing semiconductor wafers |
August 23, 2005 |
| A method and apparatus for the dicing of semiconductor wafers using pressure to mechanically separate the individual die from the wafer without the use of a wafer saw. The method includes forming trenches along the scribe lines on a semiconductor wafer and then applying a mechanical |
| 6933174 |
Leadless leadframe package design that provides a greater structural integrity |
August 23, 2005 |
| A leadless leadframe semiconductor package having a plurality of contacts, which have contact surfaces on the bottom surface of the package. At least some of the contacts have integrally formed stems that extend outward to the peripheral surface of the package. These stems have heights a |
| 6932136 |
Post singulation die separation apparatus and method for bulk feeding operation |
August 23, 2005 |
| A post singulation, die separation assembly for bulk separation of a plurality of dice in a singulated wafer from the adhesive backing of wafer saw tape. The die separation assembly includes a support base having a support surface, a first portion and an opposite second portion thereof. |
| 6931369 |
Method to perform thermal simulation of an electronic circuit on a network |
August 16, 2005 |
| A method and apparatus for thermally simulating a circuit over a network is provided. Techniques are provided for designing a circuit that satisfies user-specified functional requirements received over a network. Based on the specified requirements, components and a topology for construc |
| 6931345 |
Method for quantifying safe operating area for bipolar junction transistor |
August 16, 2005 |
| A method for quantifying safe operating regions within a safe operating area (SOA) for a bipolar junction transistor (BJT) by driving the device under test (DUT) as part of a current mirror circuit and monitoring variances in the current mirror ratio for various biasing conditions. |
| 6930929 |
Simultaneous read-write memory cell at the bit level for a graphics display |
August 16, 2005 |
| An improved memory for graphics displays includes an improved memory cell. Data may be written and read from the single bit cell simultaneously, eliminating the need for additional memory circuits to service an N column driver for a display. Additionally, the architecture of the memory a |
| 6930542 |
Differential gain boosting |
August 16, 2005 |
| A current source circuit with differential gain boosting is provided. The current source circuit differentially provides first and second currents. The first current is produced by a first cascoded current source, and the second current is produced by a second cascoded current source. Ea |
| 6930537 |
Band-gap reference circuit with averaged current mirror offsets and method |
August 16, 2005 |
| A band-gap reference circuit with averaged current mirror offsets is provided that includes a differential amplifier circuit, a low current transistor circuit, a high current transistor circuit, and a configuration circuit. The differential amplifier circuit includes a first input node |
| 6930526 |
Quasi-feedforward PWM modulator |
August 16, 2005 |
| Devices, circuits, and methods generate a substantially constant output voltage. A power storage element generates a DC output voltage from an input voltage. The output is sampled to generate a feedback signal. An error amplifier generates an error signal from the feedback signal and a |
| 6930495 |
Digitizing ohmmeter system |
August 16, 2005 |
| A digitizing ohmmeter system for providing a digital resistance measurement includes a current source for providing an excitation current to an impedance-varying input sensor and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The system u |
| 6930377 |
Using adhesive materials as insulation coatings for leadless lead frame semiconductor packages |
August 16, 2005 |
| A number of apparatus for packaging semiconductor devices using an epoxy ink or adhesive. In one embodiment, a pattern of epoxy is formed on the bottom surface of die attach pad of a leadless semiconductor package. The pattern of epoxy divides the undersurface of the die attach pad into |
| 6930010 |
Method of forming a conductive structure in a semiconductor material |
August 16, 2005 |
| A conductive structure provides a conductive path from a first region in a semiconductor material to a second spaced apart region in the semiconductor material by forming one or more trenches between the first and second regions, and implanting a dopant into the bottom surfaces of th |
| 6927619 |
Method and system for reducing leakage current in integrated circuits using adaptively adjusted |
August 9, 2005 |
| An apparatus for reducing leakage currents in an integrated circuit having logic gates containing PMOS devices and NMOS devices. The apparatus comprises a power management unit capable of: i) applying a fixed VDD supply voltage to body connections of said PMOS devices; ii) applying a |
| 6927474 |
Method of programming an antifuse |
August 9, 2005 |
| A metal-to-metal capacitor in a semiconductor integrated circuit is converted to a conductive structure by connecting the first metal plate of the capacitor to ground and the second metal plate of the capacitor to a programming voltage, thus causing the insulator material to breakdown an |
| 6927160 |
Fabrication of copper-containing region such as electrical interconnect |
August 9, 2005 |
| A copper-containing layer suitable for an electrical interconnect in a device such as an integrated circuit is created by a procedure in which a trench (104) is formed through a dielectric layer (102) down to a substrate (100). A diffusion barrier (106) is provided over the dielectric |
| 6924758 |
Thermostat with resistor-to-digital-converter control of trip point |
August 2, 2005 |
| The present invention controls a thermostat trip point using a resistor-to-digital converter. Generally, the value of an external resistor is measured and converted to a digital code equivalent. The digital code drives a DAC (Digital-to-Analog Converter) which sets the trip point for |
| 6922560 |
Method and system for antenna verification for closed loop transmit diversity |
July 26, 2005 |
| A method and system for implementing antenna verification in a closed loop transmit diversity system. The method includes the step of processing a received signal using a finger processors to generate a plurality of finger outputs. The mobile station is communicatively coupled to a base |
| 6922224 |
Silicon-backed microdisplay with a glass-side passivation layer |
July 26, 2005 |
| A silicon-backed microdisplay with reduced flicker and a protected glass-side conductive layer. The silicon-backed microdisplay includes a silicon die, a silicon-side conductive layer disposed on the silicon die, and a silicon-side passivation layer arranged on the silicon-side condu |
| 6919929 |
Method and system for implementing a video and graphics interface signaling protocol |
July 19, 2005 |
| A method and system for interfacing video and graphics data. Specifically, the present invention discloses a method and system for displaying video and graphics data of different formats and image frequencies onto the same display line. A master device that is continually streaming data |
| 6919811 |
Charger detection and enable circuit |
July 19, 2005 |
| A detection circuit is configured to detect the presence of a power source by comparing two input voltages (VIN1, VIN2). An example detection circuit is arranged, such that the first input voltage (VIN1) may operate above the process limit for transistor breakdown, while the second input |
| 6919588 |
High-voltage silicon controlled rectifier structure with improved punch through resistance |
July 19, 2005 |
| When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the likelihood of punch through occurring between two regions of the rectifier is substantia |
| 6917608 |
Microsequencer microcode bank switched architecture |
July 12, 2005 |
| A Time Division Multiple Access (TDMA) mobile station architecture consuming less power and random access memory (RAM) is presented herein. The mobile station includes a system timer coprocessor with a microsequencer for executing frame programs stored in microcode random access memo |
| 6917249 |
RC oscillator |
July 12, 2005 |
| An oscillator has timing characteristics that are determined by resistor and capacitor values. The circuit comprises an astable multivibrator and a current reference. The multivibrator comprises a first and a second timing capacitor. The multivibrator is configured to produce an oscillat |
| 6917192 |
Circuitry for reducing leakage currents in a transmission gate switch using very small MOSFET de |
July 12, 2005 |
| A test circuit for connecting a high-impedance node to an external test point when a test signal is enabled. The test circuit comprises: a first transmission gate switch for coupling the high impedance node to a first internal node of the test circuit when the test signal is enabled, the |
| 6916692 |
Pixel array for LC silicon light valve featuring pixels with overlapping edges |
July 12, 2005 |
| The present invention provides a pixel array and a process flow for forming an array of pixel cells that features pixel electrodes having overlapping edges. This overlapping pixel configuration precludes absorption of light in inter-pixel regions that could give rise to the appearance of |
| 6916688 |
Apparatus and method for a wafer level chip scale package heat sink |
July 12, 2005 |
| A flip chip semiconductor package with an integral heat sink is disclosed as well as a technique for creating individual heat sinks by applying a conductive layer to the back surface of a wafer containing integrated circuitry before singulation. According to one aspect of the invention, |
| 6916121 |
Optical sub-assembly for optoelectronic modules |
July 12, 2005 |
| Concepts for conveniently arranging devices for the transduction of signals to and from voltage and current domains to infrared radiation domains is described. Specifically, optoelectronic components and methods of making the same are described. In one aspect, the optoelectronic componen |
| 6914494 |
Very low current oscillator with variable duty cycle |
July 5, 2005 |
| A low current oscillator circuit comprising a comparator for driving an output signal. A first capacitor chain is coupled to the comparator. The first capacitor chain is configured for setting a first input voltage of the comparator. A second capacitor chain is also coupled to the co |
| 6914487 |
Method and system for providing power management in a radio frequency power amplifier using adap |
July 5, 2005 |
| A method for providing power management in a radio frequency power amplifier using adaptive envelope tracking is provided that includes receiving an input voltage. A power control signal is received. A feedback signal is received. An amplifier input signal is received. From the input |
| 6914485 |
High voltage supply sensing high input resistance operational amplifier input stage |
July 5, 2005 |
| A high voltage operational amplifier input stage utilizes a pair of low voltage p-type MOSFET input devices configured to operate at a common mode voltage. The input stage operates between positive and negative voltage supply rails. Common mode bipolar transistor feedback loops force dra |
| 6911989 |
Halftone controller circuitry for video signal during on-screen-display (OSD) window |
June 28, 2005 |
| Digital circuitry for imparting halftone to that portion of a video image over which an on-screen-display (OSD) window is superimposed. |
| 6911959 |
Low cost horizontal bar indicator system for on screen displays |
June 28, 2005 |
| The present invention provides a bar indicator that minimizes the burden placed on the microcontroller. A horizontal bar indicator is generated that requires very little microcontroller firmware overhead, allowing a less powerful microcontroller to be used in the application. The reduced |
| 6911868 |
Phase-locked loop frequency synthesizer using automatic loop control and method of operation |
June 28, 2005 |
| In a phase-locked loop (PLL) frequency synthesizer, a first frequency divider divides an output signal from a voltage-controlled oscillator by a first divider value. A second frequency divider divides a reference signal by a second divider value. A charge pump increases a voltage level o |
| 6910141 |
Pipelined data processor with signal-initiated power management control |
June 21, 2005 |
| A pipelined data processor with signal-initiated power management control in which a plurality of subcircuits, including pipeline subcircuitry, and circuitry for generating and controlling at least one clock signal are responsive to at least one control signal by disabling a clock signal |
| 6909336 |
Discrete-time amplitude control of voltage-controlled oscillator |
June 21, 2005 |
| Periodically, sensed amplitude for the output signal of a voltage-controlled oscillator is compared to a reference and biasing of the voltage-controlled oscillator is correspondingly set, thereby controlling amplitude of the voltage-controlled oscillator output signal. Process and te |
| 6908833 |
Shallow self isolated doped implanted silicon process |
June 21, 2005 |
| A process and structure for forming electrical devices. The process and structure provide for forming an insulating layer on a substrate. A conductive region is then formed in the insulating layer by implanting silicon atoms into the insulating layer. Further, a plurality of different |
| 6907518 |
Pipelined, superscalar floating point unit having out-of-order execution capability and processo |
June 14, 2005 |
| For use in a processor having a first number of decode units for decoding an ordered stream of floating point instructions, a floating point unit (FPU) for receiving decoded ones of the floating point instructions and a method of processing the decoded ones of the floating point instruct |
| 6906583 |
Metal oxide semiconductor field effect transistor (MOSFET) cascode current mirror |
June 14, 2005 |
| A metal oxide semiconductor field effect transistor (MOSFET) cascode current mirror circuit architecture capable of operating at a low power supply voltage and with only one input reference number while maintaining a high dynamic signal range. |
| 6906553 |
Circuitry for providing overvoltage backdrive protection |
June 14, 2005 |
| A logic gate for use in an electronic system comprising: i) a first component operating from a low voltage power supply rail; ii) a second component operating from a high voltage power supply rail; and iii) an over-voltage protection circuit that detects an over-voltage on an output |
| 6906357 |
Electrostatic discharge (ESD) protection structure with symmetrical positive and negative ESD pr |
June 14, 2005 |
| An apparatus including an electrostatic discharge (ESD) protection structure with a diac in which substancially similar ESD protection is provided for both positive and negative ESD voltages appearing at the circuit electrode sought to be protected. |
