| Patent Number |
Title Of Patent |
Date Issued |
| 6989122 |
Techniques for manufacturing flash-free contacts on a semiconductor package |
January 24, 2006 |
| Techniques for forming packaged semiconductor devices having top surfaces with flash-free electrical contact surfaces are described. According to one aspect, a molding cavity is provided which has a molding surface that is sufficiently smooth such that when placed in contact with an |
| 6987477 |
Pipelined analog-to-digital converter (ADC) with 3-bit ADC and endpoint correction |
January 17, 2006 |
| A pipelined analog-to-digital converter (ADC) in which one less pipeline stage is needed while the output ADC stage has its resolution increased by one bit, thereby advantageously providing for decreased circuit area, lower power consumption and endpoint correction, with minimal addition |
| 6987406 |
Wide frequency range phase-locked loop circuit with phase difference |
January 17, 2006 |
| A PLL circuit is arranged to provide a wide capture range, and to lock the leading edge of the feedback signal with the center of the reference clock pulse. The PLL circuit includes a charge pump circuit, a loop filter circuit, a VCO circuit, a PFD circuit, a phase detector circuit, a |
| 6985969 |
Receiving data on a networked computer in a reduced power state |
January 10, 2006 |
| A networked computer includes a system controller having a network interface. When the networked computer enters a reduced-power state, the network interface receives frame data. The network interface filters the frame data and saves selected frame data to a memory. The memory provides |
| 6985668 |
Multi-purpose optical light pipe |
January 10, 2006 |
| A plug device for use during manufacturing and/or testing processes for optoelectronic (OE) devices is described. The plug device has a handle and structures that extend off of the handle to cover "barrels" of an OE device. The plug device prevents contaminating particulates from reactin |
| 6985386 |
Programming method for nonvolatile memory cell |
January 10, 2006 |
| A method of programming a nonvolatile memory cell in which a ramped control voltage is used to obtain the desired voltage on the storage node. |
| 6985025 |
System for adjusting a power supply level of a digital processing component and method of operat |
January 10, 2006 |
| There is disclosed control circuitry for adjusting a power supply level, VDD, of a digital processing component having varying operating frequencies. The control circuitry comprises N delay cells and power supply adjustment circuitry. The N delay cells are coupled in series, each of |
| 6984866 |
Flip chip optical semiconductor on a PCB |
January 10, 2006 |
| Semiconductor devices and methods for making semiconductor devices. The present invention allows a flip chip assembly to be used with an optical semiconductor device. The optical semiconductor flip chip is positioned over a hole in a PCB such that the imaging area of the optical semi |
| 6982907 |
Retention improvement technique for one time programmable non-volatile memory |
January 3, 2006 |
| A programming technique for a one-time-programmable non-volatile memory (NVM) utilizes a repeated programming cycle with an interval between cycles that is long enough to redistribute charge in the layers surrounding the floating gate of the cell. Each cycle programs the floating gat |
| 6982599 |
Multistage differential amplifier with commonly controlled input and output common mode voltages |
January 3, 2006 |
| A multistage differential amplifier with commonly controlled input and output common mode voltages. A shared common mode control signal jointly controls both input and output common mode voltages with a DC gain and bandwidth substantially equivalent to the differential signal gain and |
| 6981594 |
Method and apparatus to facilitate transport of semiconductor wafers |
January 3, 2006 |
| An assembly to facilitate the transport of semiconductor wafers comprises rigid first and second end plates, and a plurality of interconnected flexible pockets provided between these first and second end plates. Each of the pockets is configured to store a semiconductor wafer therein.A |
| 6981013 |
Low power, minimal area tap multiplier |
December 27, 2005 |
| A low power tap multiplier multiplies a m-bit multiplier and a n-bit multiplicand to output a p-bit multiplication product. The p-bit product is one bit more than the n-bit multiplicand when the multiplicand is symmetric, and two bits more when the multiplicand is non-symmetric. Since |
| 6980644 |
System and method for adapting an analog echo canceller in a transceiver front end |
December 27, 2005 |
| There is disclosed an echo canceller circuit for use in a full duplex transceiver of the type comprising a line driver capable of sending analog transmit signals through a cable and comprising a line receiver capable of receiving analog receive signals from the cable. An echo canceller |
| 6980148 |
Pipelined analog to digital converter that is configurable based on wireless communication proto |
December 27, 2005 |
| A pipelined analog to digital converter (ADC) that is arranged to dynamically adapt its resolution and sampling frequency based on at least one of a determined mode of communication, communication protocol and the strength of a received wireless signal. Since some communication protocols |
| 6980032 |
Level translator |
December 27, 2005 |
| An input level translator circuit is provided. The translator circuit is configured to convert a full-range signal into a low-range signal and a high-range signal. A first pass transistor is configured to restrict the voltage of the full-range signal to provide a high-range voltage at a |
| 6979879 |
Trim zener using double poly process |
December 27, 2005 |
| In a zener zap diode device and a system for making such a device using a double poly process, p+ and n+regions are formed in a tub by means of p-doped and n-doped polysilicon regions, and a p-n junction is formed between the p+ region and an n-tub or between the n+ region and a p-tub. |
| 6978390 |
Pipelined data processor with instruction-initiated power management control |
December 20, 2005 |
| A pipelined data processor with instruction-initiated power management control in which a plurality of subcircuits, including pipeline subcircuitry and circuitry for generating and controlling at least one clock signal are responsive to an instruction executed by the pipeline subcirc |
| 6977491 |
Current limiting voltage regulation circuit |
December 20, 2005 |
| A current limiting circuit. The current limiting circuit includes a device coupled to an output node of the current limiting circuit. The device is responsive to magnitude of a signal at the output node. Moreover, the device has a first mode and a second mode, depending on the magnitude |
| 6977420 |
ESD protection circuit utilizing floating lateral clamp diodes |
December 20, 2005 |
| A semiconductor chip is ESD protected, in part, by utilizing floating lateral clamp diodes. Unlike conventional clamp diodes, which are based upon parasitic bipolar devices associated with large MOS transistors, the floating lateral clamp diodes utilize a well formed in the substrate as |
| 6976136 |
Flash memory protection scheme for secured shared BIOS implementation in personal computers with |
December 13, 2005 |
| An apparatus and method are disclosed for protecting the contents of a shared memory in a memory device controlled by an embedded controller. The apparatus allows dynamic setting of access permissions to said contents and allows updating and recovery of the contents. A computerized syste |
| 6975674 |
System and method for mixed mode equalization of signals |
December 13, 2005 |
| There is disclosed a mixed mode equalization system for use in a transceiver capable of operating in a high frequency Ethernet local area network (LAN). The mixed mode equalization system comprises: 1) an adaptive analog equalization filter for amplifying a first high frequency compo |
| 6975310 |
Fade controller for providing programmable fade rates for on-screen display (OSD) window |
December 13, 2005 |
| A fade controller for providing programmable fade rates for an on-screen display (OSD) window within a video display. Simple digital circuitry is used to control the size and dimensions of the OSD window and the rates at which it opens vertically and horizontally for fade in or closes |
| 6975103 |
Resistance ratio digitizing ohmmeter system |
December 13, 2005 |
| A digitizing ohmmeter system for providing a digital resistance ratio measurement includes a high impedance current source providing a DC excitation current to an impedance-varying input sensor and a reference resistor and an ADC circuit including a charge-balancing modulator and a d |
| 6975038 |
Chip scale pin array |
December 13, 2005 |
| An integrated circuit package with lead fingers with a footprint on the order of the integrated circuit footprint is provided. A lead frame may be made from a metal sheet, which may be stamped or etched. The lead frame provides a plurality of posts and a connecting sheet connecting the |
| 6973225 |
Techniques for attaching rotated photonic devices to an optical sub-assembly in an optoelectroni |
December 6, 2005 |
| The techniques of the present invention are directed towards setting a photonic device into a groove of a substrate, which is then attached to the chip sub-assembly in a way that the resulting optoelectronic package has a low profile and the interconnects between the photonic device and |
| 6973182 |
Differential echo cancellation receiver with dynamic cancellation of excess DC output current |
December 6, 2005 |
| Differential echo cancellation receiver circuitry with dynamic cancellation of excess DC output current. Differential input circuitry provides for cancellation of incoming DC voltage and the incoming transmit signal echo while passing the receive signal. Excess DC current appearing in th |
| 6972530 |
Apparatus and method for transparent dynamic range scaling for open loop LED drivers |
December 6, 2005 |
| The dynamic range of a charging current in an open-loop LED driver circuit is scaled to provide a charging current within tolerance for the open-loop LED driver. The scaling of the dynamic range of the charging current is performed transparently to the user, such that user selected param |
| 6972444 |
Wafer with saw street guide |
December 6, 2005 |
| A wafer is formed with metal traces that extend a distance across the wafer on opposite sides of a saw street. The resistances of the metal traces, which can each be formed from one or more layers of metal, are measured before the saw street is cut. During and after the saw street is cut |
| 6972244 |
Marking semiconductor devices through a mount tape |
December 6, 2005 |
| Wafer level techniques for marking the back surfaces of integrated circuit devices are described. The back surface of the wafer is laser marked while being supported by a mount tape. In some embodiments, the mount tape is sufficiently transparent that the laser light passes through the m |
| 6970996 |
Operand queue for use in a floating point unit to reduce read-after-write latency and method of |
November 29, 2005 |
| A floating point unit includes floating point processing units for executing floating point instructions that write operands to an external memory and for executing floating point instructions that read operands from the external memory. The floating point also includes an operand qu |
| 6970503 |
Apparatus and method for converting analog signal to pulse-width-modulated signal |
November 29, 2005 |
| A circuit for converting an analog signal to a discrete pulse-width-modulated (PWM) signal uses a delta-sigma amplifier and a discrete PWM stage to produce a discrete PWM output signal having lower in-band signal noise then a PDM system and a lower signal distortion then a continuous |
| 6970335 |
LVTSCR ESD protection clamp with dynamically controlled blocking junction |
November 29, 2005 |
| In an SCR-based ESD protection clamp, the voltage overshoot during an ESD event is reduced by separately controlling the voltage pulse to the drain and emitter contacts of the SCR. The voltage pulse to the drain is preferably delayed using a delay circuit such as an RC circuit. This |
| 6970334 |
Power regulation loop performs two functions |
November 29, 2005 |
| A circuit provides a power regulation loop that operates in two modes and uses a single comparator between the two modes. One mode, an open mode, involves generating an overload signal when the pass transistor is in an oversaturated mode indicating that the voltage drop of the device exc |
| 6970152 |
Stacked amplifier arrangement for graphics displays |
November 29, 2005 |
| A column driver for a graphics display has reduced power consumption by sharing power between upper and lower column amplifiers. The upper column amplifier operates over an upper supply range, while the lower column amplifier operates over a lower supply range. The upper and lower am |
| 6970048 |
Inductive-capacitive (LC) based quadrature voltage controlled oscillator (VCO) with deterministi |
November 29, 2005 |
| A circuit and method for generating quadrature signals with a deterministic phase relationship. Between two inductive-capacitive (LC) based quadrature voltage controlled oscillators (VCO), phase shift circuitry is interposed such that the individual LC VCO circuits produce signals with |
| 6970033 |
Two-by-two multiplexer circuit for column driver |
November 29, 2005 |
| A two-input, two-output multiplexer circuit has two tri-state inverter circuits and two switch circuits. The multiplexer outputs may be interchanged depending on a control signal. Each tri-state inverter circuit is configured to receive one of the inputs, invert it, and provide the c |
| 6970015 |
Apparatus and method for a programmable trip point in an I/O circuit using a pre-driver |
November 29, 2005 |
| The invention enables the performance of the input and output stages of an I/O circuit to be modified after an IC is manufactured. In one embodiment, the I/O circuit includes an output driver, programmable pre-driver, programmable Schmitt-trigger input buffer, control circuit and logic |
| 6969982 |
Voltage regulation using current feedback |
November 29, 2005 |
| A circuit having a voltage regulated by a reference current. The circuit includes a current feedback loop and a reference current source that is capable of producing a reference current. The current feedback loop includes an output device, a voltage to current converter, and a current |
| 6969981 |
Voltage regulator power management apparatus |
November 29, 2005 |
| Quiescent currents in a circuit that includes a regulator are reduced by disabling selected portions of the circuit. A window comparator is selected activated to evaluate the input voltage such that a first operating mode is activated when the input voltage is within a predetermined |
| 6969977 |
Soft-start voltage regulator circuit |
November 29, 2005 |
| A voltage regulator includes a soft-start circuit, an error amplifier, an output stage, a voltage divider, and a soft-start switch. The output stage is arranged to provide an output voltage from an input voltage and an error signal. The voltage divider is arranged to provide a feedback s |
| 6969976 |
Dynamic current limit adjustments |
November 29, 2005 |
| A system, method, and apparatus are arranged to provide for current limit adjustments in a switching regulator that includes an inductor. A switched voltage divider circuit is selectively activated according to the actuation of various switching circuits in the regulator. The output of |
| 6967688 |
Method and apparatus that reduces jitter in a display by providing temporal hysteresis |
November 22, 2005 |
| A method and apparatus is directed to reducing jitter of the position of an On Screen Display (OSD) associated with a display device. Multiple horizontal signals are produced in response to a vertical flyback signal and a horizontal flyback signal for the display device. Each of the |
| 6967144 |
Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with sele |
November 22, 2005 |
| A bipolar transistor structure includes a collector region having a first conductivity type formed in a semiconductor substrate. A base region is formed over the collector region; the base region includes a highly doped lower layer having a second conductivity type opposite the first |
| 6965906 |
Converting negative floating point numbers to integer notation without two's complement hardware |
November 15, 2005 |
| For use in a processor having integer and floating point execution cores, logic circuitry for, and a method of, converting negative numbers from floating point notation to integer notation. In one embodiment, the logic circuitry includes: (1) a shifter that receives a number in floating |
| 6965264 |
Adaptive threshold scaling circuit |
November 15, 2005 |
| The invention is directed to improving power consumption in an integrated circuit by reducing the leakage current of a plurality of MOS transistors with an adaptive back biasing circuit. Since the leakage current characteristic is often non-linear, the optimal back bias voltage (lowest |
| 6965223 |
Method and apparatus to allow rapid adjustment of the reference voltage in a switching regulator |
November 15, 2005 |
| A circuit and method for enabling a rapid adjustment of a reference voltage during a disable period such as a fault condition, shutdown condition, and the like, of a voltage regulator is described. A soft start circuit that is arranged to couple a reference voltage input of an error ampl |
| 6964907 |
Method of etching a lateral trench under an extrinsic base and improved bipolar transistor |
November 15, 2005 |
| In a BJT, the extrinsic base to collector capacitance is reduced by forming a lateral trench between the extrinsic base region and collector. This is typically done by using an anisotropic wet etch process in a <110> direction of a <100> orientation wafer. |
| 6963554 |
Microwire dynamic sequencer pipeline stall |
November 8, 2005 |
| A Time Division Multiple Access (TDMA) mobile station architecture consuming less power and random access memory (RAM) is presented herein. The mobile station includes a system timer coprocessor which includes a microsequencer and a microwire for controlling radio components. Respons |
| 6963300 |
Pipeline analog-to-digital converter |
November 8, 2005 |
| DNL and INL errors are minimized in a pipelined converter that is arranged to use reference pre-sampling. An example first stage in the pipelined converter includes a sample/hold amplifier (SHA) circuit, an evaluator circuit, and a multiplying digital-to-analog converter (MDAC) circuit. |
| 6963124 |
Locking of mold compound to conductive substrate panels |
November 8, 2005 |
| A panel assembly of packaged integrated circuit devices including a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device |
