| Patent Number |
Title Of Patent |
Date Issued |
| 7061792 |
Low AC power SRAM architecture |
June 13, 2006 |
| In a SRAM structure, power consumption is reduced by providing a structure which allows specific memory cells to be selected using word lines and column select lines, and reducing the load on the column address lines by dividing the load into sectors. The dividing into sectors is achieve |
| 7061289 |
Method and system for internally resetting a charge pump |
June 13, 2006 |
| A method for internally resetting a charge pump is provided that includes receiving an up signal and a down signal simultaneously. A feedback signal is generated based on the up and down signals. The feedback signal is provided internally to the charge pump. The charge pump is reset base |
| 7061277 |
Low power differential-to-single-ended converter with good duty cycle performance |
June 13, 2006 |
| A differential-to-single-ended (DSE) converter receives a positive differential input and a negative differential input and generates a single-ended output. The DSE converter comprises: 1) a first comparator having a non-inverting input coupled to the positive differential input and |
| 7061210 |
Controllable current trip-point detection circuit |
June 13, 2006 |
| A current trip point detection circuit includes a transistor, a series of resistors, an amplifier, a comparator, and a series of switching circuits. The first transistor and the resistors are configured as an inverting gain stage. The amplifier cooperates with the first transistor to |
| 7061123 |
Wafer level ball grid array |
June 13, 2006 |
| A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the supp |
| 7058360 |
Method and system for stabilizing the performance variation of a radio frequency device |
June 6, 2006 |
| A method for stabilizing the performance variation of a primary radio frequency (RF) device is provided that includes providing a secondary RF device. An output signal is generated with the secondary RF device. The output signal is provided to a feedback circuit. A feedback signal is |
| 7057867 |
Electrostatic discharge (ESD) protection clamp circuitry |
June 6, 2006 |
| Electrostatic discharge (ESD) protection clamp circuitry including current tunneling circuitry to provide control current for controlling current shunting circuitry for shunting ESD current from the protected signal terminal. |
| 7057447 |
Voltage regulator using a single voltage source and method |
June 6, 2006 |
| A voltage regulator formed on an integrated circuit is provided that includes a single voltage source and a bias voltage generator. The single voltage source comprises a reference voltage source that is operable to provide a reference voltage. The bias voltage generator is coupled to the |
| 7057386 |
System for detecting metal content on a semiconductor surface and method of operating the same |
June 6, 2006 |
| An apparatus for detecting the presence of metal material in a semiconductor wafer. The apparatus comprises: (i) a current-carrying coil for generating a first magnetic field, wherein the first magnetic field is capable of causing the metal material in the semiconductor wafer to gene |
| 7057215 |
PMOS based LVTSCR and IGBT-like structure |
June 6, 2006 |
| In an ESD protection device making use of a LVTSCR-like structure or an IGBT-like structure, negative polarity over-voltage protection is achieved by providing a LVTSCR-like structure or IGBT-like structure that defines a PMOS device. |
| 7057174 |
High-speed photon detector and method of forming the detector |
June 6, 2006 |
| A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed adjacent to the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that |
| 7056761 |
Avalanche diode with breakdown voltage controlled by gate length |
June 6, 2006 |
| In an avalanche structure, different breakdown voltages are achieved by making use of a polygate and forming a highly doped p-n junction beneath the polygate, and adjusting the gate length and optionally the bias voltage of the gate. |
| 7054343 |
Method of compensating for temperature changes and channel variations in a laser diode array to |
May 30, 2006 |
| A relatively constant average optical power is provided over a user-defined range of temperatures by detecting the temperature, and adjusting the bias currents input to the laser diodes in an array of laser diodes based on the temperature and the channel loss of the channel connected |
| 7053658 |
Apparatus for circuit with keeper |
May 30, 2006 |
| A keeper switch circuit is configured to minimize capacitive coupling between the gate and drain of a cascode transistor. The keeper switch circuit is coupled between the source and gate of a cascode transistor. The keeper switch circuit is on if a voltage at the drain of the keeper |
| 7053595 |
Compensation circuit for output voltage correction due to propagation delays in hysteretic contr |
May 30, 2006 |
| A method and circuit for compensating offset errors caused by propagation delays in hysteretic control loops. An overshoot voltage V.sub.OS, caused mainly by an inductor current overshoot, is tracked and held when a switch is to be turned off, and again when the switch actually turns off |
| 7053464 |
System and method for providing a variable breakdown bipolar transistor |
May 30, 2006 |
| A system and method is disclosed for providing a variable breakdown bipolar transistor. A trench is etched in a substrate between a first area (base/emitter area) and a second area (sinker/collector area). The sinker/collector contact area and a portion of the bottom of the trench ad |
| 7052977 |
Method of dicing a semiconductor wafer that substantially reduces the width of the saw street |
May 30, 2006 |
| A semiconductor wafer is diced utilizing a method that etches down to the top surface of the semiconductor wafer a number of times, such as during and following the formation of the metal interconnect structure, and then thins the semiconductor wafer from the back side until the semicond |
| 7050517 |
System and method suitable for receiving gigabit ethernet signals |
May 23, 2006 |
| A detector system for high-speed Ethernet LAN is described. One embodiment includes a detector system having N one dimensional sequence detector equalizers in combination with an N-dimensional traceback decoder. The detector system detects N-dimensional symbols transmitted over N separat |
| 7050314 |
LVTSCR charge pump converter circuit |
May 23, 2006 |
| A charge pump circuit in which at least one of the switching elements takes the form of a LVTSCR. The switching on and off of the LVTSCRs may be achieved by making use of a pulsed input and relying on the triggering and holding voltages of the LVTSCRs to switch on and off. |
| 7046179 |
Apparatus and method for on-chip ADC calibration |
May 16, 2006 |
| An ADC circuit includes a multiplexer, a calibration circuit, one or more ADC banks, and a calibration ladder, all on an integrated circuit. The calibration resistor ladder is enabled during a calibration phase, and disabled during normal operation. When enabled, the calibration resistor |
| 7045993 |
Apparatus and method for step-down switching voltage regulation |
May 16, 2006 |
| A current mode PWM buck regulator is provided. The regulator includes a top-side transistor, a bottom-side transistor, an inductor, a sample-and-hold circuit, a ramp generator, a PWM comparator, an error amplifier, and a current sense amplifier. A current through the low-side transis |
| 7045992 |
Apparatus and method for start-up for a synchronous switching regulator |
May 16, 2006 |
| A synchronous switching voltage regulator circuit is provided. After the first PWM pulse or at the end of a soft-start, a gradual transition is made from asynchronous rectification to fully synchronous rectification. The gradual transition to synchronous rectification is made by graduall |
| 7045035 |
Post singulation die separation apparatus and method for bulk feeding operation |
May 16, 2006 |
| A post singulation, die separation assembly for bulk separation of a plurality of dice in a singulated wafer from the adhesive backing of wafer saw tape. The die separation assembly includes a support base having a support surface. A feed tray includes a collection end positioned adj |
| 7044908 |
Method and system for dynamically adjusting field of view in a capsule endoscope |
May 16, 2006 |
| A capsule endoscope (CE) having a field of view that may be dynamically adjusted. The CE includes an illuminator that may be an optical or acoustical illuminator designed to illuminate the lining of a GI tract. A scanner, such as a MEMS scanner may be used to scan the illumination so |
| 7043319 |
System and method for visualizing the use of resources in a process system |
May 9, 2006 |
| A resource allocator allocates a plurality of resources among a plurality of tasks within a process system. The resource allocator includes a monitoring controller for monitoring one or more characteristics associated with at least one application process, the resources, and the task |
| 7043317 |
Semiconductor wafer fabrication furnace idle monitor and method of operation |
May 9, 2006 |
| A system and method is disclosed for monitoring each of a plurality of furnaces in a furnace process in semiconductor wafer fabrication. A furnace that is left open too long will absorb moisture from the atmosphere and should not be used for a furnace task. The system of the inventio |
| 7043033 |
Mode control for audio amplifier coupling |
May 9, 2006 |
| An audio amplifier system includes two amplifiers that are configured to drive loads through either DC or AC coupling. A third amplifier provides an AC ground return when the system is configured in the DC coupled mode, and is disabled when the system is configured in the AC coupled mode |
| 7042763 |
Programming method for nonvolatile memory cell |
May 9, 2006 |
| A method of selectively programming nonvolatile memory cells in which multiple programming voltages are used to obtain the desired voltage on the storage nodes of the cells selected for programming, while the storage nodes of unselected cells remain undisturbed. |
| 7042518 |
Digitally controlled variable frequency HF emphasis circuit for use in video displays |
May 9, 2006 |
| A sharpness filter processes a video signal that is to be displayed in a windowed environment. The windowed environment may contain windows that for displaying television images derived from video standards such as NTSC, PAL, and SECAM. Displaying windowed television images results in |
| 7042374 |
Calibration of a current source array |
May 9, 2006 |
| A current source cell includes a current source providing a first current where the first current can be calibrated, first and second switches coupled to steer the first current to respective first and second output terminals in response to respective first and second control signals, an |
| 7042280 |
Over-current protection circuit |
May 9, 2006 |
| A regulator system includes a power device and a sense device. During a normal operating mode, the power device is arranged to deliver current to a load, while the sense device is arranged to monitor the load current. An over-current mode is activated when the sensed load current exceeds |
| 7042267 |
Gated clock circuit with a substantially increased control signal delay |
May 9, 2006 |
| A gated clock circuit outputs a gated clock signal in response to a master clock signal and a control signal that has a rising or falling edge that follows a rising edge of the master clock signal by a delay. The gated clock signal has a pulse width that is equal to, and in phase with, t |
| 7042264 |
Variable drive strength hysteresis input circuitry |
May 9, 2006 |
| A variable drive strength hysteresis input circuit is disclosed that comprises pull-up circuitry and pull-down circuitry. A variable drive strength circuit changes the pull-up drive strength and the pull-down drive strength in response to receiving an input voltage signal that transi |
| 7042207 |
Inductive measurement system and method |
May 9, 2006 |
| A system and method measures parameters associated with an inductor such as in a switching converter. The inductance value can be determined by monitoring voltages and currents associated with the inductor when a measurement mode is activated. In one example, the measurement is provi |
| 7042174 |
Method of generating independent top and bottom corners correction using one 4th order function |
May 9, 2006 |
| A method and circuit for generating independent top and bottom corner correction using a single fourth order function is described. The top and bottom corner correction signal may be included in an east-west corrected voltage to correct an asymmetry of a picture with respect to a horizon |
| 7042092 |
Multilevel metal interconnect and method of forming the interconnect with capacitive structures |
May 9, 2006 |
| The capacitance of a multilevel metal interconnect formed on a semiconductor substrate can be adjusted, and thereby optimized, to respond to signals from devices that are formed on the underlying substrate by forming capacitive structures in trenches which have been formed using the |
| 7038898 |
ESD protection circuit that can tolerate a negative input voltage during normal (non-ESD) operat |
May 2, 2006 |
| An electrostatic discharge (ESD) protection circuit includes a diode that is connected between a pad and a power supply line, and a negative protection circuit that is connected between the pad and a ground line. The negative protection circuit allows the pad voltage to go below ground |
| 7038509 |
Method and system for providing a phase-locked loop with reduced spurious tones |
May 2, 2006 |
| A method for providing a phase-locked loop with reduced spurious tones is provided that includes comparing a reference clock signal to an internal clock signal to generate a first signal. The first signal is sampled based on a sampling clock signal to generate a second signal. The sa |
| 7038499 |
System and method for a programmable threshold detector for automatically switching to an active |
May 2, 2006 |
| A system and method for a programmable threshold detector. A programmable threshold detector circuit is described comprising an offset current generator circuit, a comparator circuit, a programmable delay circuit, and a counter timer coupled together. The offset current generator cir |
| 7038222 |
System and method for using areas near photo global alignment marks or unpatterned areas of a se |
May 2, 2006 |
| A system and method is described for using areas in or near photo global alignment marks or in or near unpatterned areas of a semiconductor wafer to create structures for secondary ion mass spectroscopy (SIMS) testing or electron beam (E-Beam) testing or X-ray diffraction (XRD) testing o |
| 7037814 |
Single mask control of doping levels |
May 2, 2006 |
| In an integrated circuit, dopant concentration levels are adjusted by making use of a perforated mask. Doping levels for different regions across an integrated circuit can be differently defined by making use of varying size and spacings to the perforations in the mask. The diffusion |
| 7035352 |
Apparatus and method for signal acquisition in a FSK demodulator with integrated time and freque |
April 25, 2006 |
| A signal detection circuit for receiving a digital baseband signal comprising an amplitude modulated symbol stream of Logic 0 symbols and Logic 1 symbols, each of the Logic 0 and Logic 1 symbols comprising S sequential samples, wherein the amplitude modulated symbol stream contains a |
| 7034628 |
Crystal oscillator circuit having a start-up time reduction circuit |
April 25, 2006 |
| A quartz-crystal oscillator circuit substantially reduces the start-up time of the crystal oscillator circuit by utilizing a start-up time reduction circuit that adds additional gain to the crystal oscillator circuit during the start-up period, and removes the additional gain as the |
| 7034627 |
Oscillator circuit with variable reference voltage and current |
April 25, 2006 |
| A relaxation oscillator circuit is configured to provide an output signal. The relaxation oscillator circuit includes two capacitors that are alternatively charged and discharged. Each capacitor is charged by a separate current that is provided by mirroring a reference current. The r |
| 7034585 |
VDD detect circuit without additional power consumption during normal mode |
April 25, 2006 |
| In a VDD detect circuit, the output driver interfaces are disabled during power up by pulling the gates of the PMOS interface transistors high using a additional circuitry that operates when VDD is not asserted. The circuit includes a level shifter for controlling the PMOS and NMOS i |
| 7031576 |
Connectorized silicon bench for passively aligning optical fibers |
April 18, 2006 |
| A connectorized silicon bench and ferrule that aids in the passive alignment of optical fibers to optical components on the bench. The apparatus includes a bench having an optical component, a groove formed in the bench, the groove configured to accommodate an optical fiber; and a fe |
| 7031127 |
Short circuit protection |
April 18, 2006 |
| Output current of an amplifier is limited by clamping the voltage at the gate of one or more of the transistors in the output stage. A drive signal is provided to the gate of a p-type transistor in an example output stage. Another p-type transistor is activated in a short-circuit pro |
| 7030718 |
Apparatus and method for extending tuning range of electro-acoustic film resonators |
April 18, 2006 |
| A tuning circuit for adjusting an oscillation frequency of an oscillator circuit. The tuning circuit comprises a film bulk acoustic wave resonator (FBAR) having a series resonance frequency and a parallel resonance frequency, and an inductor coupled in series or parallel with the film |
| 7030678 |
Level shifter that provides high-speed operation between power domains that have a large voltage |
April 18, 2006 |
| The speed of a level shifter, which translates a first voltage in a first power domain to a second voltage in a second power domain, is increased by utilizing a first bipolar transistor to assist a first MOS transistor in pulling down the voltage on a first output node, and a second bipo |
| 7030661 |
Power supply system and method that provides a low-cost approach to voltage scaling |
April 18, 2006 |
| A low-cost approach to voltage scaling is realized by latching the output of a propagation delay detector, and inputting the latched output to a string digital-to-analog (DAC) converter. The string DAC generates a DC voltage in response to the latched values, which is fed back to the |
