| Patent Number |
Title Of Patent |
Date Issued |
| D578104 |
Loudspeaker |
October 7, 2008 |
|
| 7460345 |
Data carrier comprising an integrated circuit with an ESD protection circuit |
December 2, 2008 |
| In the case of a data carrier (1) or an integrated circuit (5) for the data carrier (1), an ESD protection circuit (8) is formed by means of a series connection (9) comprising a first protection diode (10) and a protection stage (11) together with a second protection diode connected |
| 7459990 |
Arrangement with two piezoelectric layers, and method of operating a filter device |
December 2, 2008 |
| The invention relates to an arrangement with two piezoelectric layers (2, 5) and to a method of operating the arrangement as a filter. One (2) of the two piezoelectric layers (2, 5) in the arrangement is situated between an electrode (3) and a middle electrode (4), and the other one |
| 7459928 |
Cell with fixed output voltage for integrated circuit |
December 2, 2008 |
| The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the opera |
| 7459750 |
Integrated half-bridge power circuit |
December 2, 2008 |
| A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate are of the same typ |
| 7458039 |
Electronic stream processing circuit with locally controlled parameter updates, and method of de |
November 25, 2008 |
| An electronic circuit, in particular a receiver circuit contains a chain of stream processing circuits (10a-c). The stream processing circuits (10a-c) have control parameter inputs for receiving control parameter values. In order to facilitate design of circuits that receive data with |
| 7457992 |
Delay fault test circuitry and related method |
November 25, 2008 |
| The invention provides for a delay fault test circuitry for producing a train of two clock pulses in response to two respective clock signals of different frequency associated with logic circuits to be tested and which are arranged to run at different speeds, and arranged such that the |
| 7457971 |
Monitoring and controlling power consumption in a sequential logic circuit |
November 25, 2008 |
| The present invention relates to an electronic circuit, apparatus and method for monitoring and controlling power consumption. Accordingly, there is provided an electronic circuit, apparatus and method that includes one or more sequential logic elements (12) that are capable of recei |
| 7457894 |
Synchronization of non-sequential moving pointers |
November 25, 2008 |
| A hierarchical memory access control distinguishes between blocks of data that are known to be sequentially accessed, and the contents of each block, which may or may not be sequentially accessed. If the contents of a block are provided in a sequential manner within the block, but the |
| 7457595 |
Power saving in a transmitter |
November 25, 2008 |
| A transmitter comprises a power amplifier (PA) with a power supply input (PI) and an output (PAO) to supply a transmission signal (Vo) with an output power (Po). A power supply (PS) has power supply outputs (PSO1, PSO2) to supply a first power supply voltage (PV1) with a first level and |
| 7456489 |
Wafer with optical control modules in IC fields |
November 25, 2008 |
| In a wafer (1) with a number of exposure fields (2), each of which exposure fields comprises a number of lattice fields (3) with an IC (4) located therein, two groups (5, 7) of saw paths (6, 8) are provided and two control module fields (A1, A2, B1, B2, C1, C2, D1, D2) are assigned t |
| 7456072 |
Metal-insulator-metal (MIM) capacitor structure and methods of fabricating same |
November 25, 2008 |
| A Metal-Insulator-Metal (MIM) capacitor structure and method of fabricating the same in an integrated circuit improve capacitance density in a MIM capacitor structure by utilizing a sidewall spacer extending along a channel defined between a pair of legs that define portions of the M |
| 7455234 |
Roll back method for a smart card |
November 25, 2008 |
| In a data carrier (2) for contactless communication of storage data (SD) with a reader station (1), a recovery device (13) is provided, with which, following an unexpected abort of the storing of storage data (SD) in a memory (11) by virtue of a lack of supply voltage, a valid storage |
| 7454318 |
Method and terminal for detecting fake and/or modified smart card |
November 18, 2008 |
| This invention relates to a method and a terminal for detecting a fake and/or modified smart card inserted into a physical interface of a terminal, the method comprising the steps of performing a sequence of current measurements by a current monitor in order to obtain a first current |
| 7454188 |
Version-programmable circuit module |
November 18, 2008 |
| A circuit module contains a sub-circuit that is capable of providing a level of performance dependent on the version number that is stored in a version number memory. The version number is passed to the sub-circuit from a write-protected memory to the version memory in the multiplex mode |
| 7453942 |
Method and unit for substracting quantization noise from a PCM signal |
November 18, 2008 |
| A method and unit for substracting quantization noise from a pulse code modulated PCM signal being segmented into frames. For achieving this it is proposed to first calculate for each frame of the PCM signal a quantization noise level Bq according to an equation having parameters inc |
| 7453866 |
Method and apparatus for a dual mode telephone |
November 18, 2008 |
| An apparatus and structure for transmitting and receiving an audio signal over a network (25). A dual mode telephone (1) is adapted to switch between a standard telephone mode and an Internet Protocol (IP) telephone mode. The standard telephone mode comprises a standard telephone (11) |
| 7447963 |
Testing of electronic circuits |
November 4, 2008 |
| A plurality of integrated circuits that are used in an electronic circuit have functional interconnections and dedicated test connections. The integrated circuits receive and transmit synchronization information, such as clock signals from one integrated circuit to another successively |
| 7447281 |
Method for the improved recognition of the validity of IEEE 802.11a signals, and circuit arrange |
November 4, 2008 |
| To improve the recognition of the validity of coded control information that is transmitted, together with associated useful data, as a data signal and that is decoded at the receiver by means of a Viterbi decoder (VDCOD), it is proposed that at least an end section of the received, |
| 7446598 |
Bias circuits |
November 4, 2008 |
| A bias circuit for use in bandgap voltage reference circuits and temperature sensors comprises a pair of transistors (Q, Q2), the first of which (Q1) is arranged to be biased at an emitter current .sub.lbias, and the second of which (Q2) is arranged to be biased at an emitter current |
| 7446559 |
Method and system for powering an integrated circuit |
November 4, 2008 |
| Consistent with an example embodiment, there is a method is for powering an integrated circuit. An integrated circuit comprises a chip within a package assembly, the chip includes a plurality of logic circuits each having at least one power input which should not receive a power voltage |
| 7446513 |
Dead time control in a switching circuit |
November 4, 2008 |
| A dc-to-dc converter has two field effect transistors connected in series between an input terminal and a ground terminal. Adjustment of the dead time when both transistors are off is carried out by providing Kelvin feedback connections directly across the drain and source of one or both |
| 7444530 |
Standby circuit for an electrical device |
October 28, 2008 |
| The invention relates to a standby circuit, an electrical device with a standby circuit, a method for the control of the electrical device and a power supply assembly. Whereas the power supply unit and the control electronics are in permanent operation when conventional devices are in |
| 7444118 |
Electronic communications system |
October 28, 2008 |
| In order that an electronic communications system (100) equipped with: [a.1] at least one base station (10), to which [a.2] at least one LC resonant circuit (13, 16) [a.2.1] with at least one antenna unit (16) in the form of a coil, and [a.2.2] at least one capacitive unit (13) serie |
| 7443885 |
CAN device featuring advanced can filtering and message acceptance |
October 28, 2008 |
| A device that supports a plurality n of message objects, including a plurality of registers associated with each message object, including at least one object match ID register that contains a multi-bit object match ID field, and at least one object mask register that contains a multi-bi |
| 7443810 |
Wireless terminals |
October 28, 2008 |
| A wireless terminal for use in the transmitting and receiving frequency bands of a frequency duplex system comprises transmitting and receiving stages (Tx, Rx) and signal propagating means (22, 24, 26) coupled to the transmitting and receiving stages. The signal propagating means compris |
| 7443725 |
Floating gate isolation and method of making the same |
October 28, 2008 |
| The present invention relates to a method for forming a set of floating gates which are isolated from each other by means of slits, as well as semiconductor devices using the floating gate. The present invention provides a method for manufacturing an array of semiconductor devices on |
| 7443648 |
Driver for inductive load |
October 28, 2008 |
| A driver for an inductive load such as a solenoid coil 92 includes three FETs 4,6,8. Two of the FETs are reversely connected between battery and output terminals 16, 18, and one of the FETs is connected between output and ground terminals 16, 14. A driver circuit 10 having high and low s |
| 7443375 |
Display device with pixel inversion |
October 28, 2008 |
| A display device includes pixels arranged in columns and rows, in which the pixels of a row can be selected by means of a row voltage supplied via control lines, and column voltages that correspond to the image data of the selected pixel to be displayed can be supplied via data lines, |
| 7443344 |
Antenna arrangement and a module and a radio communications apparatus having such an arrangement |
October 28, 2008 |
| An antenna arrangement for a radio communications apparatus such as a mobile phone, comprises a substantially planar patch conductor having a first feed connection point for connection to radio circuitry and a second feed connection point for connection to a ground plane, a first, di |
| 7443264 |
Compact impedance transformation circuit |
October 28, 2008 |
| The present invention relates to an impedance transformation circuit (I10; 11a; 11b; 12) with a first contact pad (51) and a second contact pad (52) being spaced-apart and formed on a substrate (20). The impedance transformation circuit comprises at least first circuit element (40) p |
| 7443144 |
Voltage regulation system comprising operating condition detection means |
October 28, 2008 |
| The invention relates to a system for generating an output voltage (Vout) from an input voltage (Vup), said system comprising:--regulation means (T1) for regulating said output voltage (Vout) to a target voltage level (Vcons), said regulation means (T1) comprising a control terminal |
| 7442474 |
Reticle for determining rotational error |
October 28, 2008 |
| A method for determining rotational error portion of total misalignment error in a stepper. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a first pattern and an error-free fine alignment target, in the stepper. |
| 7440738 |
Automatic gain control with two power detectors |
October 21, 2008 |
| A receiver (100) adjusts its overall gain based on the detected power level of an incoming signal. The receiver is built with two detectors (D1, D2) which operate with different detecting ranges within the dynamic range of the incoming signal. If the actual power level of the incoming |
| 7439759 |
Operating long on-chip buses |
October 21, 2008 |
| As technology scales, on-chip interconnects are becoming narrower, and the height of such interconnects is not scaling linearly with the width. This leads to an increase of coupling capacitance with neighboring wires, leading to higher crosstalk. It also leads to poor performance due to |
| 7439585 |
Silicon-on-insulator device |
October 21, 2008 |
| A Silicon on Insulator (SOI) device is disclosed wherein an extension of P-type doping (303) is implanted between the buried oxide layer of the device and the SOI layer. The extension is of a size and shape to permit the source (309) to be biased at a voltage significantly less than the |
| 7439582 |
Semiconductor device with sense structure |
October 21, 2008 |
| A power semiconductor device is described with a plurality of cells divided into power cells (14) and sense cells (16). A plurality of groups (30, 32) of sense cells (16) are provided. The device allows for compensation of effects caused at the edges of the groups of sense cells (16) |
| 7436984 |
Method and system for stabilizing video data |
October 14, 2008 |
| The invention relates to a method for stabilizing a video recording of a scene made by a video camera and represented by video data, said method comprising the steps of subdividing said video data into a plurality of successive frames themselves divided into a plurality of blocks, de |
| 7433687 |
Method and device for multi-user detection with simplified de-correlation in a CDMA system |
October 7, 2008 |
| A simplified de-correlation method in CDMA multi-user detection comprises: a. receive wireless symbols S; b. obtain a channel correlation matrix R, take a part from R to get a partial correlation matrix R.sub.P; c. do inversion operation to the partial correlation matrix R.sub.P, then |
| 7433417 |
Receiver with a signal path |
October 7, 2008 |
| The invention relates to a receiver (1, 49, 51, 52, 54) for receiving RF signals. The known receiver comprises a phase-locked loop which is controlled by the stereo pilot. Because of unwanted frequency changes, a sampling rate converter precedes the stereo decoder. Filtering operations |
| 7433393 |
Apparatus for controlling a digital signal processor for radio isolation and associated methods |
October 7, 2008 |
| A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled |
| 7430631 |
Access to a wide memory |
September 30, 2008 |
| A processing system includes a processor and a physical memory (500) with a single-size memory port (505) for accessing data in the memory. The processor is arranged to operate on data of at least a first data size and a smaller second data size. The first data size is equal to or sm |
| 7429797 |
Electronic device and carrier substrate |
September 30, 2008 |
| Consistent with an example embodiment, an electronic device comprises a semiconductor device, particularly an integrated circuit, and a carrier substrate with conductive layers on the first side and the second side, and voltage supply and ground connections mutually arranged according to |
| 7429513 |
Method of manufacturing a semiconductor device |
September 30, 2008 |
| In the method for manufacturing a semiconductor device (100), which comprises a semiconducting body (1) having a surface (2) with a source region (3) and a drain region (4) defining a channel direction (102) and a channel region (101), a first stack (6) of layers on top of the channel |
| 7428615 |
System and method for maintaining coherency and tracking validity in a cache hierarchy |
September 23, 2008 |
| A data processing system according to the invention comprises a processor (P) and a memory hierarchy. The highest ranked level therein is a cache coupled to the processor. The memory hierarchy comprises a higher ranked cache (C1) having a cache controller (CC1) operating according to a w |
| 7427857 |
Resistor structures to electrically measure unidirectional misalignment of stitched masks |
September 23, 2008 |
| An apparatus and method for matched variable resistor structures to electrically measure unidirectional misalignment of stitched masks for etched interconnect layers includes a first test pad and a second test pad for measuring resistance therebetween; a first resistive element elect |
| 7426670 |
Connecting multiple test access port controllers on a single test access port |
September 16, 2008 |
| Multiple test access port (TAP) controllers on a single chip are accessed, while maintaining the appearance to an outside observer of having only a single test access port controller. By adding a single bit to a data register (212) of each of a plurality of TAP controllers (102, 106), |
| 7424316 |
Body-worn personal communications apparatus |
September 9, 2008 |
| In a body-worn personal communications apparatus, for example a wrist-carried wireless telephone, an antenna (102) is a helical or other physically-shortened electric antenna that makes use of the enhanced normal component of electric field close to the body. A microphone (114) can a |
| 7424315 |
Communication bus system operable in a sleep mode and a normal mode |
September 9, 2008 |
| The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a norma |
| 7423517 |
Transponder with a controllable power-on-reset circuit |
September 9, 2008 |
| In a transponder (1) and an integrated circuit (5), the integrated circuit (6) has a monitoring circuit (23) to which a d.c. supply voltage (VS) can be fed and by which a signalizing signal (POK) whose waveform is dependent on the relationship between the d.c. supply voltage (VS) and a |
