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NEC Research Institue, Inc. Patents |
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Assignee: NEC Research Institue, Inc.
Address: Princeton, NJ
No. of patents: 1
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 5457638 |
Timing analysis of VLSI circuits |
October 10, 1995 |
| A computer-implemented process for doing timing analysis of a VLSI sequential circuit that includes false paths. It includes the steps of transforming the circuit into a functionally equivalent .delta. path disjoint circuit for a given delay value and propagating all inverters to pri |
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