| Patent Number |
Title Of Patent |
Date Issued |
| RE40773 |
Drive circuit for driving an image display unit |
June 23, 2009 |
| A drive circuit has a judgement circuit for judging whether the magnitude of the input video data resides in a linear region or the non-linear region of characteristic of liquid crystal transmittance. When the vide data resides within the linear region, some of the output gray-scale |
| RE40739 |
Driving circuit of display device |
June 16, 2009 |
| A driving circuit of a display device including a TFT (Thin Film Transistor) liquid crystal display device or the like is provided which is capable of decreasing a chip in size and reducing costs of testing by reducing the number of bits even in the case of increased number of bits o |
| 7620113 |
Selectively changing demodulation modes depending on quality of received signal or a control sig |
November 17, 2009 |
| A demodulation apparatus includes a first demodulator for receiving a first received subcarrier and demodulating it by a first demodulation mode, a second demodulator for receiving a second received subcarrier and demodulating it by a second demodulation mode, a third demodulator for |
| 7620094 |
Spread spectrum clock generator |
November 17, 2009 |
| Disclosed is a spread spectrum clock generator which includes: a first delay control type oscillator that variably controls an oscillation period at a control period interval according to a control signal; a control circuit; a maximum modulation value determination circuit that deter |
| 7620075 |
Serial communication system with baud rate generator |
November 17, 2009 |
| A baud rate generator includes a first counter, a timer and a baud rate correcting circuit. The first counter is configured to count bits of an inputted serial data. The timer is configured to measure a time for which the first counter counts a predetermined number of bits based on a |
| 7619439 |
Semiconductor device |
November 17, 2009 |
| When a plurality of output buffer circuits are provided, chip layout size, power consumption, and number of pins of an LSI circuit are reduced. A voltage generation circuit generates reference voltages corresponding respectively to the output buffer circuits. A comparison circuit compare |
| 7619296 |
Circuit board and semiconductor device |
November 17, 2009 |
| A semiconductor device, includes: a semiconductor substrate; a multilayered interconnect structure formed on the semiconductor substrate; a terminal for flip-chip packaging arranged on the surface of the multilayered interconnect structure; and a spiral inductor formed to enclose the |
| 7619278 |
Semiconductor memory device |
November 17, 2009 |
| A semiconductor-memory device that reduces leak off due to miniaturization of memory cells, and comprises as a single unit cell: a substrate 1 having a trench section 1a; a selector gate 3 that is located via an insulating film 2 on the substrate adjacent to the trench section 1a; a |
| 7619264 |
Semiconductor device |
November 17, 2009 |
| An electric fuse includes a wide interconnect and a narrow interconnect. The electric fuse has a juxtaposed region in which a plurality of straight line portions are juxtaposed with each other by folding the wide interconnect, and the narrow interconnect has a narrower width than that |
| 7618877 |
Semiconductor wafer, method of manufacturing the same, and method of manufacturing a semiconduct |
November 17, 2009 |
| In a semiconductor wafer including a plurality of element forming regions formed on a front surface of a semiconductor substrate, a scribe line groove is formed along a periphery of the each of the element forming regions, and stoppers are located at an intersection of the scribe line |
| 7616458 |
PWM current controlling apparatuses capable of optimally correcting load current |
November 10, 2009 |
| In a current controlling apparatus for controlling a load current flowing through a load, a reference level generating circuit generates a reference level signal, and a reference signal generating circuit generates a reference signal in accordance with the reference level signal. A b |
| 7616417 |
Semiconductor device including protection circuit and switch circuit and its testing method |
November 10, 2009 |
| In a semiconductor device including a semiconductor element to be protected having first and second electrodes, and a protection circuit coupled between the first and second electrodes, a switch circuit is inserted between the first and second electrodes in series to the protection c |
| 7616071 |
PLL circuit and semiconductor device provided with PLL circuit |
November 10, 2009 |
| Disclosed is a PLL circuit of a small circuit size capable of generating clock including a jitter component with ease. A phase comparator 11 compares the phase of an input reference clock signal CKR to the phase of a signal fed back from a frequency divider 14 to route an output signal |
| 7615823 |
SOI substrate and method of manufacturing the same |
November 10, 2009 |
| The SOI substrate includes a supporting substrate, an insulating layer (first insulating layer), another insulating layer (second insulating layer), and a silicon layer (silicon active layer). On a surface of the supporting substrate, which is the surface on the side of the silicon l |
| 7615781 |
Semiconductor wafer and semiconductor device, and method for manufacturing same |
November 10, 2009 |
| There is a room for improvement in conventional semiconductor devices in terms of reducing the chip area. A semiconductor device 1 comprises an evaluation transistor 10 (first characteristic evaluation device), an evaluation transistor (second characteristic evaluation device), measu |
| 7615500 |
Method for depositing film and method for manufacturing semiconductor device |
November 10, 2009 |
| A method for depositing a film includes: (a) processing a wafer, including forming a high dielectric constant film on a first wafer; and achieving nitridation of the high dielectric constant film formed on the first wafer; and (b) performing coating process including forming a high d |
| 7615498 |
Method of manufacturing a semiconductor device |
November 10, 2009 |
| A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO.sub.2 film 212 and a SiCN film 214 formed thereon. The first SiOC f |
| 7613971 |
Semiconductor integrated circuit with delay test circuit, and method for testing semiconductor i |
November 3, 2009 |
| A semiconductor integrated circuit includes an input side flip-flop; a combinational circuit having an input connected with the input side flip-flop; an output side flip-flop connected with an output of the combinational circuit; and a delay test circuit. The delay test circuit gener |
| 7613931 |
Copy protection method and system for programmable gate array |
November 3, 2009 |
| The present invention relates to a programmable-gate-array copy protection method and a system which prevent unauthorized copying of an FPGA program. A copy protection method for a field-programmable gate array, the method comprising a step of causing a user-specific gate array to bo |
| 7613197 |
Multi-processor system and message transferring method in the same |
November 3, 2009 |
| A multi-processor system includes a plurality of processors; and a memory section connected with the plurality of processors and configured to store a message transmitted from each of the plurality of processor to another. The memory section has a plurality of priority buffer regions |
| 7612607 |
Small size power amplifier with amplifiers switched |
November 3, 2009 |
| A small size power amplifier includes a first amplifier provided for a first signal path; a second amplifier provided for said first signal path; and a third amplifier provided for a second signal path parallel to said first signal path. A voltage control circuit configured to bias one |
| 7612453 |
Semiconductor device having an interconnect structure and a reinforcing insulating film |
November 3, 2009 |
| A semiconductor device includes in an interconnect structure which includes a first interconnect made of a copper-containing metal, a first Cu silicide layer covering the upper portion of the first interconnect, a conductive first plug provided on the upper portion of the Cu silicide |
| 7612419 |
Wafer, semiconductor chip, and semiconductor device |
November 3, 2009 |
| Scribe lines demarcating semiconductor chips comprise, in both the vertical direction and the horizontal direction, first-type scribe lines of the minimum width enabling cutting by dicing or other means, and second-type scribe lines enabling placement of TEGs, alignment marks or othe |
| 7610436 |
Semiconductor device having flash memory with a data length table |
October 27, 2009 |
| A semiconductor device includes a flash memory having a plurality of blocks; a controller configured to be accessible to the flash memory; and a data length table configured to store an identifier indicating a kind of each of a plurality of data and a data length of the data. A specific |
| 7609128 |
Switch circuit |
October 27, 2009 |
| A branch path having a transmission line and a distributed constant line includes a resonant circuit. The resonant circuit resonates at a predetermined operating frequency when the branch path is in OFF state. At this time, the distributed constant line has a predetermined impedance. |
| 7609106 |
Constant current circuit |
October 27, 2009 |
| A constant current circuit includes a first current mirror composed of a first transistor formed on a first current path and a second transistor formed on a second current path, a second current mirror composed of a third transistor formed on the first current path and a fourth transisto |
| 7609103 |
Delay circuit with reference pulse generator to reduce variation in delay time |
October 27, 2009 |
| A delay circuit to generate and output a delayed signal delayed from an input signal includes a reference pulse generating circuit to generate a reference pulse train in response to the input of the input signal, the reference pulse generating circuit having a feedback circuit containing |
| 7608946 |
Boosting circuit and integrated circuit having the same |
October 27, 2009 |
| In a boosting circuit, a power supply section includes a first power supply configured to supply a first reference voltage and a second power supply configured to supply a second reference voltage. A boosting section includes boosting switches and boosting capacitors, and is configur |
| 7608502 |
Method for manufacturing semiconductor device |
October 27, 2009 |
| In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and |
| 7607074 |
Error detecting code addition circuit, error detection circuit and method, and disc apparatus |
October 20, 2009 |
| An error detector includes a substitute value output section outputting a specific substitute value corresponding to an encoding byte sequence Q of input byte data by referring to a table storing, as a substitute value, a value obtained by inputting a substitute code string to a shift re |
| 7606015 |
Power semiconductor device architecture for output transistor protection |
October 20, 2009 |
| A power semiconductor device is provided with an output transistor, a load control circuit, and a pull-up circuit. The output transistor is connected between a power supply terminal provided to receive a power supply voltage and an output terminal to be connected with a load. The loa |
| 7605736 |
A/D converter and duty control method of sampling clock |
October 20, 2009 |
| An A/D converter comprises a sample and hold circuit receiving a signal and operating based on a sampling clock, an A/D converting circuit converting an output signal of the sample and hold circuit to a digital signal, an A/D output determination circuit outputting a duty control sig |
| 7605661 |
Phase locked loop circuit including digital voltage-controlled oscillator, ring oscillator and s |
October 20, 2009 |
| A PLL circuit includes a polyphase reference clock output circuit, which outputs multiple reference clocks, each clock being of different phase. The PLL circuit further includes a digital voltage controlled oscillator, which, using any one of the multiple reference clocks chosen as an |
| 7605615 |
Voltage comparator circuit |
October 20, 2009 |
| There is provided a voltage comparator circuit with even lower power consumption. It comprises an FET Q1, to the gate of which a signal input terminal IN1 is connected, an FET Q2, to the gate of which a signal input terminal IN2 is connected, a bistable circuit, an AND circuit G, and an |
| 7603595 |
Memory test circuit and method |
October 13, 2009 |
| A memory test circuit according to an embodiment of the invention executes a test on a memory in accordance with a pattern mode signal designating a sub-test pattern included in a test pattern and including a plurality of test actions for the memory, and stores the pattern mode signal as |
| 7603579 |
Semiconductor chip and semiconductor integrated circuit device for relaying a reference clock fr |
October 13, 2009 |
| A semiconductor chip has: a plurality of hard macros which operates based on a reference clock; and a clock pad through which the reference clock is supplied from the outside to one of the plurality of hard macros. The reference clock supplied to the one hard macro is relayed to other ha |
| 7603510 |
Semiconductor device and storage cell having multiple latch circuits |
October 13, 2009 |
| A semiconductor storage device including a first latch circuit for latching stored data and a storage cell part including a plurality of second latch circuits that operate with inverted logic from the first latch circuit and receives the stored data from the first latch circuit to ou |
| 7603489 |
Direct memory access controller including first and second transfer setting registers |
October 13, 2009 |
| DMAC includes current transfer setting registers and next transfer setting registers. Each of the current transfer setting registers stores transfer source address, transfer destination address and transfer count. The next transfer setting registers stores a transfer setting of a DMA tra |
| 7602875 |
Sampling rate conversion method and apparatus |
October 13, 2009 |
| A sampling apparatus for converting first data, sampled at a first sampling rate, into second data, sampled at a second sampling rate. A FIFO storing the first data based on a write control signal and outputs the second data read out based on a read control signal indicating whether |
| 7602827 |
Semiconductor laser and manufacturing process therefor |
October 13, 2009 |
| There is provided a semiconductor laser comprising an n-InP substrate 1; a multilayer film including a strained MQW active layer 6 on the n-InP substrate 1; a p-electrode 18 on the multilayer film; a pair of grooves 15 separating the multilayer film in both edges of the p-electrod |
| 7602064 |
Semiconductor device having an inspection hole striding a boundary |
October 13, 2009 |
| The semiconductor device includes a semiconductor substrate, a diffusion layer, an interconnect layer, a contact plug, a contact-inspection hole, a via plug, and a via-inspection hole. Similarly to a contact plug hole, the contact-inspection hole extends from the diffusion layer to the |
| 7602058 |
Flip-chip semiconductor device with improved power pad arrangement |
October 13, 2009 |
| A semiconductor device is composed of a power supply interconnection extending from a certain starting point in a first direction and also extending from the starting point in a second direction orthogonal to the first direction, a plurality of power pads, and connecting interconnect |
| 7602048 |
Semiconductor device and semiconductor wafer having a multi-layered insulation film |
October 13, 2009 |
| The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and gap-filling characteristics of the organic material of low dielectric constant, and fo |
| 7602018 |
High withstand-voltage semiconductor device |
October 13, 2009 |
| A high withstand-voltage semiconductor device has a gate electrode in a semiconductor layer of one conductivity type, a drain diffusion layer and a source diffusion layer, a thick gate insulating layer between the drain diffusion layer and the gate electrode, and a low-concentration offs |
| 7602002 |
Semiconductor device with DRAM portion having capacitor-over-bit-line structure and logic portio |
October 13, 2009 |
| The present invention provides a semiconductor device comprising: a semiconductor substrate having a DRAM portion and a Logic portion; a first transistor in said DRAM portion; a second transistor in said Logic portion; a first insulating layer covering said DRAM portion and said Logi |
| 7601640 |
Method of manfacturing semiconductor device |
October 13, 2009 |
| A post-CMP cleaning process of a copper layer is to be performed as follows. An alkaline aqueous solution, a polycarboxylic acid, BTA, and an alkaline aqueous solution are sequentially brought into contact with a primary surface of a silicon substrate over which the copper layer is p |
| 7600203 |
Circuit design system and circuit design program |
October 6, 2009 |
| A circuit design system has: a storage unit in which a netlist is stored; a fault-candidate extracting module configured to extract equivalent fault class G.sub.i from the netlist; a judgment module configured to select a target node out of a plurality of nodes N.sub.i1 to N.sub.iji |
| 7600162 |
Semiconductor device |
October 6, 2009 |
| A semiconductor device including an interrupt pattern generator for generating an interrupt enabling signal and interrupt data, an input buffer for receiving input serial data, a selector, receiving through-data serially output from said input buffer and serial data obtained on paral |
| 7599232 |
Semiconductor memory device |
October 6, 2009 |
| A word line driving circuit includes first, second, and third MOS transistors. Gates of the first and second transistors are commonly connected. Sources of the first and second transistors are connected to different power supplies. The third transistor is connected between the drains |
| 7599221 |
Floating gate memory device with improved reference current generation |
October 6, 2009 |
| A non-volatile semiconductor memory device is provided with: a first memory cell including a floating gate transistor; a first bitline connected to a diffusion layer which is used as a source of the first memory cell; a second bitline connected to a diffusion layer which is used as a |
