| Patent Number |
Title Of Patent |
Date Issued |
| 7626453 |
Nested transimpedance amplifier |
December 1, 2009 |
| A nested transimpedance amplifier (TIA) circuit comprises a zero-order TIA having an input and an output. A first operational amplifier (opamp) has an output and an input that communicates with said output of said zero-order TIA. A first power supply input applies a first voltage to the |
| 7622904 |
Power array system and method |
November 24, 2009 |
| A method of reducing switching losses in a switch array for an output regulator, the switch array to convert energy from an input source to a regulated output of the output regulator, the switch array including at least two power switches, includes determining an expected current flo |
| 7622731 |
Cross-point memory array |
November 24, 2009 |
| A circuit comprises a bulk silicon integrated circuit (IC). A first metallization layer is arranged adjacent to said bulk silicon IC. Phase change memory (PCM) is arranged adjacent to said first metallization layer and comprises a plurality of PCM cells each including a phase-change |
| 7619919 |
Multi-level memory |
November 17, 2009 |
| A storage system includes a charge storage cell and a controller. The charge storage cell includes first and second charge storage regions, each capable of assuming a plurality of charge levels. The controller programs the first charge storage region to one of the plurality of charge |
| 7619447 |
High voltage high side transistor driver |
November 17, 2009 |
| A high side transistor driver includes a sender module that generates a power input signal. A converter module receives the power input signal and generates an output signal that has a higher voltage than the power input signal. A receiver module receives the output signal and the power |
| 7617359 |
Adaptive storage system including hard disk drive with flash interface |
November 10, 2009 |
| A data storage system for a device including low power and high power modes comprises low power (LP) nonvolatile memory that includes a LP hard disk drive (HDD) having a non-volatile semiconductor memory interface, wherein said LP HDD communicates with said device via said non-volatile |
| 7616057 |
Nested transimpedance amplifier |
November 10, 2009 |
| A differential transimpedance amplifier circuit comprises a first operational amplifier having a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A second operational amplifier has a second inverting input, a second non-in |
| 7610498 |
Very low voltage power distribution for mobile devices |
October 27, 2009 |
| A mobile computing device comprises a central processing unit (CPU), memory that communicates with said CPU, an interface that communicates with said memory and said CPU and a display that communicates with said interface. A first distributed load center has first and second load ter |
| 7610013 |
Wireless audio for entertainment systems |
October 27, 2009 |
| A set top box comprises a signal receiver that includes a front end that receives broadband signals, and a tuner that tunes a channel including audio and video signals. A signal demodulator communicates with the signal receiver and demodulates the audio and video signals. A video pro |
| 7609043 |
Power array system and method |
October 27, 2009 |
| A method of sensing current comprises providing a current sensor having a gain resolution; setting the gain resolution of the current sensor to an initial resolution; sensing current flowing through the current sensor; evaluating an amplitude of the current; and changing the gain resolut |
| 7605739 |
Differential flash ADC with dual resistance ladder legs receiving amplified inputs |
October 20, 2009 |
| A differential analog to digital converter (ADC) comprises a first resistance ladder leg including two resistances having first ends that communicate with a middle node. A second resistance ladder leg includes two resistances having first ends that communicate with a middle node. A f |
| 7605724 |
Method and apparatus for a transmission signal up-converting filter |
October 20, 2009 |
| A digital up-sampling converter (DUSC) employs a signal input provided by a digital signal process (DSP) at a first rate feeding a Square Root Raised Cosine (SRRC) filter which provides for table look up of filter coefficients for a multiple symbol span and provides a sampling output at |
| 7605649 |
Nested transimpedance amplifier |
October 20, 2009 |
| A transimpedance amplifier comprises a first operational amplifier having an input and an output. A second operational amplifier has an input and an output that communicates with the input of the first operational amplifier. A first feedback element has one end that communicates with |
| 7600081 |
Processor architecture having multi-ported memory |
October 6, 2009 |
| A processing system comprises a multiport memory module having N ports, N data communication buses, and N hardware acceleration modules that communicate with a respective one of the N ports on a respective one of the N data communication buses. A first one of the N hardware accelerat |
| 7599671 |
Radar detection apparatus and method thereof |
October 6, 2009 |
| A wireless network device includes a signal receiving module that receives an RF signal, and a signal processing module that includes an automatic gain control (AGC) module and that generates control signals when a gain of the AGC module changes based on the RF signal. The network device |
| 7594127 |
Low voltage logic operation using higher voltage supply levels |
September 22, 2009 |
| A circuit comprises a first module and a second module that communicates with the first module. The first and second modules are connected in series between first and second reference potentials. A current balancing module communicates with a node between the first and second modules and |
| 7585542 |
Glassy metal disk |
September 8, 2009 |
| A method of making a hard disk drive platter comprises providing a substrate having first and second surfaces; arranging a strengthening layer including glassy metal on at least one of the first and second surfaces; and arranging at least one magnetic layer on at least one of the sub |
| 7573249 |
Power array system and method |
August 11, 2009 |
| A digital controller that controls an output regulator includes controller sub-blocks that perform sub-functions of the digital controller, wherein at least one of the controller sub-blocks includes at least one of a delay line and a first comparator. A controller monitors output power |
| 7571287 |
Multiport memory architecture, devices and systems including the same, and methods of using the |
August 4, 2009 |
| A multiport memory architecture, systems including the same and methods for using the same. The architecture generally includes (a) a memory array; (b) a plurality of ports configured to receive and/or transmit data; and (c) a plurality of port buffers, each of which is configured to |
| 7567404 |
Method for measuring actuator velocity during self-servo-write |
July 28, 2009 |
| A system comprises a positioning module that positions an actuator arm to read spirals that are prewritten. A frequency measuring module measures a first frequency of sync marks of said spirals. An estimation module calculates a second frequency of said sync marks when said actuator arm |
| 7561627 |
Method and system for channel equalization and crosstalk estimation in a multicarrier data trans |
July 14, 2009 |
| Improved techniques for concurrent channel equalization and far-end crosstalk channel compensation (e.g., estimation and/or cancellation) in a multicarrier data transmission system are disclosed. The improved techniques can produce coefficients for an electronic filter that provide c |
| 7561626 |
Method and system for channel estimation in a data transmission system |
July 14, 2009 |
| Improved techniques for estimating a channel (e.g., channel impulse response) in the time domain are disclosed. The improved techniques can be used to estimate time-domain channel taps in a digital communication system. An improved training sequence enables time-domain estimation and |
| 7560866 |
Control system for fluorescent light fixture |
July 14, 2009 |
| A ballast module for a fluorescent light comprises an electrolytic capacitance element. A temperature sensor senses a temperature of the electrolytic capacitance element. A control module communicates the temperature sensor and adjusts power output to the fluorescent light when the s |
| 7551694 |
Limiter based analog demodulator |
June 23, 2009 |
| A limiter based analog demodulator includes a power amplifier receiving a base-band signal and a local clock operating at the base-band frequency. A first multiplier receives an output from the power amplifier and the local clock to provide an in phase signal. A quadrature phase shifter |
| 7551024 |
Nested transimpedance amplifier |
June 23, 2009 |
| A nested transimpedance amplifier (TIA) circuit includes a zero-order TIA having an input and an output, and a first operational amplifier (opamp). The opamp includes an input that communicates with said output of said zero-order TIA, a first transistor driven by said input, a second |
| 7547601 |
Low power electrically alterable nonvolatile memory cells and arrays |
June 16, 2009 |
| A method of providing a memory cell includes providing a body of a semiconductor material having a first conductivity type, arranging a filter of a conductor-filter system in contact with a first conductor of the conductor-filter system, arranging at least portion of a second conduct |
| 7541962 |
Pipelined analog-to-digital converters |
June 2, 2009 |
| A pipelined analog to digital converter comprises a first ADC stage thatccc receives one of an input voltage and a first residue voltage and a first voltage reference and that generates a first digital signal and a second residue voltage. A second ADC stage receives the second residue |
| 7535110 |
Stack die packages |
May 19, 2009 |
| Integrated circuit packages having corresponding methods comprise: a substrate comprising first electric contacts; a first wirebond integrated circuit die mechanically coupled to the substrate and comprising second electric contacts electrically coupled to the first electric contacts of |
| 7528444 |
Efficient transistor structure |
May 5, 2009 |
| An integrated circuit comprises a first drain region having a generally rectangular shape. First, second, third and fourth source regions have a generally rectangular shape and that are arranged adjacent to sides of the first drain region. A gate region is arranged between the first, |
| 7516027 |
Configurable voltage regulator |
April 7, 2009 |
| A production testing system for testing an integrated circuit comprises a control module that generates a setpoint and a setpoint range. A configurable integrated circuit receives the setpoint and the setpoint range, that has M predetermined configurations, and generates N successive |
| 7514911 |
Voltage regulator feedback protection method and apparatus |
April 7, 2009 |
| An integrated circuit comprising a feedback terminal to receive a feedback signal. A voltage regulator has a feedback input to receive the feedback signal from the feedback terminal. The voltage regulator has a power output in communication with an output terminal. The voltage regulator |
| 7512504 |
Testing system using configurable integrated circuit |
March 31, 2009 |
| A testing system comprises a configurable integrated circuit that selectively communicates with one or more of N external impedances, that has M predetermined configurations that are selected based on an electrical characteristic of the one or more of the N external impedances, where |
| 7496167 |
Storage efficient sliding window sum |
February 24, 2009 |
| A delay buffer includes a first shift register receiving input data and having a shift signal input port. The first shift register right shifts the input data responsive to a shift signal on the shift signal input port. The shift signal is determined based on an effective bit width of |
| 7495621 |
Dual band WLAN antenna |
February 24, 2009 |
| An antenna system comprises first, second, and third antennas that are arranged on a printed circuit board (PCB) and that include an inner ring and an outer ring that is concentric to said inner ring. |
| 7489219 |
Power inductor with reduced DC current saturation |
February 10, 2009 |
| A power inductor includes a first magnetic core having first and second ends. The first magnetic core includes ferrite bead core material. An inner cavity arranged in the first magnetic core extends from the first end to the second end. A conductor passes through the cavity. A slotted |
| 7480578 |
Configurable voltage regulator |
January 20, 2009 |
| A testing system comprises a configurable integrated circuit that has M predetermined configurations that are selected based upon an input signal. The configurable integrated circuit generates a selected one of M discrete values of an output characteristic of the configurable integra |
| 7479766 |
Dynamic multiphase operation |
January 20, 2009 |
| An output regulator comprises M switch arrays, where M is an integer greater than 2. A controller selectively enables N of the M switch arrays in response to a sense signal. The sense signal is based on an output of the output regulator. The controller generates drive signals to control |
| 7472295 |
Pre-emptive power supply control system and method |
December 30, 2008 |
| A power supply supplies an output current to an integrated circuit having at least one circuit block. The at least one circuit block has an operating mode controllable in response to an enable signal or a clock signal. The integrated circuit receives a load current to power the circu |
| 7472294 |
Pre-emptive power supply control system and method |
December 30, 2008 |
| A device comprising an integrated circuit including at least one circuit block having an operating mode controlled in response to an enable signal or a clock signal. The circuit block receives a load current to power the circuit block, an amplitude of the load current being a function of |
| 7471482 |
Method for improved insitu spiral writing |
December 30, 2008 |
| A system includes a self-servo-write (SSW) module and a control module. The SSW module generates servo signals and a control signal. The control module generates a first current to bias an actuator arm against a spring when the control signal is received and discontinues the first curren |
| 7468631 |
Class D amplifier |
December 23, 2008 |
| A Class D amplifier comprising a ramp generator that generates a first reference signal and a second reference signal. A signal generator generates first, second, third and fourth pulses by comparing the first and second reference signals to an input signal. The signal generator tran |
| 7466769 |
Method and apparatus of cross-correlation |
December 16, 2008 |
| Briefly, a method and apparatus to calculate cross-correlation values of complex binary sequences are provided. The apparatus may include a transformation unit and a cross-correlator. The cross-correlator may include a cross-correlation controller to provide, based on a type bit and |
| 7463671 |
Rake receiver interface |
December 9, 2008 |
| In some embodiments of the present invention, a method and apparatus to generate interrupts in a transfer of information between a rake receiver and a processor, said interrupts having a rate of generation per unit time independent of a rate of the transfer of information per unit time. |
| 7459972 |
Amplifiers with compensation |
December 2, 2008 |
| An amplifier system includes a first amplifier, a second amplifier, a first capacitance, and a first transistor. The first amplifier has an input and an output. The second amplifier has an input that communicates with the output of the first amplifier. The first capacitance has one end |
| 7459381 |
Integrated circuits and interconnect structure for integrated circuits |
December 2, 2008 |
| A method for reducing parasitic resistance in an integrated circuit, comprises connecting first and second terminals of a first transistor to second and first plane-like metal layers, respectively; connecting third and fourth terminals of a second transistor to said first and a third |
| 7454643 |
Pre-emptive power supply control system and method |
November 18, 2008 |
| A control system for controlling a power supply having an operating function. The power supply to supply an output current to an integrated circuit having at least one circuit block that is controllable by an enable signal or a clock signal. A receiver to receive the enable signal. A |
| 7443329 |
Capacitive digital to analog and analog to digital converters |
October 28, 2008 |
| A digital to analog converter (DAC) comprises X capacitive DACs that are connected together in series, wherein X is an integer greater than one. Each of the X capacitive DACs comprise M switches wherein M is an integer greater than one; a signal input; a signal output; and M capacitances |
| 7439896 |
Capacitive digital to analog and analog to digital converters |
October 21, 2008 |
| A digital-to-analog converter (DAC) comprises a capacitive DAC that comprises N first capacitances that are connected in parallel and that have first ends and second ends, wherein N is an integer greater than one, and N first switches that selectively connect a selected one of the se |
| 7428260 |
Unified MMSE equalization and multi-user detection approach for use in a CDMA system |
September 23, 2008 |
| A unified minimum mean square error (MMSE) equalization/multi-user detection (MUD) approach for demodulating direct sequence CDMA (DS-CDMA) signals is described. In at least one embodiment, the unified approach is capable of generating a variety of cost-effective receiver demodulation |
| 7423901 |
Calibration system for writing and reading multiple states into phase change memory |
September 9, 2008 |
| A phase change memory system includes M phase change memory cells, where M is an integer greater than or equal to one. A write module selectively writes at least one of the M phase change memory cells based on a write parameter. A read module selectively reads back a resistance value for |
