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Marvell International Ltd. Patents
Assignee:
Marvell International Ltd.
Address:
Hamilton, BM
No. of patents:
2142
Patents:












Patent Number Title Of Patent Date Issued
RE43326 Tap connections for circuits with leakage suppression capability April 24, 2012
An integrated circuit biases the substrate and well using voltages other than those used for power and ground. Tap cells inside the standard cell circuits are removed. New tap cells used to bias the substrate and well reside outside the standard cell circuits. The location of the new
RE42947 Circuits, systems, methods, and software for power factor correction and/or control November 22, 2011
Circuits, systems, methods and software for controlling a power conversion and/or correcting and/or controlling a power factor in such conversion(s). The present invention generally takes a computational approach to reducing or minimizing zero current periods in the critical mode of
RE42946 Circuits, systems, methods, and software for power factor correction and/or control November 22, 2011
Circuits, systems, methods and software for controlling a power conversion and/or correcting and/or controlling a power factor in such conversion(s). The present invention generally takes a computational approach to reducing or minimizing zero current periods in the critical mode of
RE42776 Tap connections for circuits with leakage suppression capability October 4, 2011
An integrated circuit biases the substrate and well using voltages other than those used for power and ground. Tap cells inside the standard cell circuits are removed. New tap cells used to bias the substrate and well reside outside the standard cell circuits. The location of the new
RE41831 Class B driver October 19, 2010
A communication circuit, Ethernet controller card, and method comprises K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two; K voltage-to-current converters each providing
RE41792 Controllable integrator October 5, 2010
Integrated circuitry for selectively introducing capacitance and for controlling the transconductance transfer function of one or more amplifiers includes concatenated differential amplifiers with one or more pairs of switchable capacitive components differentially connected across o
RE40971 Direct drive programmable high speed power digital-to-analog converter November 17, 2009
A current source is provided according to the present invention. The current source includes N current sources configured in a parallel arrangement, wherein N is at least two. Each of the N current sources includes a respective control input. The current source also includes M delay
RE39026 Bus protocol March 21, 2006
A write-only data transfer protocol for peripheral component interface busses and a method for transferring data between source and destination communication units is provided. The method includes the source communication unit writing a buffer allocation request to the destination un
RE38455 Controllable integrator March 9, 2004
Integrated circuitry for selectively introducing capacitance and for controlling the transconductance transfer function of one or more amplifiers includes concatenated differential amplifiers with one or more pairs of switchable capacitive components differentially connected across o
RE37751 Apparatus and method for transient suppression in synchronous data detection systems June 18, 2002
Disclosed is a method for transient suppression in synchronous data protection systems which includes high-pass filtering of the signal produced by the sampling and shaping circuits before the signal enters the timing and gain control circuits. This high-pass filtering may be turned
RE37716 High-speed, low power, medium resolution analog-to-digital converter and method of stabilization May 28, 2002
A full flash analog to digital converter operates on an input voltage with a track/hold circuit coupled to a reference input of each of multiple comparators. Particular track/hold circuits are activated in sequence through a track/hold select circuit, and a look-up table and a digita
RE37335 Ripple carry logic and method August 21, 2001
Apparatus and method to logically process signals representative of multiple bits of multiple-bit numbers include successively delaying applications of the bit-representative signals to logical processing stages from associated input registers by a delay interval between input regist
D626549 Portable computing device November 2, 2010
8589774 Averaging signals to improve signal interpretation November 19, 2013
Systems and techniques to interpret signals on a noisy channel are described. A described technique includes storing a group of signals including a filtered digital signal and one or more previous signals, the filtered digital signal being based on an analog signal; interpreting the
8589711 Power supply delivery for leakage suppression modes November 19, 2013
A system including an integrated circuit (IC) and a power supply regulator external to the IC. The IC operates in accordance with an active mode and a lower power mode, and is configured to retain a logical state during the low power mode. The power supply regulator is configured to
8588847 Method and apparatus for reducing power consumption in a multimode terminal when performing IP c November 19, 2013
An apparatus for reducing power consumption in an IP (Internet Protocol) communications device. The apparatus may include a high-power consumption main application processor and a low-power consumption application processor to share processor functions. The high-power consumption app
8588705 System and method of determining Power over Ethernet impairment November 19, 2013
A system and method of determining an unbalanced current condition in Power over Ethernet applications are disclosed. In some implementations, a user or network administrator may be notified of potential impairments due to unbalanced current.
8588347 Systems and methods for performing efficient blind decoding at a wireless receiver November 19, 2013
Systems and methods for performing efficient blind decoding. A first plurality of decision metrics corresponding to a first repetition of periodic decoding information is stored. The first plurality of decision metrics is grouped into sequential portions. A plurality of combined vers
8588229 Multiple address databases in a switch without the need for extra memory November 19, 2013
A system comprises N ports and memory that stores M address databases each storing MAC addresses and having a database number. One of the N ports associated with one of the M address databases receives a frame including a destination MAC address, wherein N and M are integers greater
8588186 Automatic override of power control parameters for WiMAX mobile stations November 19, 2013
Methods for a wireless transceiver, the methods having corresponding apparatus and computer programs, comprise: transmitting a ranging sequence modulated according to a first modulation mode at a power level selected according to a normalized carrier-to-noise value associated with th
8587827 Smart imaging device architecture November 19, 2013
Embodiments of the present invention provide an integrated circuit having analog front end (AFE) circuitry to convert an analog signal to a digital signal, the analog signal being associated with an image captured by a sensor of an imaging device, illumination drive circuitry to drive an
8587609 Accuracy-adaptive and scalable vector graphics rendering November 19, 2013
Embodiments of the present invention provide methods and associated architecture of accuracy adaptive and scalable vector graphics rendering including rendering a graphic comprising a plurality of line segments by processing each of the plurality of line segments in a first pass, and
8587381 Even order distortion cancellation in single-ended input, differential output amplifiers using f November 19, 2013
An amplifier and a method are provided for converting a single ended signal to an amplified differential signal. The amplifier comprises an input configured to receive a single ended signal, a differential amplifier that outputs an amplified differential signal based on the single en
8583991 High density multi-level memory November 12, 2013
Embodiments of the present invention provide high density, multi-level memory. Thus, various embodiments of the present invention provide a memory apparatus in accordance with various embodiments of the present invention includes a memory block comprising a plurality of cells, each c
8583821 Streaming traffic classification method and apparatus November 12, 2013
In a method of classifying streaming media data, a media server may be identified by monitoring packets transmitted on a wireless network between a server and a client. A rule to identify the data associated with the media server may be generated in response to identifying the media
8582692 Systems and methods for calibrating digital baseband DC offset in an OFDM receiver November 12, 2013
In accordance with the teachings described herein, systems and methods are provided for calibrating DC offset in a receiver. A DC calibration circuit may be used that is configured to remove DC offset from a digital multi-carrier modulated (MCM) signal that includes a sequence of MCM
8582507 All-in-one wireless network device November 12, 2013
A system to wirelessly communicate with a wireless network. The system includes a memory and a processor. The memory is configured to store a first queue, a second queue, and a processor queue. The processor is configured to: selectively execute a first virtual machine using the proc
8582439 Buffer overflow prevention for network devices November 12, 2013
A network device including a buffer and a processor. The buffer is configured to store a packet received by the network device. The buffer has a predetermined size. The packet includes a first transmit window size for a first communication session handled by the network device. The p
8582434 Generalized auto media selector November 12, 2013
A media selection system includes a plurality of media ports. Each of the plurality of media ports is coupled to a corresponding physical medium, and each of the plurality of media ports is configured to generate an activity signal and a link status signal. A priority storage module is
8582428 Methods and apparatus for flow classification and flow measurement November 12, 2013
A packet processing pipeline is configured to classify packets received via a network based on information in the received packets: (1) as belonging to one of a plurality of identified flows, or (2) as not belonging to any of the plurality of identified flows. For each received packe
8582409 Method and device for increased pull-in range of timing recovery circuit for storage devices November 12, 2013
A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code
8582387 Method and apparatus for supplying power to a static random access memory (SRAM) cell November 12, 2013
Described herein are methods and apparatuses for write-assist voltage generation and power-down voltage scaling for static random access memory (SRAM) cells. According to various embodiments, an SRAM cell may include a local power supply voltage node for receiving a power supply voltage
8582187 Method and apparatus for reducing a color fringe November 12, 2013
This disclosure describes techniques and apparatuses for reducing color fringes. In some embodiments, inaccuracies from color-insensitive sensors are corrected. Inaccuracies can be corrected in part by shortening a first illumination made temporally proximate a second illumination. By so
8581987 Systems and methods for evaluating video quality November 12, 2013
System and methods are provided for evaluating quality of a video sequence. For example, a video sequence including one or more image frames is received, the video sequence being associated with a video processing system. A frame quality factor for each image frame in the video seque
8581635 Method and apparatus for sampling November 12, 2013
Aspects of the disclosure provide a sampling circuit having reduced sampling distortions. The sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. The first channel terminal can be configured to receive an input signal,
8581374 Placing heat sink into packaging by strip formation assembly November 12, 2013
Embodiments of the present disclosure describe semiconductor device packaging techniques and devices that incorporate a heat spreader into the insulating material of a packaged semiconductor device. In one embodiment, a device comprising a semiconductor device is coupled to a substra
8578254 Modified trace-back using soft output Viterbi algorithm (SOVA) November 5, 2013
Systems and methods are provided for generating error events for decoded bits using a Soft output Viterbi algorithm (SOVA). A winning path through a trellis can be determined and decoded information can be generated. Path metric differences can be computed within the trellis based on the
8578251 Power saving area-efficient hybrid BCH coding system November 5, 2013
Power-saving and area-efficient BCH coding systems are provided that employ hybrid decoder architectures. The BCH decoder architectures comprise both special-purpose hardware and firmware, thereby taking advantage of both the speed of special-purpose hardware and the energy-efficienc
8578229 High-throughput pipelined and scalable architecture for a K-Best MIMO detector November 5, 2013
A high throughput and scalable MIMO detector can use a K-Best detection algorithm to find K combinations of transmit symbols that are likely to be the symbols that were actually transmitted. The K-best MIMO detector can include a plurality of stages, where each stage may correspond to a
8578188 Method and system for selecting an operating frequency for a chip to provide a desired overall p November 5, 2013
Methods, apparatus, and computer program products for implementing power management within Systems on Chips (SOCs). The method includes selecting an operating frequency for a chip from an operating frequency point set that provides a desired overall power dissipation value.
8577322 Signal mixer having a single-ended input and a differential output November 5, 2013
A single-ended-to-differential mixer includes a differential pair amplifier, a passive current source, a cancellation sub-circuit, and a mixer. The differential pair amplifier is configured to receive a single-ended input signal. The differential pair amplifier includes a first input
8577305 Circuits and methods for generating oscillating signals November 5, 2013
Embodiments of the present invention may be used to generate oscillating signals. One embodiment of the present invention includes a circuit that receives a differential signal to be divided. The circuit converts the differential signal into an injection signal. The injection signal is
8577037 Pipelined packet encapsulation and decapsulation for temporal key integrity protocol employing a November 5, 2013
A network device includes an input circuit and a key mixing circuit. The input circuit is configured to receive i) a message and ii) a plurality of packets from a transmitting device. The message includes i) an address of the transmitting device and ii) a predetermined value for a count.
8576969 Method and apparatus for detecting sync mark November 5, 2013
Aspects of the disclosure provide a method for detecting marks. The method includes receiving a data signal from a channel. Further, the method includes matching the data signal to a template that corresponds to a predetermined pattern transmitted over the channel to detect marks, pr
8576865 Physical layer devices for network switches November 5, 2013
A switch includes a first IC and a second IC. The first IC includes a first set of (N+1) serializer/deserializer (SERDES) modules communicating with a first set of (N+1) SERDES modules of a switch IC; a first set of N SERDES modules communicating with a first set of N ports; and a first
8576837 Voice packet redundancy based on voice activity November 5, 2013
One embodiment, having a corresponding method and computer program, features an apparatus comprising: an input circuit configured to receive packets of encoded voice data, wherein the encoded voice data includes intervals of voice activity and intervals of silence, and wherein each of
8576678 System and method for tracking position of a laser beam on a storage device November 5, 2013
A system including a control module, error modules, and a tracking module. The control module: transitions a laser beam between positions on an storage medium; based on a tracking signal, adjusts a speed that the laser beam is transitioned, and while the laser beam is transitioned, i
8576625 Decoder parameter estimation using multiple memory reads November 5, 2013
An apparatus including a memory array and control circuitry. The control circuitry is configured to, based at least on a plurality of read comparison results, determine a number of memory cells of the memory array that have threshold voltages that fall into each of a plurality of vol
8576105 Method and apparatus for timing recovery November 5, 2013
An aspect of the disclosure provides a signal processing circuit that decouples a timing loop and an equalizer adaptation loop. The signal processing circuit includes an analog to digital converter (ADC), an equalizer, a detector, and a timing module. The ADC is configured to receive
8572454 System and method for decoding correlated data October 29, 2013
A communication system includes an encoder configured to encode first data words to generate code words. A modulator is configured to modulate the code words into a first signal that is transmitted on a communication channel. A demodulator is configured to demodulate a second signal,

 
 
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