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Lam Research Corporation Patents
Assignee:
Lam Research Corporation
Address:
Fremont, CA
No. of patents:
1031
Patents:


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Patent Number Title Of Patent Date Issued
6287974 Method of achieving top rounding and uniform etch depths while etching shallow trench isolation September 11, 2001
A method of etching a trench in a silicon layer is disclosed. The silicon layer being disposed below an oxide layer. The oxide layer being disposed below a nitride layer. The nitride layer being disposed below a photoresist mask. The etching taking place in a plasma processing chamber.
6283827 Non-contacting support for a wafer September 4, 2001
In one type of planarizing machine, a wafer is maintained with its fragile processed side facing downward as the wafer is passed from a robot to a load station and from the load station to a spindle carrier, and then returned from the spindle carrier to the load station to the robot. The
6283355 End effector for substrate handling September 4, 2001
An end effector has a tower with non-stacked spatulas. Tolerance stacking is avoided by making grooves in the tower relative to a common reference surface, and mounting the spatulas in such grooves. The grooves are provided in separate planar walls of the tower. The walls intersect to
6283143 System and method for providing an integrated gas stick September 4, 2001
The present invention discloses a gas delivery apparatus for control of process and purge gases is disclosed that is suitable for use in a semiconductor processing system. The gas delivery apparatus includes a base plate integrating a printed circuit board and a heating layer. In add
6280563 Plasma device including a powered non-magnetic metal member between a plasma AC excitation sourc August 28, 2001
A plasma processor for a workpiece includes a coil for supplying an r.f. exciting field through a window to a plasma in a vacuum chamber. A powered non-magnetic metal member between the coil and plasma couples the field to the plasma. In first and second embodiments, the metal member is
6277237 Chamber liner for semiconductor process chambers August 21, 2001
A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor
6277203 Method and apparatus for cleaning low K dielectric and metal wafer surfaces August 21, 2001
Provided is a method for cleaning hydrophobic surfaces, such as low K dielectric organic or inorganic surfaces as well as metallization surfaces of a semiconductor wafer. The method includes: (a) applying a surfactant solution to the surface; (c) scrubbing the surface; and (c) spin-rinsi
6274059 Method to remove metals in a scrubber August 14, 2001
A method to remove metal contaminants in a substrate cleaning process. The present invention may replace or be used in conjunction with other substrate cleaning systems. This method comprises adding a citric acid solution to the liquid medium of a semiconductor substrate cleaning sys
6272712 Brush box containment apparatus August 14, 2001
A semiconductor processing system, such as a system for scrubbing both sides of a wafer at the same time, that includes a brush box containment apparatus for use with highly-acidic or other volatile chemical solutions, a roller positioning apparatus and a (brush) placement device.
6270862 Method for high density plasma chemical vapor deposition of dielectric films August 7, 2001
A plasma processing system for processes such as chemical vapor deposition includes a plasma processing chamber, a substrate holder for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substrate holder, the dielectric member
6270622 Method and apparatus for improving accuracy of plasma etching process August 7, 2001
The invention provides a process and apparatus for improving the accuracy of plasma etching processes such as trench and recess etch processes. In such processes, a trench or recess is etched into a layer of material which does not have a stop layer at the desired depth of the etched
6268700 Vacuum plasma processor having coil with intermediate portion coupling lower magnetic flux densi July 31, 2001
A vacuum plasma processor for treating a workpiece with an RF plasma has a plasma excitation coil including interior, intermediate and peripheral portions. The interior and peripheral portions have turns connected to each other and arranged so the magnetic flux density coupled to the pla
6268260 Methods of forming memory cell capacitor plates in memory cell capacitor structures July 31, 2001
An improved method of forming a memory cell capacitor plate is disclosed. The method of forming a memory cell capacitor plate comprises the steps of depositing a sacrificial layer and forming an opening in the sacrificial layer. Then an electrode material layer which includes a substanti
6267642 Sensing the presence of a wafer July 31, 2001
In a machine for planarizing wafers, when a spindle carrier descends over the load station, it needs a way of determining whether it should descend to a first position suitable for depositing a wafer onto the load station or whether it should descend to a lower second position suitable f
6267545 Semiconductor processing platform architecture having processing module isolation capabilities July 31, 2001
An interlocked control system is provided for dual sided slot valves contained in a vacuum body between each of a plurality of adjacent process and transport modules. Separate valves are provided for each of two valve body slots, one body slot being separately closed or opened independen
6267142 Fluid delivery stablization for wafer preparation systems July 31, 2001
A solution delivery system for use with a wafer preparation system is provided. The solution deliver system includes a de-ionized water (DIW) dispense drawer having an input for receiving an initial flow of DIW from a facility water supply. The DIW dispense drawer further includes a firs
6265831 Plasma processing method and apparatus with control of rf bias July 24, 2001
A tendency for a discontinuity to occur in the amount of power reflected back to an r.f. bias source of a vacuum plasma processor is overcome by controlling the r.f. bias source output power so the power delivered to plasma in a vacuum processing chamber remains substantially constant. T
6265231 Process control via valve position and rate of position change monitoring July 24, 2001
A computer implemented method for endpointing an etch process comprising the acts of monitoring an attribute of a pressure control valve and determining an endpoint of the process based upon the monitored attribute. The monitored attribute includes the position of the pressure control
6263542 Tolerance resistant and vacuum compliant door hinge with open-assist feature July 24, 2001
A hinge assembly and methods for mounting a hatch relative to a port defined in a cover of a vacuum chamber to close and open the port. A torsion rod mounted between the port and the hatch is in torsion when the hatch is in a closed position relative to the port, assisting port-opening
6261407 Method and apparatus for removal of thin films from wafers July 17, 2001
A method and apparatus for processing a wafer are described. In one embodiment, a method for processing a wafer comprises applying a sealing mechanism to the wafer to create multiple separate, sealed portions of the wafer, and applying a plurality of different chemistries to multiple
6261168 Chemical mechanical planarization or polishing pad with sections having varied groove patterns July 17, 2001
A CMP polishing pad improves overall material removal rate uniformity by combining multiple polishing pad sections in a serially linked manner, where the polishing pad sections are characterized by at least two different material removal rate profiles. The polishing pad is designed by
6261155 Method and apparatus for in-situ end-point detection and optimization of a chemical-mechanical p July 17, 2001
A linear polishing belt for use in chemical-mechanical polishing (CMP) of a substrate comprises an opening and a flexible monitoring window secured to the belt to close the opening and to create a monitoring channel in the belt. A plurality of monitoring channels can also be used. A film
6259334 Methods for controlling an RF matching network July 10, 2001
Disclosed are methods and devices for tuning an impedance matching network to a tune point where power reflection is at a minimum. The impedance matching network is coupled between an rf generator and a load to transmit rf power to the load. The impedance matching network includes a set
6257168 Elevated stationary uniformity ring design July 10, 2001
A plasma processing reactor for processing a semiconductor substrate is disclosed. The apparatus includes a chamber. Additionally, the chamber includes a bottom electrode that is configured for holding the substrate. The apparatus further includes a stationary uniformity ring that is
6255221 Methods for running a high density plasma etcher to achieve reduced transistor device damage July 3, 2001
Disclosed are methods and systems for etching dielectric layers in a high density plasma etcher. A method includes providing a wafer having a photoresist mask over a dielectric layer in order to define at least one contact via hole or open area that is electrically interconnected down to
6254459 Wafer polishing device with movable window July 3, 2001
A wafer polishing device with movable window can be used for in-situ monitoring of a wafer during CMP processing. During most of the CMP operation, the window remains below a polishing surface of a polishing device to protect the window from the deleterious effects of the polishing p
6251793 Particle controlling method for a plasma processing chamber June 26, 2001
A plasma processing chamber includes a substrate holder and a member of silicon nitride such as a liner, focus ring or a gas distribution plate, the member having an exposed surface adjacent the substrate holder and the exposed surface being effective to minimize particle contamination d
6247903 Pressure fluctuation dampening system June 19, 2001
A pressure booster and method for amplifying a water pressure that is supplied by water facility is provided. The pressure booster is configured to be connected between he water facility and one or more semiconductor substrate cleaning systems. The pressure booster includes a pump having
6247197 Brush interflow distributor June 19, 2001
A brush assembly includes a distributor having a slot matrix formed in an outer surface of the distributor, the slot matrix including a plurality of longitudinal slots intersecting a plurality of annular slots. The brush assembly further includes a housing having an inner surface abuttin
6245192 Gas distribution apparatus for semiconductor processing June 12, 2001
A gas distribution system for uniformly or non-uniformly distributing gas across the surface of a semiconductor substrate. The gas distribution system includes a support plate and a showerhead which are secured together to define a gas distribution chamber therebetween. A baffle asse
6244946 Polishing head with removable subcarrier June 12, 2001
A polishing head for performing chemical-mechanical polishing on a linear polisher has a dual stage wafer carrier assembly that incorporates a removable subcarrier. When in use, a main pressure chamber exerts a downforce on the subcarrier housing, while a separate secondary pressure
6244811 Atmospheric wafer transfer module with nest for wafer transport robot June 12, 2001
A load lock wafer transfer face is provided at an acute angle with respect to a footprint dimension line, so the length of the footprint dimension line does not include the entire minimum length of the wafer transfer distance that must separate a robot from the wafer transfer face of a l
6242360 Plasma processing system apparatus, and method for delivering RF power to a plasma processing June 5, 2001
The present invention provides a plasma processing apparatus, system, and method for providing RF power to a plasma processing chamber. The plasma processing system includes an RF generator, a plasma chamber, a match network box, a first cable, a second cable, and means for electrically
6242107 Methods for etching an aluminum-containing layer June 5, 2001
A method for etching selected portions of an aluminum-containing layer of a layer stack that is disposed on a substrate. The aluminum-containing layer is disposed below a photoresist mask having a pattern thereon. The method includes providing a plasma processing chamber and positioning
6241845 Apparatus for reducing process drift in inductive coupled plasma etching such as oxide layer June 5, 2001
A plasma processing chamber includes a substrate holder and a gas distribution plate having an inner surface facing the substrate holder, the inner surface being maintained below a threshold temperature to minimize process drift during processing of substrates. The inner surface is c
6240588 Wafer scrubbing brush core June 5, 2001
A brush core and the method for making a brush core for use in substrate scrubbing are provided. The substrate can be any substrate that may need to undergo a scrubbing operation to complete a cleaning operation, etching operation, or other preparation. For instance, the substrate can be
6239403 Power segmented electrode May 29, 2001
A power segmented electrode useful as part of an upper electrode and/or substrate support for supporting a substrate such as a semiconductor wafer in a plasma reaction chamber such as a single wafer etcher. The power segmented electrode includes a plurality of electrodes which are suppli
6235640 Techniques for forming contact holes through to a silicon layer of a substrate May 22, 2001
A method for simultaneously stripping a photoresist mask employed for etching, in a low pressure, high density plasma processing chamber, a contact hole through an oxide layer to a silicon layer of a substrate and soft etching a surface of the silicon layer at a bottom of the contact
6231427 Linear polisher and method for semiconductor wafer planarization May 15, 2001
A wafer polisher and method for the chemical mechanical planarization of semiconductor wafers. The polisher includes a wafer holder for supporting the semiconductor wafer and a linear polishing assembly having a polishing member positioned to engage the surface of the wafer. The polishin
6230753 Wafer cleaning apparatus May 15, 2001
A method and apparatus for cleaning a wafer oriented vertically is provided. The apparatus includes a first brush and a second brush located horizontally from the first brush. During unloading of the wafer after cleaning, the wafer is located vertically between the first and second b
6230651 Gas injection system for plasma processing May 15, 2001
A plasma processing system for plasma processing of substrates such as semiconductor wafers. The system includes a plasma processing chamber, a substrate support for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substr
6229264 Plasma processor with coil having variable rf coupling May 8, 2001
A coil for exciting an r.f. plasma in a vacuum plasma processing chamber includes plural radially and circumferentially extending turns connected between a pair of r.f. excitation terminals. In one embodiment, a drive mechanism varies r.f. field coupling coefficients between different ra
6228774 High aspect ratio sub-micron contact etch process in an inductively-coupled plasma processing sy May 8, 2001
The invention relates to a method of etching a feature in an oxide layer using a photoresist mask, the oxide layer being disposed above an underlying layer of a substrate inside an inductively-coupled plasma processing chamber. The method includes flowing an etchant source gas that i
6228278 Methods and apparatus for determining an etch endpoint in a plasma processing system May 8, 2001
Methods and apparatus for ascertaining the end of an etch process while etching through a target layer on a substrate in a plasma processing system which employs an electrostatic chuck. The end of the etch process is ascertained by monitoring the electric potential of the substrate to
6227140 Semiconductor processing equipment having radiant heated ceramic liner May 8, 2001
A plasma processing chamber including a ceramic liner heated by radiant heating. The liner can be a series of tiles or a continuous cylindrical liner. The liner and other parts such as a gas distribution plate and a plasma screen can be made of SiC which advantageously confines the plasm
6225234 In situ and ex situ hardmask process for STI with oxide collar application May 1, 2001
A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first etching chemistry is applied whi
6224461 Method and apparatus for stabilizing the process temperature during chemical mechanical polishin May 1, 2001
A temperature compensating unit is coupled to a linearly moving belt of a polisher for adjusting the temperature of the belt, which temperature is measured by a sensor situated proximal to the belt.
6222718 Integrated power modules for plasma processing systems April 24, 2001
A power delivery system for providing energy to sustain a plasma in a plasma processing chamber configured for processing substrates. The power delivery system includes a metallic enclosure having an input port, a first output port, a second output port, and a third output port. There is
6221792 Metal and metal silicide nitridization in a high density, low pressure plasma reactor April 24, 2001
A nitridization process to form a barrier layer on a substrate is described. The nitridization process includes depositing a layer of metal or metal silicide on a surface of the substrate, placing the substrate into a high density, low pressure plasma reactor, introducing into the hi
6218309 Method of achieving top rounding and uniform etch depths while etching shallow trench isolation April 17, 2001
A method of etching a trench in a silicon layer is disclosed. The silicon layer is disposed below a hard mask layer having a plurality of patterned openings. The etching takes place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma
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