| Patent Number |
Title Of Patent |
Date Issued |
| 7624330 |
Unified memory architecture for recording applications |
November 24, 2009 |
| An apparatus comprising a first circuit, a second circuit and a disc. The first circuit may be configured to (i) extract video data as data blocks from an input signal and (ii) perform error correction on the data blocks with a delta syndrome based iterative Reed-Solomon decoding. The se |
| 7624223 |
Apparatus and methods for multiple unidirectional virtual connections among SAS devices |
November 24, 2009 |
| Apparatus and methods for enabling multiple, unidirectional, virtual connections between a first SAS device and multiple other SAS devices in a SAS domain. An enhanced first SAS device may be substantially simultaneously coupled to each of two other SAS devices through one or more ap |
| 7623575 |
Method and apparatus for sub-pixel motion compensation |
November 24, 2009 |
| A method of motion compensation for an input block is disclosed. The method generally includes the steps of (A) generating a plurality of tap values in response to a motion vector for the input block, (B) generating an interpolated block by programmable filtering a reference block using |
| 7623472 |
Dynamic peer application discovery |
November 24, 2009 |
| Dynamic discovery of active peer applications and information related thereof in a network is described. In one embodiment of the present invention, the discovery and information related to peer applications is maintained by a plurality of network device peers. This information is su |
| 7620924 |
Base platforms with combined ASIC and FPGA features and process of using the same |
November 17, 2009 |
| A process is disclosed for configuring a base platform having ASIC and FPGA modules to perform a plurality of functions. A verified RTL hardware description of a circuit is mapped and annotated to identify memory programmable functions. The memory programmable functions are grouped for |
| 7620786 |
Storage recovery using a delta log |
November 17, 2009 |
| A system and method for removing one volume of a redundant data storage system, keeping a delta log of subsequent changes to the remaining volumes of the redundant data storage system, replacing the volume, and rebuilding the volume by using the delta log is disclosed. The system and |
| 7620743 |
System and method for implementing multiple instantiated configurable peripherals in a circuit d |
November 17, 2009 |
| A reusable software block is adapted to control multiple instantiations of a peripheral device within a system. A device hardware abstraction layer defines offset values for registers of the peripheral device and a data structure for the peripheral device. A platform hardware abstraction |
| 7620320 |
Fibre selective control switch system |
November 17, 2009 |
| The present invention is directed to a Fiber Selective Control Switch system for simulating human intervention during a test process for fiber network environments. The Fiber Selective Control Switch system may comprise a MCU, and at least one FSCS module mounted on a SFP device. The |
| 7620103 |
Programmable quantization dead zone and threshold for standard-based H.264 and/or VC1 video enco |
November 17, 2009 |
| A video encoder is disclosed that includes an encoder circuit, a quantizer circuit and a control circuit. The encoder circuit may be configured to generate a number of coefficient values in response to a video stream and a number of quantized values. The quantizer circuit may be configur |
| 7619294 |
Shallow trench isolation structure with low trench parasitic capacitance |
November 17, 2009 |
| Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. First, a trench is etched in the integrated circuit substrate. A lower dielectric layer is then formed in the trench such that the lower dielectric layer at least partially fills |
| 7619272 |
Bi-axial texturing of high-K dielectric films to reduce leakage currents |
November 17, 2009 |
| The present invention is directed to a method of fabricating a high-K dielectric films having a high degree of crystallographic alignment at grain boundaries of the film. A disclosed method involves providing a substrate and then depositing a material used in forming the high-K diele |
| 7617428 |
Circuits and associated methods for improved debug and test of an application integrated circuit |
November 10, 2009 |
| Circuits and associated methods for testing internal operation of an application integrated circuit. Features and aspects hereof add configurable test interrupt circuits to an application circuit design to permit dynamic, configurable interrupt generation from an integrated circuit b |
| 7617427 |
Method and apparatus for detecting defects in integrated circuit die from stimulation of statist |
November 10, 2009 |
| A method and computer program for detecting and locating defects in integrated circuit die from stimulation of statistical outlier signatures includes receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circui |
| 7616631 |
Method and apparatus for debugging protocol traffic between devices in integrated subsystems |
November 10, 2009 |
| A method, apparatus, and computer instructions for a storage subsystem. This subsystem includes controller devices, storage devices, and a communications network. The communications network connects the controller devices and the storage devices. The communications network also inclu |
| 7616517 |
Config logic power saving method |
November 10, 2009 |
| A circuit which includes an IP cell having a function select input signal line, combinatorial logic having an output connected to the function select input signal line of the IP cell, a configuration register having an output connected to an input of the combinatorial logic, wherein a |
| 7613856 |
Arbitrating access for a plurality of data channel inputs with different characteristics |
November 3, 2009 |
| A configurable buffer arbiter is provided that combines a time-slot based algorithm, a fairness-based algorithm, and a priority-based algorithm to meet the bandwidth and latency requirements of multiple channels needing access to a buffer memory. The channels have different static and dy |
| 7613264 |
Flexible sampling-rate encoder |
November 3, 2009 |
| A method for implementing a flexible sampling-rate encoder, comprising the steps of (A) sampling an input signal at a regular time-interval to produce sampled data, (B) generating a pseudo-random bit sequence having a plurality of bits, wherein each bit corresponds to a different samplin |
| 7613081 |
Control of stepper motor in an optical disc |
November 3, 2009 |
| A method for controlling a stepper motor in an optical disc system, comprising the steps of (A) measuring a static offset of a center error signal, (B) measuring a maximum value, minimum value and an average value of the center error signal in response to rotating the optical disc, (C) |
| 7612828 |
Progressive video detection with aggregated block SADS |
November 3, 2009 |
| A method for detecting progressive material in a video sequence is disclosed. The method generally includes the steps of (A) calculating a plurality of block statistics for each of a plurality of blocks in a current field of the video sequence, (B) calculating a plurality of field st |
| 7612427 |
Apparatus for confining inductively coupled surface currents |
November 3, 2009 |
| A deep n-well is formed beneath the area of an inductor coil. The use of a deep n-well lessens the parasitic capacitance by placing a diode in series with the interlayer dielectric cap. The deep n-well also reduces substrate noise. Once the n-well is implanted and annealed, a cross hatch |
| 7610200 |
System and method for controlling sound data |
October 27, 2009 |
| A system and method for controlling access to parameter blocks of a sound processor. According to the method and system disclosed herein, the present invention includes a host, a sound processor coupled to the host, and at least two copies of a parameter block associated with the sound |
| 7609725 |
Large transmissions on packetized data bus |
October 27, 2009 |
| A packetized data bus interface may be placed in a mode where data packets may be transmitted that are much larger than the standard packet size. The mode may allow the interface device and any other devices, networks, or transmission lines attached to the interface device to be more |
| 7607057 |
Test wrapper including integrated scan chain for testing embedded hard macro in an integrated ci |
October 20, 2009 |
| An apparatus and method are disclosed for testing a hard macro that is embedded in a system on a chip (SOC) that is included in an integrated circuit chip. The SOC includes the hard macro. A logic design and operation of the hard macro are unknown. A test wrapper is embedded in the S |
| 7606692 |
Gate-level netlist reduction for simulating target modules of a design |
October 20, 2009 |
| A method for analyzing a circuit design in preparation for a simulation. The method generally includes the steps of (A) marking each of a plurality of modules between a target module of the modules and a top module of the modules in a hierarchy of the circuit design as a first type b |
| 7605642 |
Generic voltage tolerant low power startup circuit and applications thereof |
October 20, 2009 |
| Circuits and systems including a startup circuit coupled to a reference source for providing startup current to the reference source wherein no transistor of the startup circuit experiences a stress condition and wherein the startup circuit consumes no static current following stabil |
| 7605628 |
System for glitch-free delay updates of a standard cell-based programmable delay |
October 20, 2009 |
| A method for glitch-free updates of a standard cell-based programmable delay including the steps of (A) generating an output signal in response to an input signal and a plurality of first control signals and (B) generating the plurality of first control signals in response to the out |
| 7603637 |
Secure, stable on chip silicon identification |
October 13, 2009 |
| A circuit for providing a bit string, the circuit including a plurality of commonly wired, substantially identical bit cells in a string, where each bit cell is designed to read as only one of a logical high and a logical low upon a given input, and each bit cell comprises a bit in the b |
| 7603513 |
ROM-based multiple match circuit |
October 13, 2009 |
| A ROM-based multiple match system and method for producing a match signal in an addressable memory system are described. In various embodiments of the present invention, a ROM is used to generate single match and multiple match signals, as well as encoded address signals indicating a |
| 7602849 |
Adaptive reference picture selection based on inter-picture motion measurement |
October 13, 2009 |
| An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a control signal in response to a measurement of inter-picture motion between a current picture and a first reference picture. The second circuit may be configured to select the |
| 7602567 |
Feed-forward DC restoration in a perpendicular magnetic read channel |
October 13, 2009 |
| A method of feed-forward DC restoration in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating a feed-forward signal by performing a first detection on an input signal, wherein a DC component of the input signal was previously |
| 7600177 |
Delta syndrome based iterative Reed-Solomon product code decoder |
October 6, 2009 |
| A method for generating syndromes for a data block is disclosed. The method generally includes the steps of (A) calculating a plurality of row syndromes and a plurality of column syndromes for the data block arranged as a Reed-Solomon product code, (B) storing only the row syndromes and |
| 7599501 |
Single bit per-voice dry/wet reverb control |
October 6, 2009 |
| A dry/wet bit for controlling dry and wet components of an output sound during processing of an input sound is provided. The bit is configurable by a program to indicate when to reverse the dry and wet components of the output sound. When the bit has a first value, the dry component is |
| 7599392 |
Devices and methods for matching link speeds between controllers and controlled devices |
October 6, 2009 |
| A controller system for detecting and matching link speeds. The present invention provides for a controller system. The controller system is a first controller and a first port. The first port is located in the first controller and has a first link speed. The first controller is adapted |
| 7599008 |
Method and/or apparatus for cross-color and cross-luminance suppression using shimmer detection |
October 6, 2009 |
| An apparatus comprising one or more delay circuits, a shimmer detector circuit, an averaging circuit, and a multiplexer. The delay circuits may be configured to have a delay of one or more frame periods based on the format of the input video signal. The shimmer detector circuit may be |
| 7596685 |
Apparatus and method for building, storing, uploading, relocating and executing DOS based softwa |
September 29, 2009 |
| The present invention provides a method of packaging, storing, uploading, and executing a DOS based software module capable for being utilized as applications of a PCI device. The present invention may deliver both a binary image and a DOS executable of an application provided by the PCI |
| 7596639 |
Skip mask table automated context generation |
September 29, 2009 |
| Skip logic is provided in a storage controller that informs a direct memory access (DMA) context list manager of consecutive ones and zeroes in a skip mask table. The DMA context list manager then manages data counters and location pointers based on the number of consecutive ones and |
| 7596483 |
Determining timing of integrated circuits |
September 29, 2009 |
| The present invention is directed to determining the timing for a synchronous integrated circuit, the circuit including a multiplicity of clocked elements interconnected by signal paths. Predictions are formed for timing delays in said signal paths in the integrated circuit. A first |
| 7596239 |
Method and/or apparatus for video watermarking and steganography using simulated film grain |
September 29, 2009 |
| An apparatus comprising a first circuit, a second circuit, and a watermark detection circuit. The first circuit may be configured to generate a bitstream, wherein the bitstream comprises a watermark message which represents hidden information. The second circuit may be configured to |
| 7595743 |
System and method for reducing storage requirements for content adaptive binary arithmetic codin |
September 29, 2009 |
| A system for reducing storage requirements for content-adaptive binary arithmetic coding (CABAC) is provided. The system includes a transcode engine performing CABAC on a video data stream. The transcode engine receives save data, stops CABAC, and converts the video data stream into |
| 7594201 |
Enhanced method of optimizing multiplex structures and multiplex control structures in RTL code |
September 22, 2009 |
| A method and computer program are disclosed for optimizing RTL code for an integrated circuit design that include steps of method of optimizing register transfer level code for an integrated circuit design comprising steps of receiving as input a first register transfer level code for th |
| 7593465 |
Method for video coding artifacts concealment |
September 22, 2009 |
| A method and circuit for processing a reconstructed picture generated from compressed data is disclosed. The method generally includes the steps of (A) estimating a magnitude of coding artifacts created by a coding process for the compressed data based upon the compressed data, (B) g |
| 7590957 |
Method and apparatus for fixing best case hold time violations in an integrated circuit design |
September 15, 2009 |
| The disclosure is directed to a method and apparatus for fixing hold violations in an integrated circuit design. The method and apparatus trace upstream along a path in the design corresponding to the hold violation, from an end point of the path toward a start point of the path, unt |
| 7590624 |
Process for identifying duplicate values in very large data sets |
September 15, 2009 |
| The present invention is directed to a method of identifying duplicate data elements in large data sets. This involves receiving the data sets. Dividing each data element in the data set into a series of data segments to define data keys. Generating an intermediate value for the each |
| 7589594 |
Variable loop bandwidth phase locked loop |
September 15, 2009 |
| An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal |
| 7587310 |
Sound processor architecture using single port memory unit |
September 8, 2009 |
| A system and method for implementing a sound processor. The sound processor includes a first voice engine, a second voice engine, and at least one single-port memory unit. An operation of the first voice engine and an operation of the second voice engine are time offset, wherein the |
| 7584460 |
Process and apparatus for abstracting IC design files |
September 1, 2009 |
| File paths for a plurality of IC design files in a hardware description language are abstracted by parsing description files, or a directory of description file names, to identify file paths to each of the plurality of design files in a first environment. An index is generated correlatin |
| 7584442 |
Method and apparatus for generating memory models and timing database |
September 1, 2009 |
| A method and apparatus are provided for creating and using a memory timing database. A plurality of characterization memories are defined, which can be mapped to a memory resource. Each characterization memory has different memory parameters. A plurality of variants of tiling each ch |
| 7584437 |
Assuring correct data entry to generate shells for a semiconductor platform |
September 1, 2009 |
| A method, system, and a computer program product to provide correct and complete input into a shell generation tool that provides the infrastructure for design and development of an integrated circuit. Given a definition of a platform, in part a partially manufactured semiconductor p |
| 7584368 |
Apparatus and methods for power management and spin-up in a storage system |
September 1, 2009 |
| Apparatus and methods for controllably spinning up disk drives in a storage system. A storage system includes a first portion of disk drives that support controllable sequencing of disk drive spin-up and a second portion that do not support controllable sequencing of spin-up. Disk dr |
| 7584311 |
Elasticity buffer restarting |
September 1, 2009 |
| An elasticity buffer has a reset input that, when activated, causes the elasticity buffer to temporarily cease operation. When the reset input bit is released, the elasticity buffer may resume operation. During periods when a device on a serial bus may be halted for power saving mode |
