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Intel Corporation Patents
Intel Corporation
Santa Clara, CA
No. of patents:

Patent Number Title Of Patent Date Issued
RE41849 Parallel multi-threaded processing October 19, 2010
A parallel, multi-threaded processor system and technique for arbitrating command requests is described. The system includes a plurality of microengines, a plurality of shared system resources and a global command arbiter. The global command arbiter uses a command request protocol that
RE41736 Wireless apparatus having multiple coordinated tranceivers for multiple wireless communication p September 21, 2010
A wireless device is provided with a first and a second wireless transceivers to transmit and receive signals wirelessly in accordance with a first and a second protocol, respectively. The wireless device is further provided with a first and a second controller manager to control, in
RE41454 Camera having an adaptive gain control July 27, 2010
A system for generating a digital output signal representing a captured image includes a sensor for capturing the image and generating a sensor output signal. A gain control amplifier is coupled to the sensor and receives the sensor output signal. The gain control amplifier has contr
RE41355 Method for placing active circuits beneath active bonding pads May 25, 2010
The present invention provides a bonding pad structure for integrated circuit devices which allows the active circuits to be placed under bonding pads of the device without affecting the performance of the active circuits. The bonding pad structure is composed of at least two metal l
RE41217 Method and apparatus for reducing stress across capacitors used in integrated circuits April 13, 2010
A method, apparatus, and system for controlling the voltage levels across capacitors coupled between a first node and a second node of an integrated circuit so that the voltage levels across these capacitors will not exceed the breakdown voltage limitation of these capacitors. The vo
RE40921 Mechanism for efficiently processing deferred order-dependent memory access transactions in a pi September 22, 2009
A bus agent defers an ordered transaction if the transaction cannot be completed in order. When an ordered transaction is deferred, its visibility for the next ordered transaction is asserted if it can guarantee a sequential order of the ordered transaction and the next ordered trans
RE40694 Apparatus and method for re-encrypting data without unsecured exposure of its non-encrypted form March 31, 2009
A cryptographic device formed as an integrated circuit encapsulated in an integrated circuit package. The cryptographic device decrypts information having a first encrypted format that is input into the cryptographic device producing information in a non-encrypted format. The information
RE40654 Camera having adaptive gain control March 10, 2009
A system for generating a digital output signal representing a captured image includes a sensor for capturing the image and generating a sensor output signal. A gain control amplifier is coupled to the sensor and receives the sensor output signal. The gain control amplifier has contr
RE40567 Flash memory device of capable of sensing a threshold voltage of memory cells on a page mode of November 11, 2008
A method for determining data stored by a memory cell. The memory cell has a select gate coupled to a wordline, a first electrode coupled to a bitline, and a second electrode coupled to a conductor. The method comprises: floating the bitline; applying a first voltage to the wordline;
RE40056 Methods of controlling communication parameters of wireless systems February 12, 2008
The present invention provides a method for controlling a communication parameter in a channel through which data is transmitted between a transmit unit with M transmit antennas and a receive unit with N receive antennas by selecting from among proposed mapping schemes an applied map
RE39955 Multiple encoder output buffer apparatus for differential coding of video information December 25, 2007
Feedback is introduced between a video CODEC and the intended communications channel such that the characteristics of the channel are used to drive multiple video output buffers. These multiple output buffers share an original temporal video reference, but have different subsequent t
RE39855 Power management strategy to support hot swapping of system blades during run time September 25, 2007
A hot swappable system is described. It included software controlled hot swapping operations which provided a graceful booting or power-down of the system. In the even of force insertion or extraction of the system blades, a set of hardware features (such as using different pin lengths
RE39837 Method and apparatus for adjusting a power consumption level based on the amount of time a proce September 11, 2007
A power management mechanism for use in a computer system having a bus, a memory for storing data and instructions, and a central processing unit (CPU). The CPU runs an operating system having a power management virtual device driver (PMV.times.D) responsible for performing idle detectio
RE39540 Cellular telephony searcher April 3, 2007
A searcher for a mobile station of a cellular telephony network. Pilot signal from nearby base stations are correlated with a pseudonoise sequence inside a search window, using a bank of correlators. Each correlator is assigned a different delay, from among a sequence of delays in th
RE39284 Method and apparatus for reducing power consumption in a system using power management software September 12, 2006
A power management mechanism for use in a computer system having a bus, a memory for storing data and instructions, and a central processing unit (CPU). The CPU runs an operating system having a power management virtual device driver (PMV.times.D) responsible for performing idle detectio
RE39252 Instruction dependent clock scheme August 29, 2006
A method and apparatus including a first circuit configured to receive multiple instructions including a first instruction having a first execution time, and to generate a first signal having a state dependent on the first execution time; a second circuit configured to receive the fi
RE39214 Blending text and graphics for display August 1, 2006
Text and graphics elements may be alpha blended in a way to reduce flicker when the text or graphics are display by a processor-based television receiver. The alpha values are used to intelligently smooth pixels adjacent the element to create television text and graphics.
RE39058 Preventing processor domination during background data transfer in multipoint conferencing April 4, 2006
Preventing processor domination of a CPU by background transfers of teleconference object data during an electronic conference is accomplished by monitoring an external time spent by a CPU executing outside a background transfer manager. Transfers of data packets of teleconference ob
RE38927 System management memory for system management interrupt handler independent of BIOS and operati December 27, 2005
A memory controller with an integrated system management memory region is disclosed. The memory controller receives an SMI acknowledge signal from a processor. The processor then delivers a system management memory address to the memory controller. Instead of fetching SMI handler instruc
RE38674 Process for forming a thin oxide layer December 21, 2004
A novel process for forming a robust, sub-100 .ANG. oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen during temperature ramp and stabilization. First, a dry oxidation is performed in oxygen
RE38457 Deferred sychronization of distributed objects March 9, 2004
A method and apparatus is disclosed for .Iaddend.communication between agents.Iadd., such as those an electronic conferencing system. In .[.an electronic conferencing.]. .Iadd.a .Iaddend.system wherein data is shared between a plurality of .[.participants during an
RE38388 Method and apparatus for performing deferred transactions January 13, 2004
A method and apparatus of performing bus transactions on the bus of the computer system. The present invention includes a method and apparatus for permitting out-of-order replies in a pipelined bus system. The out-of-order responses include the sending of tokens between both the requ
RE38371 DC-to-DC controller having a multi-phase synchronous buck regulator December 30, 2003
A DC-to-DC regulator that includes a multi-phase synchronous buck regulator having a pulse width modulator to generate a plurality of switching signals, a plurality of drivers, each coupled to receive one of the switching signals, and a plurality of switching voltage converters, each
RE37476 Alpha blending palettized image data December 18, 2001
Palettized image data for two or more images, represented by color lookup table (CLUT) indices, are mapped to an index space. Blended pixels are generated from the pixels in the index space using alpha blending. The blended pixels are mapped back to CLUT indices to generate palettized
RE36766 Microprocessor breakpoint apparatus July 4, 2000
A breakpoint apparatus incorporated in a single chip microprocessor. The apparatus permits breakpoints on specific references to either program instructions or data. The width of the breakpoint address can be varied, the apparatus includes a logic circuit for determining if the reference
RE36191 Configuration data loopback in a bus bridge circuit April 20, 1999
A method and apparatus for reducing cost and complexity of devices in a bus bridge circuit by dividing address and data paths between separate devices to reduce pin count, and by looping back "bridged" configuration data to access configuration registers. The host bridge circuit "bridges
RE36182 Apparatus and method for switching ethernet media type April 6, 1999
A computer system having two ports for connecting the computer system to a computer network by means of different transmission media types. Electronic switching is implemented to select between these two ports. The electronic switching is controlled by software. Depending upon which of
RE35353 Process for manufacturing a multi-layer lead frame October 22, 1996
A process for manufacturing a multi-layer lead frame for a semiconductor device comprises two metal plains being adhered to each other via an insulation piece. An insulation strip is punched to cut the insulation piece, which is preliminary adhered to a metal strip. The metal strip is
RE33629 Numeric data processor July 2, 1991
A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words or BCD data upon which it must operate. As a result the circuit h
D691995 Electronic computer with partially transparent input device October 22, 2013
D534545 Media device January 2, 2007
D534184 Media device December 26, 2006
D534183 Media device December 26, 2006
D534182 Media device December 26, 2006
D515557 Remote control February 21, 2006
D503710 Keyboard April 5, 2005
D502465 Communications module March 1, 2005
D495327 Processor-based system August 31, 2004
D482025 Communications module November 11, 2003
D481372 Portable MP3 music player October 28, 2003
D474782 Icon for a computer screen May 20, 2003
D473220 Digital subscriber line gateway April 15, 2003
D472581 Small footprint kiosk April 1, 2003
D471578 Digital camera stand March 11, 2003
D469776 Communications module February 4, 2003
D464941 MP3 audio player October 29, 2002
D462955 Wireless processor-based system September 17, 2002
D462079 Microscope slide clip August 27, 2002
D462075 Server face plate August 27, 2002
D461822 Icon for a computer screen August 20, 2002

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