| Patent Number |
Title Of Patent |
Date Issued |
| 5444301 |
Semiconductor package and method for manufacturing the same |
August 22, 1995 |
| A plastic semiconductor package and a method for producing the same. The package comprises a plurality of chip signal transmitting leads protruded from a semiconductor chip and functioning as electrical passage, a plurality of polyimide tapes each attached to the corresponding lead and |
| 5444006 |
Method of manufacturing a capacitor in a semiconductor memory device |
August 22, 1995 |
| A method of manufacturing a capacitor in a semiconductor device such as a semiconductor memory is disclosed in which a tantalum layer is oxidized to form a tantalum oxide layer. A preferred embodiment of the disclosed method includes the steps of depositing doped polysilicon on a sem |
| 5442209 |
Synapse MOS transistor |
August 15, 1995 |
| A synapse MOS transistor has gate electrodes of different lengths, different widths or different lengths and widths, between one source region and one drain region. Thus, when using the synapse MOS transistor to implement a neural network, the chip area can be greatly reduced. |
| 5436577 |
CMOS tri-state buffer circuit and operation method thereof |
July 25, 1995 |
| A 3-state buffer circuit applicable for a CMOS output drive circuit is disclosed. The output circuit provides reduced ground noise and delay time of an output signal by decreasing a counter-electromotive force generated upon turning ON of the output transistor. The circuit includes a |
| 5434820 |
Back bias voltage generator circuit of a semiconductor memory device |
July 18, 1995 |
| A Vbb generator having several distributed Vbb generators, which are located respectively adjacent to memory array blocks is disclosed. The distributed Vbb generator is activated during the time when a memory block located adjacent the Vbb generator is accessed for write/read operations. |
| 5432102 |
Method of making thin film transistor with channel and drain adjacent sidewall of gate electrode |
July 11, 1995 |
| A thin film transistor and a method which forms a channel region (c), a lightly doped drain region (LDD) region and, optionally, an offset region (o), in a portion of a semiconductor layer which is adjacent a sidewall of the gate electrode without the use of photo masks, thereby increasi |
| 5428298 |
Probe structure for testing a semiconductor chip and a press member for same |
June 27, 1995 |
| A tester applicable to semiconduction chips having a plurality of pins. The tester comprises a TAB tape having an adhesive surface and a plurality of connecting wires attached to the adhesive surface of the TAB tape and connected to a test card. At a probe region of the tester, probe tip |
| 5427982 |
Method for fabricating a semiconductor device |
June 27, 1995 |
| A method for the fabrication of semiconductor device includes the steps of forming a first wiring layer on an insulating film overlaying a semiconductor substrate, depositing an interlayer insulating film entirely on the first wiring layer, etching the interlayer insulating film sele |
| 5427971 |
Method for fabrication of semiconductor elements |
June 27, 1995 |
| This invention relates to a method for fabrication of MOS transistors having LDD(Lightly Doped Drain) structure which comprises the steps of forming a gate insulation film on a semiconductor substrate of a first conduction type, forming a conduction layer for forming a gate pole on the |
| 5426318 |
Horizontal charge coupled device having a multiple reset gate |
June 20, 1995 |
| A horizontal charge coupled device (HCCD) is provided with a multiple reset gate in order to establish a more stable, less noisy voltage in an output node floating diffusion. Charges are transferred from an input of the HCCD to the floating diffusion by multiple, overlapping gate structu |
| 5424514 |
Apparatus for sensing small object in high-frequency induction heating cooker |
June 13, 1995 |
| An apparatus for sensing a small object in a high-frequency induction heating cooker, comprising a rectifying/smoothing circuit for rectifying and smoothing an AC voltage from a power source to convert it into a DC voltage, an inverter for converting the DC voltage into a high frequency |
| 5424234 |
Method of making oxide semiconductor field effect transistor |
June 13, 1995 |
| A method of making a MOSFET wherein a source/drain region is graded into three region portions having different concentrations. The method comprises the steps of forming a gate, an insulating film and a semiconductor film on a semiconductor substrate of a first conductivity type, and |
| 5418177 |
Process for formation of memory cell where capacitor is disposed below a transistor |
May 23, 1995 |
| A semiconductor memory cell and a process for formation thereof is disclosed. A capacitor is disposed below a transistor, so that a DRAM cell that may be suitable for a high density semiconductor device is produced. A semiconductor device according to the present invention includes: a |
| 5414519 |
Method for aligning a semiconductor chip to be repaired with a repair system and a laser repair |
May 9, 1995 |
| A method for aligning a semiconductor chip to be repaired with a repair system and a laser repair target used therefor, The laser repair target comprises at least one basic target adapted to be used in focusing, X-alignment and Y-alignment and shaped into a right-angled triangle and at |
| 5409856 |
Process of making a capacitor in a semiconductor memory device |
April 25, 1995 |
| A process of making a capacitor in a semiconductor memory device provides photomasking processes which are reduced as all the stacked-disposable layers and the storage electrode node contact are patterned at the same time, and also an efficient area of the storage electrode node of a |
| 5409855 |
Process for forming a semiconductor device having a capacitor |
April 25, 1995 |
| A method for making a semiconductor memory cell having a storage capacitor disposed between metallization layers. Field and active regions and transistor circuit elements are formed on a substrate, on which is formed an insulating layer. A bit line is formed through a contact formed in t |
| 5402063 |
Momentary test mode enabling circuit |
March 28, 1995 |
| A momentary test mode enabling circuit capable of enabling the test mode using a negative pulse signal below the ground voltage level and of inputting normal operational inputs to the input pin even in the period of test mode, The circuit comprising a level detecting unit for detecting a |
| 5396337 |
Method and apparatus for effecting consecutive program recordings with a VCR using a program end |
March 7, 1995 |
| Method and circuit for recording and detecting a program end signal which enable a new program to be recorded after the end of previously recorded program on a video tape by searching an end portion of the previous program. The circuit includes a consecutive recording switch for selectin |
| 5393373 |
Methods of patterning and manufacturing semiconductor devices |
February 28, 1995 |
| Methods of hyperfine patterning and manufacturing semiconductor devices. Steps in accordance with the present invention include coating a hemisphere particle layer having hills and valleys on a layer to be etched, the hemisphere particle layer having an etch selectivity higher than t |
| 5391936 |
Wide-band sample and hold circuit |
February 21, 1995 |
| A wide-band sample and hold circuit comprising an input buffer for inputting an analog input signal and buffering the inputted analog input signal, 1/2 frequency divider for frequency-dividing a sample and hold clock signal by two and outputting a 1/2 frequency clock signal, first sw |
| 5390137 |
Carry transfer apparatus |
February 14, 1995 |
| A carry transfer apparatus having a plurality of groups is provided. Each of the groups contains an inverter having an input terminal connected to a first signal input terminal, a first NMOS transistor having a gate connected to an output terminal of the inverter and a drain connected to |
| 5389557 |
Process for formation of LDD transistor, and structure thereof |
February 14, 1995 |
| A process for formation of an LDD transistor and a structure thereof are disclosed in which the junction capacitance and the body effect can be properly reduced. In the conventional LDD transistors, the punch-through problem is serious, and the improved conventional LDD transistor also, |
| 5387531 |
Hole capacitor for dram cell and a fabrication method thereof |
February 7, 1995 |
| A method for making a hole capacitor for DRAM cell includes the steps of: depositing a nitride layer and a lower oxide layer, and forming a buried contact hole, after forming a MOS transistor upon a semiconductor substrate. Thereafter depositing an in-situ doped non-crystalline silicon |
| 5378906 |
Dynamic random access memory having improved layout |
January 3, 1995 |
| A dynamic random access memory having an improved layout capable of having a large storage capacity with a small memory cell area as well as preventing the occurrence of short-circuiting by an increase in the process margin, and a method of arranging memory cells of the same. Each ac |
| 5377214 |
Tensile strained blue green II-VI quantum well Laser |
December 27, 1994 |
| There is disclosed a tensile strained blue-green II-VI quantum well laser. The tensile strained blue-green II-VI quantum well laser comprises of a semiconductor substrate; a buffer layer formed on the semiconductor substrate; a first ZnSe cladding layer formed on the buffer layer; a |
| 5374584 |
Method for isolating elements in a semiconductor chip |
December 20, 1994 |
| A method for isolating elements in a silicon semiconductor device is disclosed. The invention discloses the steps of: (1) forming a thermal silicon oxide layer on a silicon substrate, depositing a layer of polysilicon, and depositing a first silicon nitride layer thereon, (2) pattern |
| 5373737 |
Sensor device for mass flow controller |
December 20, 1994 |
| A sensor device for a mass flow controller suitable for stably sensing gas flowrate of the mass flow controller regardless of variation of peripheral temperature. This sensor device comprises a case being covered with a thermal insulation plate, a sensor tube being arranged in the in-sui |
| 5367488 |
DRAM having bidirectional global bit lines |
November 22, 1994 |
| A DRAM having bidirectional global bit lines is defined such that local bit lines connected to corresponding memory cells and separative global bit lines connected to the local bit lines are commonly connected to local bit lines so as to read data stored in the cells or write data to the |
| 5366368 |
Multi-plunger manual transfer mold die |
November 22, 1994 |
| A preheaterless manual transfer mold die for encapsulating semiconductor elements in a process for packaging semiconductors. The preheaterless manual transfer mold die includes a multi-plunger assembly adapted for upward and downward movement to press the resin. A tablet loader is in |
| 5365404 |
Jack-type semiconductor integrated circuit packages |
November 15, 1994 |
| A jack-type semiconductor integrated circuit package with a jack-type connector instead of conventional leads. This package comprises a semiconductor chip which is provided with a plurality of bond pads, a jack housing which is adapted to electrically connect the package to a printed |
| 5364807 |
Method for fabricating LDD transitor utilizing halo implant |
November 15, 1994 |
| A method for fabricating an asymmetry HS-GOLD MOSFET by use of a photo etch process in place of a large tilt implantation process, capable of improving a packing density and reducing a junction capacitance of a source region, thereby improving a characteristic of a device to be final |
| 5363406 |
Pulse width modulation apparatus |
November 8, 1994 |
| A pulse width modulation apparatus having a storage circuit for temporarily storing pulse width data inputted over a data bus and then inverting it, the pulse width data determining a pulse width, a counting circuit for counting a clock signal in response to an external pulse width modul |
| 5355338 |
Redundancy circuit for semiconductor memory device |
October 11, 1994 |
| A memory redundancy circuit using FLOTOX transistors instead of conventional link fuses and thus capable of redundancy programming even after the packaging of the chip. The redundancy circuit is capable of generating spare signals in order to use spare memory cells for particular add |
| 5352852 |
Charge coupled device package with glass lid |
October 4, 1994 |
| A charge coupled device package with a glass lid is provided. The package includes a charge coupled device having a plurality of conductive bumps on its bond pads, an insulating tape bonded to the inside of the conductive bumps on the charge coupled device, a plurality of metal lines eac |
| 5351217 |
Word line voltage supply circuit |
September 27, 1994 |
| A word line supply circuit reducing the capacitance operating as a load at a time of enabling a word line in a semiconductor memory, resulting in the internal voltage supply being more stable. A word line voltage supply circuit is provided for directly driving the word line by the intern |
| 5349216 |
Charge coupled device image sensor |
September 20, 1994 |
| A CCD image sensor comprising: a semiconductor substrate of a first conductivity type connected to a ground; an impurity region of a second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type, to serve as a blooming prevention layer; an |
| 5346845 |
Process for forming a trench capacitor memory cell |
September 13, 1994 |
| A trench capacitor memory cell having a semiconductor substrate, an active region having a transistor on a portion of the semiconductor substrate, a field region formed by removing portion of the semiconductor substrate except for portions of the active region to a certain depth below th |
| 5346302 |
Apparatus for mixing liquids in a certain ratio |
September 13, 1994 |
| An apparatus for mixing a deionized water and a hydrofluoric acid precisely in the ratio of 100:1, so as to produce a mixture which are properly used in etching wafters. The mixing apparatus comprises a self-lubricating plastic container of a double construction which enables to obtain a |
| 5342800 |
Method of making memory cell capacitor |
August 30, 1994 |
| A method for making a memory cell capacitor is disclosed. Steps in accordance with present invention are: (1) forming a capacitor node contact hole after making necessary elements in a semiconductor substrate by depositing an insulation layer and etching a predetermined portion of th |
| 5334873 |
Semiconductor packages with centrally located electrode pads |
August 2, 1994 |
| A semiconductor package and a method for manufacturing such a package in which a desired thickness of the package is accomplished. The package includes a semiconductor chip provided with a plurality of solders which are formed on pads of the chip, respectively, and a plurality of inner |
| 5330927 |
Method of constructing a reduced size highly integrated static random access memory with double |
July 19, 1994 |
| A static random access memory with a double vertical channel structure capable of providing a highly integrated memory element and a method of the same. On a substrate of a first conductivity type, first and second layers of the same conductivity type are formed, in order. On respective |
| 5326998 |
Semiconductor memory cell and manufacturing method thereof |
July 5, 1994 |
| A semiconductor memory cell and device having a tubular formed storage electrode of a capacitor through which a bit line passes. The source, gate and drain of a switching transistor are arranged in a direction parallel to a longitudinal axis of the tubular storage electrode. An active re |
| 5322749 |
Phase shift mask and method of making the same |
June 21, 1994 |
| A phase shift mask comprising a light-transmitting substrate, a plurality of uniformly spaced phase shift regions formed over the light-transmitting substrate, and a plurality of light shield regions formed over the light-transmitting substrate, each of the light shield regions being |
| 5317502 |
High resolution system for sensing spatial coordinates |
May 31, 1994 |
| An improved high resolution method and apparatus are described for sensing and determining the spatial coordinates of a movable object with respect to a energized conductive surface. The coordinates of the object are precisely measured with respect to a two-dimensional coordinate system |
| 5314298 |
Automatic lead frame feeding device for a TO-220 semiconductor manufacturing apparatus |
May 24, 1994 |
| This invention relates to an automatic lead frame feeding device for a TO-220 semiconductor manufacturing apparatus, which automatically feeds lead frames to die bonding and wire bonding processes for manufacturing TO-220 semiconductor packages, and has an object to provide an automatic |
| 5313520 |
Method and device for protecting data of ROM |
May 17, 1994 |
| A method and a device are provided for protecting data stored in a ROM of a micoprogram control unit. Such data may take the form of a user program. To protect the data, predetermined code data is written into a predetermined address in the ROM. A code address inputted from outside the |
| 5313080 |
Structure of a CCD image sensor particularly on an interline transfer method |
May 17, 1994 |
| A p type well is formed on an n type substrate and photodiode and VCCD regions are repeatedly at predetermined intervals in turns on the surface of the p type well.In an interline transfer image sensor, the p type well is formed on the n type substrate and the photodiode and VCCD region |
| 5307977 |
Multi heater block of wire bonder |
May 3, 1994 |
| A multi heater block of a wire bonder including a multi heater block of such a wire bonder in which one heater may be used in various kinds of packages having different paddle size. The multi heater block of a wire bonder includes a paddle support formed on the upper surface of a heater |
| 5307382 |
Lock apparatus for dual phase locked loop |
April 26, 1994 |
| Lock apparatus for a dual PLL which is capable of detecting a locked state of a receiving frequency as well as a locked state of a transmitting frequency. The dual PLL lock apparatus comprises a receive lock detector for detecting the phase locked state of the receiving frequency in |
| 5305270 |
Initial setup circuit for charging cell plate |
April 19, 1994 |
| A circuit and method for charging the plate electrodes of a plurality of memory cells. The plate electrodes are initially charged by a voltage generator having a large current driving capacity. After the plate electrodes have reached a predetermined threshold voltage, the large-capac |
