| Patent Number |
Title Of Patent |
Date Issued |
| 6610998 |
Method and structure for crystallizing a film |
August 26, 2003 |
| A method and structure for crystallizing film is disclosed. The method includes the steps of forming a film on a substrate, forming a lens on the film to focus an electromagnetic wave on the film and directing the electromagnetic wave on the film inclusive of the lens to crystallize the |
| 6130120 |
Method and structure for crystallizing a film |
October 10, 2000 |
| A method and structure for crystallizing film is disclosed. The method includes the steps of forming a film on a substrate, forming a lens on the film to focus an electro-magnetic wave on the film and directing the electro-magnetic wave on the film inclusive of the lens to crystallize th |
| 5904530 |
Method of making LDD structure spaced from channel doped region |
May 18, 1999 |
| A MOSFET and method of manufacture thereof is disclosed in which an ion implantation layer formed in the channel region is isolated from the source and drain regions. The source and drain regions are of a lightly doped drain or "LDD" structure. According to this MOSFET and method, short |
| 5904515 |
Method for fabricating a thin film transistor with the source, drain and channel in a groove in |
May 18, 1999 |
| A structure and fabrication method for a thin film transistor suitable for a SRAM memory cell. The thin film transistor structure includes a gate electrode formed to have a groove, a gate insulation film formed on the gate electrode, a semiconductor layer formed in the groove of the gate |
| 5878247 |
Automatic data backup apparatus for microcomputer |
March 2, 1999 |
| An improved automatic data backup apparatus for a microcomputer capable of automatically backing up a user's program at a central processing unit(CPU), which includes a central processing unit(CPU) for performing a user program and a monitor program outputted from a first emulator in |
| 5856212 |
Method of producing semiconductor package having solder balls |
January 5, 1999 |
| A semiconductor package with solder balls and a method for producing the package are disclosed. The package has no outer lead but is provided with the solder balls formed on the mold resin body, thus to allow a plurality of packages to be easily vertically layered when enlarging the memo |
| 5843812 |
Method of making a PMOSFET in a semiconductor device |
December 1, 1998 |
| An improved p+ polysilicon gated PMOSFET having a channel on the surface of a silicon substrate and improved short channel behavior is disclosed. A simplified process allows making a p+ doped gate and source/drain regions at the same time, the transistor particularly having a stable thre |
| 5841653 |
High resolution system for sensing spatial coordinates |
November 24, 1998 |
| An improved high resolution method and apparatus are described for sensing and determining the spatial coordinates of a movable object with respect to a energized conductive surface. The coordinates of the object are precisely measured with respect to a two-dimensional coordinate system |
| 5834816 |
MOSFET having tapered gate electrode |
November 10, 1998 |
| A MOSFET comprising a gate oxide layer on a silicon substrate, a polysilicon gate formed on the gate oxide layer, the length of which gradually widens going from bottom to top, a side gate oxide layer formed by an oxidation process surrounding the polysilicon gate, the side gate oxid |
| 5757025 |
Infrared photodetector using delta-doped semiconductors |
May 26, 1998 |
| An infrared photodetector using .delta.-doped semiconductors capable of reducing the requirement to form a quantum well structure of high quality, reducing the need of a cooling device due to the operation at the room temperature, and controlling the wavelength of infrared ray detected b |
| 5745655 |
Chaotic neural circuit and chaotic neural network using the same |
April 28, 1998 |
| A mapping circuit includes a linear circuit for outputting a signal which is linearly changed with respect to its input, a non-linear circuit for outputting a signal which is non-linearly changed with respect to its input, and an adder for summing the output signals of the linear and |
| 5728604 |
Method for making thin film transistors |
March 17, 1998 |
| A method for making semiconductor thin film transistors (TFTs) having a bottom gate such that the gate electrode is formed in a furrow of an insulating layer, with a gate oxide and body polysilicon formed thereon, thereby allowing the source and drain level to be in a smooth plane pa |
| 5728491 |
Phase shift mask and method of manufacture |
March 17, 1998 |
| A phase shift mask and method of manufacture are disclosed in which a light shielding layer is formed on a substrate and patterned to produce parallel areas of predetermined intervals and spacings of the desired shape. A phase shift film is formed on the substrate and light shielding lay |
| 5726928 |
Arithmetic logic unit circuit with reduced propagation delays |
March 10, 1998 |
| An improved arithmetic logic operation circuit capable of advantageously reducing propagation delay due to a logic gate for obtaining a high speed arithmetic logic unit by minimizing the number of logic gates, which includes an even bit arithmetic logic unit cell for logically operating |
| 5723879 |
Thin film transistor with vertical channel adjacent sidewall of gate electrode and method of mak |
March 3, 1998 |
| A thin film transistor and a method which forms a channel region (c), a lightly doped drain region (LDD) region and, optionally, an offset region (o), in a portion of a semiconductor layer which is adjacent a sidewall of the gate electrode without the use of photo masks, thereby increasi |
| 5703505 |
Signal reception apparatus having automatic level selection function |
December 30, 1997 |
| A signal reception apparatus has an automatic level selection function. A comparing circuit compares a level of an input signal with a plurality of sensing levels and outputs a plurality of sensing signals in accordance with the compared result. An auto select level controller receives t |
| 5699114 |
CCD apparatus for preventing a smear phenomenon |
December 16, 1997 |
| A CCD for detecting images includes a substrate, a well region formed on the semiconductor substrate, a horizontal CCD (HCCD) formed in the well region, a photodiode region formed in the well region at a prescribed spacing from the HCCD, a channel stop layer, an impurity diffusion layer |
| 5698375 |
Process for formation of capacitor electrode for semiconductor device |
December 16, 1997 |
| The invention discloses a process for formation of a capacitor for a semiconductor device. The upper node electrode is supported by side wall spacers and a central pole, so that the supporting strength may be reinforced and the surface area may be increased. During the formation of a |
| 5686343 |
Process for isolating a semiconductor layer on an insulator |
November 11, 1997 |
| A process for the isolation of a semiconductor layer on an insulator. A process for isolating a semiconductor layer on an insulator is disclosed that includes the steps of: forming a first insulating layer on a semiconductor substrate, and opening a window by etching the first insula |
| 5681760 |
Method for manufacturing thin film transistor |
October 28, 1997 |
| A method for manufacturing a thin film transistor is disclosed. To solve the problems of leakage current generated at the grain boundary which passes through a source and a drain and the difficulty in obtaining stable device characteristic owing to the change of the lengths of the channe |
| 5658695 |
Method for fabricating phase shift mask comprising the use of a second photoshield layer as a si |
August 19, 1997 |
| A method is provided for fabricating a phase shift mask of the out rigger sub-resolution type capable of accurately fabricating an ultra-fine semiconductor circuit. The method includes the steps of depositing a first photoshield metal layer and a first phase shift material layer over a |
| 5650957 |
Semiconductor memory cell and process for formation thereof |
July 22, 1997 |
| A semiconductor memory cell and a process for formation thereof is disclosed. A capacitor is disposed below a transistor, so that a DRAM cell that may be suitable for a high density semiconductor device is produced. A semiconductor device according to the present invention includes: a |
| 5646902 |
Static random access memory device with low power dissipation |
July 8, 1997 |
| A static random access memory device having a power-down timer for generating a power-down signal in response to a plurality of address transition detecting signals and data input detecting signals, a chip selection detecting signal and a write mode detecting signal, is disclosed. Th |
| 5644169 |
Mold and method for manufacturing a package for a semiconductor chip and the package manufacture |
July 1, 1997 |
| A mold and a method for manufacturing a semiconductor package and the semiconductor package manufactured thereby.The semiconductor package includes a chip attached to a paddle of a lead frame. And with electrically connecting the chip and inner leads of lead frame with a metal wire, a se |
| 5643829 |
Method for the fabrication of multilayer electroluminescence device |
July 1, 1997 |
| There is provided a method for the fabrication of multilayer electroluminescence device, comprising the steps of: forming a lower electrode with a predetermined pattern on a substrate: forming a first insulation layer on the lower electrode atop the substrate; forming a multiply lumi |
| 5643812 |
Method of making EEPROM flash memory cell with erase gate |
July 1, 1997 |
| An EEPROM flash memory cell and a process for formation thereof are disclosed. The EEPROM flash memory cell includes: a source; a drain; a gate insulating layer disposed upon a channel between the source and the drain; a floating gate electrode disposed upon the gate insulating layer |
| 5640172 |
On-screen display circuit |
June 17, 1997 |
| An on-screen display circuit comprising a moving clock generator for generating a moving clock signal and a character moving clock signal in response to a vertical synchronous signal, the moving clock signal varying a horizontal display position value, the character moving clock signal |
| 5637891 |
Charge coupled device having different insulators |
June 10, 1997 |
| A charged coupled device structure (CCD) and a method for fabricating the CCD structure, which induces a maximum potential distribution difference by utilizing gate insulation films having different physical properties. The charged coupled device includes a semiconductor substrate, a fir |
| 5629540 |
Semiconductor device having overlapped storage electrodes |
May 13, 1997 |
| The capacitor area is increased with a cylinder-shaped first storage electrode overlapped with a second electrode in an area which covers two adjacent cells. Included in a semiconductor device using the invention may be: a semiconductor substrate; a word line on the substrate; impurity |
| 5625585 |
Bit line structure with bit line pass over configuration |
April 29, 1997 |
| A bit line structure is disclosed. Which includes: sense amplifiers each connected to two pairs of bit lines BL and /BL through bit line selecting switches, to the bit line a plurality of cells are connected, includes: a first bit line pair BL and /BL and a second bit line pair BL and /B |
| 5623264 |
Video digital/analog signal converter |
April 22, 1997 |
| A video digital/analog signal converter having a structure whereby the analog elements of the video D/A converter are separated from the digital elements of the video D/A converter and of arranging current cells of each of channels to one well. The present invention includes a Red-decode |
| 5622873 |
Process for manufacturing a resin molded image pick-up semiconductor chip having a window |
April 22, 1997 |
| A process for packaging a solid type image pick-up device and a device produced by the packaging process. The process includes the steps of: forming a protecting layer on a light receiving region of an image pick-up chip formed on a semiconductor wafer; separating the image pick-up chip |
| 5619336 |
Recording apparatus and method for video cassette recorder having snow noise removing function |
April 8, 1997 |
| Recording apparatus and method for a video cassette recorder having a snow noise removing function. The recording apparatus comprises a tuner for tuning a television broadcasting signal received through an antenna to a channel desired by the user, a signal processor for separating a vert |
| 5619065 |
Semiconductor package and method for assembling the same |
April 8, 1997 |
| A semiconductor package including a semiconductor chip having at its upper surface a plurality of bonding pads and a tape lead frame having a paddle on which a semiconductor chip is laid, a plurality of inner leads each having a sufficient length to be directly connected with each co |
| 5613042 |
Chaotic recurrent neural network and learning method therefor |
March 18, 1997 |
| A chaotic recurrent neural network includes N chaotic neural networks for receiving an external input and the outputs of N-1 chaotic neural networks among said N chaotic neural networks and performing an operation according to the following dynamic equation ##EQU1## wherein W.sub |
| 5606290 |
Phase locked loop circuit having lock holder |
February 25, 1997 |
| A phase locked loop circuit comprising a reference counter, a programmable counter, a phase detector and a lock detector. The phase locked circuit further comprises a lock enable unit for controlling a voltage pump under control of the phase detector, a channel selector for selecting a d |
| 5605612 |
Gas sensor and manufacturing method of the same |
February 25, 1997 |
| A thin-film gas sensor and manufacturing method of the same is disclosed which includes a silicon substrate; an insulating layer formed on the surface of the silicon substrate; a heater formed in zigzag on the surface of said insulating layer; a temperature sensor formed in zigzag on the |
| 5604138 |
Process for making a semiconductor MOS transistor |
February 18, 1997 |
| A process for forming an MOS semiconductor device having an LDD structure is disclosed, which may include the steps of: forming a first insulating layer on a semiconductor substrate; forming a conductive layer on the first insulating layer; forming a second insulating layer on the co |
| 5602506 |
Back bias voltage generator |
February 11, 1997 |
| A back bias voltage generator comprising a power-on signal generator for generating a power-on signal when an external voltage remains at a constant level, a reference voltage generator for generating a reference voltage in response to the power-on signal from the power-on signal gen |
| 5600523 |
Earth leakage breaker |
February 4, 1997 |
| An earth leakage breaker comprising a zero-phase-sequence current transformer for detecting a current difference on an AC line with respect to both positive (+) and negative (-) directions to sense an electric leakage of the AC line, a comparator for comparing an output voltage from |
| 5587331 |
Method of forming a contact hole for a metal line in a semiconductor device |
December 24, 1996 |
| A method for forming a contact hole for a metal line in a semiconductor device, including the steps of forming a contact area on a semiconductor substrate to be connected to a metal line, forming a groove, of which side is insulated from a contact portion on a bottom and at a side of the |
| 5583064 |
Semiconductor device and process for formation thereof |
December 10, 1996 |
| A recess is formed (dug) into the surface of a substrate to form a gate channel in the recess, so that a monocrystalline source/drain region can be formed at a level higher than that of the channel. The process includes the steps of: (a) forming an insulating layer and an oxidation preve |
| 5579315 |
Heartbeat collision prevention circuit and method |
November 26, 1996 |
| Heartbeat collision prevention circuit and method in a network in which a plurality of stations are connected to data and heartbeat lines. The heartbeat collision prevention circuit comprises a first delay element for delaying a clock signal, an OR gate for ORing an output signal from th |
| 5572117 |
Multi-meter |
November 5, 1996 |
| A multi-meter comprising a switch for selecting an object and a range of a thing to be measured, a display unit for displaying a value measured according to the object and the range selected by the switch, a measurement circuit including a Z-state measurement unit to measure a Z-stat |
| 5568146 |
Digital/analog converter |
October 22, 1996 |
| A digital/analog converter comprising a coarse bit decoder for decoding M higher-order bits of an (M+N)-bit input digital signal, a fine bit decoder for decoding N lower-order bits of the (M+N)-bit input digital signal, a current scaler for classifying currents into a plurality of steps |
| 5567656 |
Process for packaging semiconductor device |
October 22, 1996 |
| The process of the present invention is simplified by skipping the die bonding step, the wire bonding step and the trim-forming step of the conventional techniques. A semiconductor device may include: a plurality of bonding pads formed on the surface of the chip for connecting the in |
| 5567244 |
Process for cleaning semiconductor devices |
October 22, 1996 |
| The present invention provides a process for cleaning semiconductor devices which enables the contamination of copper to maintained under a level of about 10.sup.9 atoms/cm.sup.2 to meet the qualification of DRAMs of equal to or greater than 64M bits in capacity by means of supplying O.s |
| 5563439 |
Variable operation speed MOS transistor |
October 8, 1996 |
| A variable operation speed MOS transistor having a source, a drain and a gate with a plurality of contacts formed thereon. One end of the gate of the variable operation speed MOS transistor is connected to drains/sources of first MOS transistors, while the plurality of the contacts forme |
| 5563091 |
Method for isolating semiconductor elements |
October 8, 1996 |
| A method for isolating semiconductor regions so that unit elements may be electrically insulated. A disclosed method includes the steps of: forming a pad oxide layer and a nitride layer on a silicon substrate, and forming an active region pattern; exposing the pad oxide to HF to remove a |
| 5559372 |
Thin soldered semiconductor package |
September 24, 1996 |
| A semiconductor package directly soldering the chip pad to the inner leads and a method for producing the package are disclosed. The chip pad is placed on the bottom surface of an inner lead extending from opposed sides of the chip pad. A plurality of inner lead holes are formed in the |
