| Patent Number |
Title Of Patent |
Date Issued |
| 7217602 |
Semiconductor device employing SOI substrate and method of manufacturing the same |
May 15, 2007 |
| A semiconductor device employing a PD-SOI substrate and a method of manufacturing the same are capable of minimizing a floating body effect. The semiconductor device employs a silicon layer over a buried insulating layer on a silicon wafer, isolating layers in the silicon layer in co |
| 7214586 |
Methods of fabricating nonvolatile memory device |
May 8, 2007 |
| A method of fabricating nonvolatile memory devices. The method includes forming a tunnel oxide layer, a stacked oxide layer, a polysilicon layer for a control gate, a buffer oxide layer and a buffer nitride layer in order on the entire surface of a semiconductor substrate, and patterning |
| 7214581 |
Method of fabricating flash memory device |
May 8, 2007 |
| The present invention provides a method of fabricating a flash memory device, in which floating gates in neighbor cells are separated from each other without using photolithography, which enhances electrical characteristics of the device, and which facilitates a cell size reduction. |
| 7214560 |
CMOS image sensor and method for fabricating the same |
May 8, 2007 |
| A CMOS image sensor and a method for fabricating the same is disclosed, to improve reliability of a driving part transistor and to improve an output voltage of a photodiode, which includes a semiconductor substrate defined as a photodiode transistor region and a driving part transistor r |
| 7211871 |
Transistors of semiconductor devices and methods of fabricating the same |
May 1, 2007 |
| Transistors and methods of fabricating transistors are disclosed. A disclosed method comprises forming an inversion epitaxial layer on a silicon substrate; forming a hard mask on the inversion epitaxial layer; depositing a silicon epitaxial layer over the inversion epitaxial layer; f |
| 7211859 |
Semiconductor device and manufacturing method thereof |
May 1, 2007 |
| A semiconductor device according to a exemplary embodiment of the present invention includes a reverse spacer exposing a part of an epitaxial silicon layer on a silicon substrate, a gate oxide layer on at least the epitaxial silicon layer and a gate polysilicon layer on the gate oxide |
| 7211498 |
Method of manufacturing an isolation layer of a flash memory |
May 1, 2007 |
| A method including forming a first mask material layer on a semiconductor substrate in order to mask a cell region and to not mask a peripheral circuit region. The method further includes forming a second mask material layer on an entire surface of the substrate in the cell region an |
| 7211495 |
Semiconductor devices having a capacitor and methods of manufacturing the same |
May 1, 2007 |
| Semiconductor devices having a capacitor and methods of manufacturing the same are disclosed. A disclosed semiconductor device includes a semiconductor substrate; a lower interconnection line on the substrate; an upper interconnection line electrically connected to a first portion of |
| 7211491 |
Method of fabricating gate electrode of semiconductor device |
May 1, 2007 |
| A method of fabricating a gate electrode of a semiconductor device is disclosed. A disclosed method comprises growing a silicon epitaxial layer on a silicon substrate; making at least one trench through the epitaxial layer and filling the trench with a first oxide layer; etching the firs |
| 7208384 |
Transistors and manufacturing methods thereof |
April 24, 2007 |
| Transistors and manufacturing methods thereof are disclosed. An example transistor includes a semiconductor substrate divided into device isolation regions and a device active region. The example transistor includes a gate insulating film formed in the active region of the semiconduc |
| 7208371 |
Method of fabricating split gate flash memory device |
April 24, 2007 |
| A method of fabricating a split gate flash memory device by which stringer generation is prevented. The method includes forming a dielectric layer on an active area of a semiconductor substrate, forming a first gate covered with a cap layer on the dielectric layer, and forming an ins |
| 7205193 |
Semiconductor device and method for fabricating the same |
April 17, 2007 |
| A semiconductor device and method for fabricating the same. The semiconductor device including a first conductive type semiconductor substrate having an active region and a field region defined thereon, and a trench formed in the field region. The semiconductor device also includes a |
| 7202487 |
Apparatus for ion implantation |
April 10, 2007 |
| Apparatus for ion implantation having an ion trap for stabilizing a beam current are disclosed. An illustrated apparatus for ion implantation includes an arc chamber to ionize an impurity to create an ion beam; an ion beam trapping device to extract the ion beam from the arc chamber and |
| 7202184 |
Method for fabricating semiconductor device |
April 10, 2007 |
| The present invention relates to a semiconductor device fabrication method, which includes forming an inter metal dielectric on a semiconductor substrate having wirings and planarizing the inter metal dielectric through a chemical mechanical polishing, wherein the inter metal dielect |
| 7202158 |
Method for fabricating a metal-insulator-metal capacitor |
April 10, 2007 |
| A method fabricating multiple wiring metals in a semiconductor device. The method includes forming a lower wiring metal on a semiconductor substrate, forming an interlayer dielectric on the lower wiring metal, and selectively removing the interlayer dielectric to form a contact diele |
| 7202157 |
Method for forming metallic interconnects in semiconductor devices |
April 10, 2007 |
| A method for forming a metallic interconnect in a semiconductor device is disclosed. An example method forms an IDL on a substrate including predetermined devices, forms a via hole in the IDL, depositing a first metal diffusion preventive layer and a metal layer to form a via plug on |
| 7202131 |
Method of fabricating semiconductor device |
April 10, 2007 |
| A method of fabricating a semiconductor device is provided, by which leakage current is reduced by minimizing electron or hole density in a source/drain forming a P/N junction with a transistor channel area. The method includes forming a gate insulating layer on a semiconductor subst |
| 7199041 |
Methods for fabricating an interlayer dielectric layer of a semiconductor device |
April 3, 2007 |
| Methods for fabricating an interlayer dielectric layer of a semiconductor device are disclosed. An illustrated method comprises forming a metallic interconnect on a substrate; depositing an SRO layer on the metallic interconnect while the substrate is located in a chamber; and forming an |
| 7199034 |
Flash memory device and method for fabricating the same |
April 3, 2007 |
| A flash memory device includes a floating gate formed with a byproduct, such as a polymer, generated in an etching process. The flash memory device is configured to minimize the unstableness often caused by a floating gate that includes direct contact between polymer and polysilicon. |
| 7199012 |
Method of forming a trench in a semiconductor device |
April 3, 2007 |
| A method for forming a trench in a semiconductor device is disclosed. An example method forms a pad oxide film and a silicon nitride film on a semiconductor substrate, selectively etches the silicon nitride film and the pad oxide film on a region to be formed with a trench, and implants |
| 7195977 |
Method for fabricating a semiconductor device |
March 27, 2007 |
| A method for fabricating the semiconductor device includes forming linear field oxide regions on a semiconductor substrate; forming gate oxide lines on the semiconductor substrate between the field oxide regions; forming gate lines on the field oxide regions and the gate oxide lines, |
| 7193686 |
Lithography apparatus and method for measuring alignment mark |
March 20, 2007 |
| A lithographic exposing system having an optical system including a light source, a lens, a mirror and a filter, and transferring patterns formed on a reticle to a substrate. The method includes a device for lowering the energy of the light from the light source below a threshold energy, |
| 7192869 |
Methods for planarizing a metal layer |
March 20, 2007 |
| Methods for planarizing a metal layer in a semiconductor device are disclosed. An illustrated example method comprises dividing a metal layer into a first section and a second section. A polishing removal rate associated with the first section is greater than a polishing removal rate |
| 7192837 |
Methods of manufacturing MOSFET devices |
March 20, 2007 |
| Example methods of manufacturing MOSFET devices are disclosed. One example method may include an oxidation, an etching, an ion implanting for a threshold voltage control to form an elevated source/drain region and thereby implements an ultra shallow junction. |
| 7189629 |
Method for isolating semiconductor devices |
March 13, 2007 |
| A method of isolating semiconductor devices including forming a pad layer on a semiconductor substrate, forming a trench by etching the semiconductor substrate to a predetermined depth using the pad layer as an etch barrier, implanting ion impurities into a bottom of the trench so as |
| 7186649 |
Submicron semiconductor device and a fabricating method thereof |
March 6, 2007 |
| A method of forming a pattern finer than an existing pattern in a semiconductor device using an existing light source and a hard mask, and a method of removing the hard mask which is used as an etching mask. The method includes forming an oxide layer on a substrate; forming a polysil |
| 7186646 |
Semiconductor devices and methods of forming a barrier metal in semiconductor devices |
March 6, 2007 |
| Semiconductor devices and methods of forming a barrier metal in semiconductor devices are disclosed. A disclosed semiconductor device includes a metal layer on a semiconductor substrate; an interlayer dielectric layer on the metal layer, a hole in the interlayer dielectric layer that |
| 7186644 |
Methods for preventing copper oxidation in a dual damascene process |
March 6, 2007 |
| Methods of preventing oxidation of a copper interconnect of a semiconductor device are disclosed. An example method forms a lower copper interconnect on a substrate having at least one predetermined structure, deposits a nitride layer on the lower copper interconnect and on the subst |
| 7186641 |
Methods of forming metal interconnection lines in semiconductor devices |
March 6, 2007 |
| A method of forming metal interconnection line for a semiconductor device being capable of forming a plug without voids irrespective of aspect ratios is provided. In one example, the method includes forming a first metal layer on a semiconductor substrate; forming a second metal layer on |
| 7186639 |
Metal interconnection lines of semiconductor devices and methods of forming the same |
March 6, 2007 |
| Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to elec |
| 7183609 |
Semiconductor devices and methods for fabricating the same |
February 27, 2007 |
| Semiconductor devices and methods for fabricating the same are disclosed. A disclosed method includes forming a trench in a region where a main gate pattern is to be formed, forming an insulating film having a fixed thickness in the trench, and fixing a scale of the main gate pattern |
| 7183225 |
Method for fabricating semiconductor device |
February 27, 2007 |
| A method for fabricating a semiconductor device is disclosed. In the method, a buffer oxide film and a nitride film are formed on a semiconductor substrate in succession, an opening is formed in the nitride film and the buffer oxide film for exposing a field region of the semiconduct |
| 7183218 |
Methods for fabricating a semiconductor device with etch end point detection |
February 27, 2007 |
| The present invention relates to a fabrication method of a semiconductor device using EPD system, which enables uniform hole etching regardless of changes of etch rates of etching chemical and thickness of interlayer insulating layer after CMP, and the fabrication method comprises: formi |
| 7183209 |
Semiconductor device and manufacturing method thereof |
February 27, 2007 |
| The semiconductor device fabrication method of the present invention includes forming metal wirings on a semiconductor substrate, forming a first blocking layer on the semiconductor substrate and the metal wiring, forming a first FSG on the first blocking layer, forming a second bloc |
| 7183155 |
Non-volatile memory device and fabricating method thereof |
February 27, 2007 |
| The present invention provides a non-volatile memory device and fabricating method thereof, by which a cell size can be lowered despite high degree of cell integration and by which the device fabrication is facilitated. The present invention includes at least two trench isolation lay |
| 7182819 |
Methods for cleaning a chamber of semiconductor device manufacturing equipment |
February 27, 2007 |
| Methods for cleaning a chamber of semiconductor device manufacturing equipment are disclosed. An illustrated method comprises supplying cleaning gas into a chamber to start a cleaning process; detecting the intensity of a wavelength for the cleaning gas; fixing a valve at a predeterm |
| 7180150 |
CMOS image sensor and method for detecting color sensitivity thereof |
February 20, 2007 |
| A CMOS image sensor and a method for detecting color sensitivity of red, green and blue light without using a color filter layer is disclosed, which includes a semiconductor substrate having an active region; a photodiode formed in the active region of the semiconductor substrate, an |
| 7179734 |
Method for forming dual damascene pattern |
February 20, 2007 |
| Disclosed is a method for forming a dual damascene pattern. The method includes the steps of forming a lower conductive structure on a lower insulating layer, forming a first protective film, a first insulating film, a second insulating film, a third insulating film, and a second pro |
| 7179713 |
Method of fabricating a fin transistor |
February 20, 2007 |
| A method of fabricating a fin transistor is disclosed. An example method stacks a mask oxide layer and a nitride layer on a semiconductor substrate, forms a fin by etching the nitride and mask oxide layers and silicon, forms an insulating oxide layer, and forms a gate electrode by et |
| 7179675 |
Method for fabricating image sensor |
February 20, 2007 |
| A method for fabricating an image sensor includes forming a seed layer on a semiconductor substrate, forming a blocking layer on the seed layer, partially exposing a region for transistor in an active region of the semiconductor substrate by patterning the seed layer and the blocking |
| 7177185 |
Non-volatile flash memory device having dual-bit floating gate |
February 13, 2007 |
| A non-volatile memory device having a unit cell, the unit cell including a transistor, word lines, a first bit line and a second bit line. The transistor includes a gate oxide layer on a substrate, polysilicon gate, sidewall floating gates, block oxide layers formed between the polys |
| 7176518 |
Nonvolatile flash memory device |
February 13, 2007 |
| A method of fabricating nonvolatile memory devices is disclosed. A nonvolatile memory device comprises: a polysilicon gate on a semiconductor substrate; a gate oxide layer between the polysilicon gate and the substrate; sidewall floating gates on the bottom of the lateral faces of th |
| 7176517 |
Flash memories and methods of fabricating the same |
February 13, 2007 |
| The present disclosure relates to a flash memory including a common source line having a predetermined width formed on a semiconductor substrate, a common source in the semiconductor substrate below the common source line, and a couple of floating gates having a predetermined width forme |
| 7170127 |
Semiconductor device and fabricating method thereof |
January 30, 2007 |
| The present invention provides a semiconductor device and fabricating method thereof, by which capacitance is enhanced by increasing an effective area of a lower electrode of a capacitor. The present invention includes a first lower electrode on a semiconductor substrate to have a pl |
| 7169678 |
Method of forming a semiconductor device using a silicide etching mask |
January 30, 2007 |
| Semiconductor devices and methods for fabricating a silicide of a semiconductor device are disclosed. An illustrated method comprises: forming a gate electrode; depositing an insulating layer; removing a predetermined portion of the insulating layer in order to expose a portion of th |
| 7169672 |
Split gate type nonvolatile memory device and manufacturing method thereof |
January 30, 2007 |
| A method for fabricating a nonvolatile memory device comprises the steps of: defining an active region in a semiconductor substrate; forming a charge trapping layer, a first conducting layer and a capping layer on the active region; patterning the capping layer to form a pair of caps; |
| 7169655 |
Field effect transistors and methods for manufacturing field effect transistors |
January 30, 2007 |
| FETs and methods for fabricating FETs are disclosed. An illustrated method comprises forming a first insulating layer on a semiconductor substrate; forming a first conductive layer for a fin on the first insulating layer; etching the first conductive layer so that an area of a lower part |
| 7166532 |
Method for forming a contact using a dual damascene process in semiconductor fabrication |
January 23, 2007 |
| A method for forming a contact using a Cu line in semiconductor fabrication process is disclosed. An example method forms a dual damascene pattern by etching a pre-metal dielectric (PMD) layer formed on a substrate. The dual damascene pattern includes a contact hole portion located o |
| 7166526 |
Method for forming silicide film in semiconductor device |
January 23, 2007 |
| Method for forming a silicide film in a semiconductor device, including the steps of forming a silicide suppressing film on a silicon substrate, patterning the silicide suppressing film by chemical dry etching, forming a metal film on an entire surface of the silicon substrate inclusive |
| 7166489 |
Complementary metal oxide semiconductor image sensor and method for fabricating the same |
January 23, 2007 |
| A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-lens array, in which the CMOS image sensor includes |
