| Patent Number |
Title Of Patent |
Date Issued |
| 7416990 |
Method for patterning low dielectric layer of semiconductor device |
August 26, 2008 |
| A method for patterning a low dielectric insulating layer of a semiconductor device improves adhesion between a photoresist and the low dielectric (Low-K) insulating layer by removing at least one hydroxyl group from a surface of the Low-K insulating layer with a beam. Reliability of |
| 7416982 |
Semiconductor devices and methods for manufacturing the same |
August 26, 2008 |
| Semiconductor devices having a copper line layer and methods for manufacturing the same are disclosed. An illustrated semiconductor device comprises a damascene insulating layer having a contact hole, a barrier metal layer including a first ruthenium layer, a ruthenium oxide layer an |
| 7416946 |
Semiconductor device and method of manufacturing the semiconductor device |
August 26, 2008 |
| A method of manufacturing a semiconductor. A first epitaxial layer is formed on a gate nitride layer, and a protection nitride layer is formed on the first epitaxial and gate nitride layers. A first gate insulation layer is formed on a drain silicide, a gate oxide layer is formed on a |
| 7416944 |
Flash EEPROM device and method for fabricating the same |
August 26, 2008 |
| In a flash EEPROM device, and method for fabricating the same, no bit line contact is made, thereby minimizing a design rule between a contact and a gate. Thus, cell size may be reduced. The flash EEPROM device includes a semiconductor substrate having an active area defined in a bit lin |
| 7416937 |
Semiconductor device and method for fabricating the same |
August 26, 2008 |
| A method creates semiconductor device in which a storage dielectric film and a storage electrode included in the capacitor is transferred from an inactive region of a semiconductor substrate to the active region thereof, i.e., into a device isolating trench such that the capacitor is |
| 7416914 |
Method of fabricating CMOS image sensor |
August 26, 2008 |
| A method of fabricating a CMOS image sensor is disclosed that enhances device robustness. The method includes the steps of forming a metal pad on a pad area of a substrate, forming a planarizing layer on the substrate including the metal pad, removing a portion of the planarizing lay |
| 7416912 |
Method of fabricating CMOS image sensor |
August 26, 2008 |
| A method of fabricating a CMOS image sensor is disclosed, by which image sensor characteristics are enhanced. In one aspect, the method includes forming a plurality of photodiodes in the photodiode region of a semiconductor substrate; stacking a first insulating layer over the semico |
| 7414232 |
Image sensor and method for fabricating the same |
August 19, 2008 |
| An image sensor having self-aligned microlenses and a method for fabricating the same. The image sensor includes a photodiode formed in a predetermined surface of a silicon substrate, a planarization layer formed above the silicon substrate, the planarization layer having a recess in |
| 7413972 |
Method of forming a metal interconnection line in a semiconductor device using an FSG layer |
August 19, 2008 |
| A method of forming a metal line in a semiconductor device using a fluorine doped silica glass (FSG) insulation layer. The method includes forming a lower metal layer on a insulation layer on a semiconductor substrate, forming a metal oxide layer on a sidewall of the lower metal laye |
| 7413953 |
Method of forming floating gate array of flash memory device |
August 19, 2008 |
| The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined by device isolati |
| 7413944 |
CMOS image sensor and method of manufacturing the same |
August 19, 2008 |
| In a CMOS image sensor manufacturing process, heavily doped p type impurity ions (for example, B) are implanted in a dummy moat region when the heavily doped p type impurity ions is implanted in a PMOS transistor region, so that metal ion contamination is removed. Accordingly, a CMOS |
| 7413923 |
Method of manufacturing CMOS image sensor |
August 19, 2008 |
| Provided is a manufacturing method of a CMOS image sensor. The method includes forming an interlayer insulating layer, a color filter layer, and a planarizing layer. A first photoresist is applied on the planarizing layer, and patterning of the first photoresist is performed using a |
| 7411234 |
CMOS image sensor having impurity diffusion region separated from isolation region |
August 12, 2008 |
| A CMOS image sensor and a manufacturing method are disclosed. The gates of the transistors are formed in the active region of the unit pixel, and a diffusion region for the photo diode is defined by an ion implantation of impurities to the semiconductor substrate. The patterns of the |
| 7407884 |
Method for forming an aluminum contact |
August 5, 2008 |
| A method of forming an aluminum contact including forming a barrier metal layer on an interlayer insulation layer pattern defining a contact hole, and forming an aluminum layer on the barrier metal layer so as to fill the contact hole. The method further includes forming a photoresist |
| 7407881 |
Semiconductor device and method for manufacturing the same |
August 5, 2008 |
| Enhanced step coverage and reduced resistivity of a TaSiN layer may be achieved when a semiconductor device is manufactured by: forming an interlayer insulating layer on a semiconductor substrate, the interlayer insulating layer having a contact hole that partially exposes the substr |
| 7407828 |
CMOS image sensor and manufacturing method thereof |
August 5, 2008 |
| A gate insulation layer with a high dielectric constant for a CMOS image sensor formed by a damascene process. A silicide layer on a gate electrode layer is formed in both a pixel region and a peripheral circuit region, and a silicide layer on a source/drain region is formed only in a |
| 7405437 |
CMOS image sensor and method for fabricating the same |
July 29, 2008 |
| A CMOS image sensor includes a first conductive type semiconductor substrate defined by a photodiode area and a transistor area, a trench formed in the semiconductor substrate corresponding to a transfer transistor of the transistor area, a gate electrode of the transfer transistor, |
| 7405161 |
Method for fabricating a semiconductor device |
July 29, 2008 |
| Method for fabricating a semiconductor device in which a by-product of etching is deposited on a photoresist film for using as a mask. The method for fabricating a semiconductor device includes the steps of depositing a polysilicon, and a bottom anti-refection coating on an entire su |
| 7405097 |
CMOS image sensor and method for manufacturing the same |
July 29, 2008 |
| A CMOS image sensor and a method for manufacturing the same are disclosed, in which a blue photodiode is imparted with a greater thickness to improve sensitivity of blue light. The blue photodiode of a CMOS image sensor includes a first lightly doped P-type epitaxial layer formed on a |
| 7402500 |
Methods of forming shallow trench isolation structures in semiconductor devices |
July 22, 2008 |
| Methods of forming a shallow trench isolation structures in semiconductor devices are disclosed. A disclosed method comprises forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate; forming a trench defining first and second active areas by etching the seco |
| 7402486 |
Cylinder-type capacitor and storage device, and method(s) for fabricating the same |
July 22, 2008 |
| A one cylinder storage device and a method for fabricating a capacitor are disclosed, realizing simplified fabrication by overexposure with a mask having a plurality of holes, in which the method includes forming a contact hole in an insulating layer on a semiconductor substrate; forming |
| 7402484 |
Methods for forming a field effect transistor |
July 22, 2008 |
| Methods for forming a field effect transistor are disclosed. An illustrated method comprises: forming a gate electrode on a substrate; and forming a nitride layer on at least a part of the gate electrode and the substrate. |
| 7399698 |
Semiconductor device and method of manufacturing the same |
July 15, 2008 |
| A method of manufacturing a semiconductor device includes: forming a first pad including a first metal and an inter-connection line including the first metal in a scribe lane region; forming a second pad including the first metal in a chip region; sequentially forming an etch-stop layer |
| 7399669 |
Semiconductor devices and methods for fabricating the same including forming an amorphous region |
July 15, 2008 |
| Semiconductor devices and methods for fabricating the same are disclosed in which an amorphous layer is formed in an interface between a device isolation layer and a source or drain region to stably thin a silicide layer formed in the interface. A leakage current of the silicide layer |
| 7397122 |
Metal wiring for semiconductor device and method for forming the same |
July 8, 2008 |
| A metal wiring for a semiconductor device and a method for forming the same are provided. The metal wiring includes a first insulating layer and a second insulating layer; an interlayer insulating film formed between the first and second insulating layers, wherein the interlayer insulati |
| 7397076 |
CMOS image sensor with dark current reduction |
July 8, 2008 |
| Disclosed are a CMOS image sensor and a fabrication method thereof, which is adequate to reduce dark current. The CMOS image sensor comprises a device isolation region and an active region, which are formed on a semiconductor substrate; a photocharge generating portion formed on the |
| 7396737 |
Method of forming shallow trench isolation |
July 8, 2008 |
| A method of manufacturing a semiconductor device including forming a pad oxide layer on a semiconductor substrate, forming a spacer oxide layer pattern on sidewalls of the pad oxide layer, and forming a nitride layer on the pad oxide layer. The method further includes forming a groove in |
| 7393778 |
Semiconductor device and method for fabricating the same |
July 1, 2008 |
| A semiconductor device and a method for fabricating the same in which a protective oxide layer is formed on an insulating interlayer gap are disclosed. An example semiconductor device includes a semiconductor substrate having lower structures, an insulating interlayer on the semicond |
| 7391096 |
STI structure |
June 24, 2008 |
| An STI structure and fabricating method thereof are disclosed. The STI fabricating method comprises forming a pad oxide layer and a first nitride layer on a substrate. A trench is formed by etching the first nitride layer, the pad oxide layer and the substrate. An oxide and a second |
| 7390751 |
Dry etching method and apparatus for performing dry etching |
June 24, 2008 |
| A dry etching method includes loading a wafer on a lower electrode having at least two cooling paths. Cooling fluids having different temperatures are supplied to each of the cooling paths of the lower electrode so that the multiple cooling paths are at different temperatures from one |
| 7390711 |
MOS transistor and manufacturing method thereof |
June 24, 2008 |
| A MOS transistor including a gate insulation layer and a gate electrode layer on a channel region of a semiconductor substrate. A gate spacer layer is formed on a sidewall of the electrode layer and the insulation layer. The transistor includes a deep extended source/drain region, a |
| 7390686 |
CMOS image sensor and method for fabricating the same |
June 24, 2008 |
| A CMOS image sensor and a method for fabricating the same are disclosed, in which light that transmits through a microlens is prevented from being beyond a photodiode region to minimize loss of incident light and to improve low illumination characteristics of the CMOS image sensor. The |
| 7388270 |
Method of fabricating CMOS image sensor |
June 17, 2008 |
| A method of fabricating a CMOS image sensor is provided, in which a trapezoidal microlens pattern profile is formed to facilitate reflowing the microlens pattern and by which a curvature of the microlens may be enhanced to raise its light-condensing efficiency. The method includes fo |
| 7387926 |
Method for manufacturing CMOS image sensor |
June 17, 2008 |
| A method for manufacturing a CMOS image sensor is provided. The method includes forming a gate electrode on a semiconductor layer having defined regions of a photodiode region and a logic region, such that a gate oxide film is interposed between the semiconductor layer and the gate e |
| 7387854 |
Method of forming an isolated line pattern using photolithography |
June 17, 2008 |
| A method of forming an isolated line on a wafer is disclosed. The disclosed method comprises preparing a first mask comprising an isolated line pattern and dummy patterns, the dummy patterns being positioned on either side of the isolated line pattern; forming an isolated line patter |
| 7386829 |
Method of fabricating a photomask |
June 10, 2008 |
| A method of fabricating a photomask automatically generates a microscopic supplementary pattern by selective sizing to reduce a product cost and by which a precise line width is provided in a manner of decreasing unnecessary microscopic supplementary patterns to raise precision of a |
| 7385261 |
Extended drain metal oxide semiconductor transistor and manufacturing method thereof |
June 10, 2008 |
| A MOS transistor having an extended drain structure and including a semiconductor substrate formed in a well of a first conductivity type. A gate insulating layer is formed on the substrate, a gate electrode is formed on the gate insulating layer, and a source region is formed in a f |
| 7385241 |
Vertical-type capacitor structure |
June 10, 2008 |
| Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at least one dielectric layer on the substrate to insulate the first electrode wall from the |
| 7384813 |
Method for fabricating CMOS image sensor |
June 10, 2008 |
| A method for fabricating a CMOS image sensor forms silicon nitride (SiN) layer on a pad. Microlenses, having a minimum height and footprint according to a desired packing density of the lenses, are fabricated of an oxide film and a nitride film deposited on the silicon nitride. Since |
| 7381584 |
CMOS image sensor and a method for fabricating the same |
June 3, 2008 |
| A CMOS image sensor and method for fabricating the same is disclosed that reconditions, repairs and/or protects a surface of a photodiode area and improves characteristics of the image sensor. The method includes forming a photodiode area and a plurality of transistors, implanting a |
| 7378319 |
Method of forming double gate dielectric layers and semiconductor device having the same |
May 27, 2008 |
| A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally grown on a silicon su |
| 7378295 |
CMOS image sensor and fabricating method thereof |
May 27, 2008 |
| A CMOS image sensor and fabricating method thereof enable enhanced photo-response characteristics and protect a microlens in packaging by embedding the microlens in a passivation layer pattern. The image sensor may include a semiconductor substrate, a photodiode, a metal line, an ins |
| 7375829 |
Method for inspecting an insulator with a library of optic images |
May 20, 2008 |
| A method for inspecting an insulator with a library of optic images is disclosed. The method for inspecting an insulating layer according to the present invention, comprises the steps of collecting standard data for thickness of the insulating layer; collecting standard data for an optic |
| 7375028 |
Method for manufacturing a semiconductor device |
May 20, 2008 |
| A semiconductor device may be manufactured by a method that includes forming an etch stop layer on a semiconductor substrate, sequentially forming a first interlayer insulating layer, a first diffusion barrier, a second interlayer insulating layer, and a second diffusion barrier on the |
| 7375019 |
Image sensor and method for fabricating the same |
May 20, 2008 |
| An image sensor and a method for fabricating the same are disclosed, to improve a contact quality between a contact plug and a source diffusion layer. The image sensor includes a photodiode in an active area of a semiconductor substrate, for receiving incident external light and gene |
| 7374999 |
Semiconductor device |
May 20, 2008 |
| A semiconductor device includes a substrate including a high-voltage transistor area provided with a high-voltage transistor and a low-voltage transistor area provided with a low-voltage transistor; a LOCOS layer provided as a device isolation layer of the high-voltage transistor area; |
| 7374989 |
Flash memory and methods of fabricating the same |
May 20, 2008 |
| Flash memory and methods of fabricating the same are disclosed. An illustrated example flash memory includes a first source formed within a semiconductor substrate; an epitaxial layer formed on an upper surface of the semiconductor substrate; an opening formed within the epitaxial layer |
| 7374967 |
Multi-stack chip size packaging method |
May 20, 2008 |
| In multi-stack chip size packaging a plurality chips, a first chip is electrically interconnected on a top surface of a substrate using a bump. Next, an epoxy is coated on the first chip and is stacked a second chip thereon, wherein the second chip is electrically interconnected to the |
| 7372122 |
Image sensor chip package and method of fabricating the same |
May 13, 2008 |
| The present invention relates to an image sensor chip package and a method for fabricating the same. In one embodiment of an image sensor chip package, chip pads on a first surface of an image sensor chip are attached to electrode pads of a glass substrate with conductive material. I |
| 7371679 |
Semiconductor device with a metal line and method of forming the same |
May 13, 2008 |
| A method of forming a metal line in a semiconductor device including forming an inter-metal dielectric (IMD) layer on the semiconductor substrate including the predetermined pattern, planarizing the IMD layer through a first CMP process, and patterning a via hole on the planarized su |
