| Patent Number |
Title Of Patent |
Date Issued |
| D511981 |
Semiconductor integrated circuit test head |
November 29, 2005 |
|
| 7615990 |
Loadboard enhancements for automated test equipment |
November 10, 2009 |
| An enhanced loadboard and method for enhanced automated test equipment (ATE) signaling. More specifically, embodiments provide an effective mechanism for reducing signal degradation and error interjection by replacing one or more relays with signal splitters for directing signals bet |
| 7532014 |
LRL vector calibration to the end of the probe needles for non-standard probe cards for ATE RF t |
May 12, 2009 |
| A method and apparatus for radio frequency vector calibration of s-parameter measurements to the tips of the wafer probe needles of an automatic test equipment production tester. The method involves a modified Line-Reflect-Line (LRL) calibration routine that uses a Thru-Reflect-Line |
| 7496467 |
Automatic test equipment operating architecture |
February 24, 2009 |
| An integrated circuit testing device, such as an ATE, configured with an architecture comprising a distinct software layer and a distinct hardware layer with an interface for tester abstraction providing a communication conduit between the software layer and the hardware layer. The softw |
| 7492181 |
Method and device for enabling the measurement of device under test voltages using a testing ins |
February 17, 2009 |
| A method for determining an output voltage of a device under test is disclosed. In the method, a first voltage is placed onto a terminal of a resister that is coupled to the device under test and a first current is through the resistor that corresponds to the first voltage is measured. A |
| 7471753 |
Serializer clock synthesizer |
December 30, 2008 |
| A clock synthesizer uses a serializer to convert a parallel data stream into clock signals. The frequency of the synthesized clock is dependent on the bit values of the parallel data stream and the frequency of the reference clock used by the serializer. Rapid tuning of the frequency is |
| 7471100 |
Semiconductor integrated circuit tester with interchangeable tester module |
December 30, 2008 |
| A test head for an integrated circuit tester includes a main chassis defining a chamber that is open at the top. Tester modules are installed in the chamber, each tester module being removable as a unit from the chamber and including a tester module chassis, multiple pin electronics |
| 7454678 |
Scan stream sequencing for testing integrated circuits |
November 18, 2008 |
| A system and method for processing scan data for integrated circuit testing. Scan data is divided into three groups of scan data segments: scan-in data segments, scan-out data segments and scan-mask data segments. The sequence of scan data segments in each group constitutes the opera |
| 7439728 |
System and method for test socket calibration using composite waveform |
October 21, 2008 |
| A system and method for calibration of a test socket using a composite waveform. A group of input signal pins of test system are coupled together. A pin belonging to the group is selected as a pin under calibration. A first calibration edge is applied to the pin under calibration. Af |
| 7430130 |
D-optimized switching converter |
September 30, 2008 |
| A switching converter produces an output signal transmitted to a variable load impedance to produce a load voltage V.sub.DD across the load impedance and holds V.sub.DD close to a set point voltage V.sub.SP selected by control data D.sub.REF1 to compensate for variations in the load |
| 7414438 |
Clock based voltage deviation detector |
August 19, 2008 |
| The clock based voltage deviation detector of the present invention includes a pulse module, an indicator module and a correlation module. The pulse module generates a stream of reset pulses as a function of a clock signal. The indicator module generates a pass/fail indicator signal |
| 7409617 |
System for measuring characteristics of a digital signal |
August 5, 2008 |
| An electronic device under test (DUT) responds to a digital input signal by generating a digital DUT output signal conveying a repetitive digital signal pattern. An apparatus for measuring various characteristics of the DUT output signal includes a trigger generator for generating a seri |
| 7400154 |
Apparatus and method for detecting photon emissions from transistors |
July 15, 2008 |
| A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may furt |
| 7389449 |
Edge selecting triggering circuit |
June 17, 2008 |
| A triggering circuit asserts a trigger signal in response to edges of a digital signal conveying a repetitive pattern of edges. The triggering circuit generates first data having a value identifying a position within the pattern of a last occurring edge of the digital signal and generate |
| 7372302 |
High speed, out-of-band differential pin driver |
May 13, 2008 |
| A driver block for a differential pin driver that supports out-of-band signaling. The driver block includes a main enable switch that is controlled by a high speed driver inhibit (DINH) signal. The main enable switch controls coupling between a main current source and a differential |
| 7370255 |
Circuit testing with ring-connected test instrument modules |
May 6, 2008 |
| Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication rin |
| 7353126 |
Method of determining coherent test conditions |
April 1, 2008 |
| A method of determining coherent test conditions is disclosed. The method includes receiving constraints from a user, wherein the constraints include desired test conditions, desired tolerances for the desired test conditions, and desired instrument. Further, the method includes dete |
| 7343538 |
Programmable multi-function module for automatic test equipment systems |
March 11, 2008 |
| A programmable source/measurement module for automatic test equipment is disclosed. A high resolution low frequency source, high resolution low frequency measurement capability, low resolution high frequency source, and a low resolution high frequency measurement capability are provided |
| 7336066 |
Reduced pin count test method and apparatus |
February 26, 2008 |
| Testing of an electronic device is carried out by combining power and signal delivery on a single pair of wires. The power delivery is decoupled from the signal delivery, using inductors, so the device power supplied does not interfere with the test signals delivered from the device |
| 7327452 |
Light beam apparatus and method for orthogonal alignment of specimen |
February 5, 2008 |
| A system for orthogonal alignment of a specimen disclosed. The system includes a light-beam illumination source, collection optics, imaging optics, and a tiltable specimen holder. The light-beam source is activated to illuminate a spot on the specimen, and the imaging optics is used |
| 7323862 |
Apparatus and method for detecting photon emissions from transistors |
January 29, 2008 |
| A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may furt |
| 7314767 |
Method for local wafer thinning and reinforcement |
January 1, 2008 |
| A method is provided for preparing a semiconductor wafer for testing. The method includes selecting a die to be tested; measuring a diagonal of the die; thinning an area over the die extending beyond the scribe lines, the thinned area may be a circular area having a diameter that is larg |
| 7307440 |
Semiconductor integrated circuit tester with interchangeable tester module |
December 11, 2007 |
| A test head for an integrated circuit tester includes a main chassis defining a chamber that is open at the top. Tester modules are installed in the chamber, each tester module being removable as a unit from the chamber and including a tester module chassis, multiple pin electronics |
| 7297948 |
Column simultaneously focusing a particle beam and an optical beam |
November 20, 2007 |
| The invention concerns a column for producing a focused particle beam comprising: a device (100) focusing particles including an output electrode (130) with an output hole (131) for allowing through a particle beam (A); an optical focusing device (200) for simultaneously focusing an |
| 7296195 |
Bit synchronization for high-speed serial device testing |
November 13, 2007 |
| An apparatus for testing electronic devices employs a programmable device to adjust the timing of the strobes such that the strobes sample the bit stream from a device under test at or near the center of the bit position. The strobe time adjustment is performed based on pairs of stro |
| 7292059 |
Power supply assembly for a semiconductor circuit tester |
November 6, 2007 |
| A power supply assembly includes a dielectric substrate and a power supply circuit supported by the dielectric substrate. A conductive connection block is attached to the dielectric substrate at a main surface thereof and is connected to a power supply terminal of the power supply circui |
| 7271664 |
Phase locked loop circuit |
September 18, 2007 |
| A phase locked loop circuit (PLL) has a reference terminal for receiving a reference signal and an output terminal for providing an output signal. The PLL comprises a phase comparator having first and second inputs and having an output at which it provides a signal that depends on phase |
| 7257507 |
System and method for determining probing locations on IC |
August 14, 2007 |
| An apparatus and method for tracing back a probing location to identify the circuit element being probed on a device under test (DUT). The coordinates of the irregularity on the DUT are used to trace back to the logic cone to decipher the root-cause of the irregularity. The Def and L |
| 7254203 |
Method and apparatus for use of high sampling frequency A/D converters for low frequency samplin |
August 7, 2007 |
| A method and apparatus for adding fill-in clock pulses to an analog to digital converters input clock signal between requests for analog data acquisition. The circuit that provides the fill-in clock pulses is able to detect a request for analog data acquisition, synchronously stop ad |
| 7246026 |
Multi-domain execution of tests on electronic devices |
July 17, 2007 |
| A device under test is divided into multiple test domains, and test conditions for each of the multiple test domains are defined separately, so that each test domain has its own test pattern, timing data, and other test conditions. Each test domain can start and stop independently, and |
| 7245133 |
Integration of photon emission microscope and focused ion beam |
July 17, 2007 |
| An integrated FIB/PEM apparatus and method for performing failure analysis on integrated circuits. In-situ failure analysis is enabled by integrating Photon Emission Microscopy into a Focused Ion Beam system, thereby improving throughput and efficiency of Failure Analysis. An iterati |
| 7243278 |
Integrated circuit tester with software-scaleable channels |
July 10, 2007 |
| An integrated circuit tester for testing an IC device under test (DUT) during a succession of test cycles includes a pattern generator programmed to generate data before each test cycle encoded to specify all test activities to be carried out during the test cycle and to specify for |
| 7243039 |
System and method for determining probing locations on IC |
July 10, 2007 |
| A method for identifying an area of a chip to be probed proceeds as follows. A callout list of failures is obtained from a tester, the list including cell name and pin for each failure. A Def file is interrogated to locate a Def entry matching the cell name, and a cell type, cell loc |
| 7242257 |
Calibration-associated systems and methods |
July 10, 2007 |
| The present invention relates to test systems for testing integrated circuit devices and to calibration associated systems and methods. One embodiment of the invention provides an auto-calibration system. The system includes: a plurality of delay line elements (DLEs) adapted to be co |
| 7230240 |
Enhanced scanning control of charged particle beam systems |
June 12, 2007 |
| A charged particle beam system and scanning control method capable of imaging, and possibly editing, a device under test (DUT). The charged particle beam system contains a charged particle beam generation unit, such as a focused ion beam (FIB) column, which emits a charged particle b |
| 7228464 |
PICA system timing measurement and calibration |
June 5, 2007 |
| PICA probe system apparatus is described, including apparatus for calibrating an event timer having a coarse measurement capability in which time intervals defined by clock boundaries are counted and a fine measurement capability in which time between boundaries is interpolated using |
| 7227702 |
Bi-convex solid immersion lens |
June 5, 2007 |
| A bi-convex solid immersion lens is disclosed, having a top and bottom convex surfaces. The radius of curvature of the bottom surface is larger than that of the top surface. A conical sloped side-wall connects the top and bottom surface. |
| 7227580 |
Knife edge tracking system and method |
June 5, 2007 |
| A system and method for automatically and accurately determining the exact location of a knife-edge, such as an edge of an optical shutter, so that it can be controlled automatically. In one aspect the system comprises a mechanized shutter coupled to a shutter controller that can automat |
| 7224828 |
Time resolved non-invasive diagnostics system |
May 29, 2007 |
| A system for probe-less non-invasive detection of electrical signals from integrated circuit devices is disclosed. The system includes an illumination source, collection optics, imaging optics, and a photon sensor. In a navigation mode, the light source is activated and the imaging o |
| 7222280 |
Diagnostic process for automated test equipment |
May 22, 2007 |
| A test apparatus including a means for sending a first test pattern to a device under test (DUT), where the first test pattern is a part of a planned sequence of tests, and further including a means for evaluating the test results received from the DUT, and a method of testing are de |
| 7219269 |
Self-calibrating strobe signal generator |
May 15, 2007 |
| A self-calibrating strobe signal generator for a BIST circuit responds to an edge of an input strobe signal by generating corresponding edges of first and second strobe signals separated in time by a target delay specified by input data. The strobe signal generator includes a multipl |
| 7212941 |
Non-deterministic protocol packet testing |
May 1, 2007 |
| A test apparatus implements a method for testing electronic devices that exhibit non-deterministic behavior. The test apparatus includes a high-speed buffer queue for storing data packets. The data packets arrive at one end of the queue and, as they exit at the other end, are compared |
| 7203875 |
Test systems and methods with compensation techniques |
April 10, 2007 |
| The present invention relates to test systems for testing integrated circuit devices and to calibration associated systems and methods. One embodiment of the invention provides a method for providing formatted levels for use in a test system. The method includes: providing on a singl |
| 7177777 |
Synchronization of multiple test instruments |
February 13, 2007 |
| A test apparatus has multiple instruments that are synchronized with respect to one another so that a trigger signal may be generated in response to events occurring at different instruments. The events may correspond to events defined within a test program or events detected at a de |
| 7171601 |
Programmable jitter generator |
January 30, 2007 |
| A jitter generator produces a jittery test signal for use in performing a jitter test on an integrated circuit (IC) device under test (DUT). The jitter generator includes a programmable delay circuit for delaying a non-jittery input signal with a varying delay controlled by input digital |
| 7171598 |
Tester system having a multi-purpose memory |
January 30, 2007 |
| An apparatus for testing an integrated circuit, the apparatus including a sequence control logic unit having an output channel connectable to a device under test, and a memory to store at least two types of data sets, each data set being used by the sequence control logic unit to determi |
| 7161347 |
Test head for semiconductor integrated circuit tester |
January 9, 2007 |
| A test head for a semiconductor integrated circuit tester includes a main support structure defining a device interface board location, and a contact support frame that is displaceable relative to the main support structure for engaging a device interface board at the device interface |
| 7143326 |
Test system algorithmic program generators |
November 28, 2006 |
| Testing an integrated circuit (IC) device, for example, an IC that includes an embedded memory, may involve specifying one or more test parameters including at least one of a pipeline depth data (e.g., latency delay information) and a data width data (e.g. corresponding to a data wid |
| 7135678 |
Charged particle guide |
November 14, 2006 |
| A charged particle guide adapted to be coupled with a charged particle detector, such as a secondary electron detector. The charged particle guide, in one example, comprising two wires extending from the charged particle detector toward a source of charged particles, such as secondary |
| 7135123 |
Method and system for integrated circuit backside navigation |
November 14, 2006 |
| The backside navigation method of the present invention includes milling a fiducial opening through the substrate of an integrated circuit. The milling process is stopped when the fiducial opening reaches the bottom of a trench isolation structure. The trench isolation structure deli |
