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COMPAQ Information Technologies Group, L.P. Patents
Assignee:
COMPAQ Information Technologies Group, L.P.
Address:
Houston, TX
No. of patents:
200
Patents:


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Patent Number Title Of Patent Date Issued
7064771 Method and apparatus for compositing colors of images using pixel fragments with Z and Z gradien June 20, 2006
A graphics data processing apparatus includes a graphics memory having pixel storage for storing up to a predetermined number of fragment values for the pixel. Each stored fragment value is associated with a fragment of an image that is visible in that pixel. When a new fragment is d
6671273 Method for using outgoing TCP/IP sequence number fields to provide a desired cluster node December 30, 2003
In accordance with the present invention a method is provided for encoding connection ownership information in the sequence number field of an outgoing TCP/IP data packet header. That connection information includes the network layer address of the processor node to which the packet is
6625601 Escrow-locking multithreaded process-pair resource manager dictionary September 23, 2003
A dictionary in a distributed transaction processing system. The dictionary is implemented as an escrow-locking multithreaded process-pair resource manager (PPRM) dictionary which is produced as an escrow-locking object implemented in the context of a PPRM and inheriting its functionalit
6622261 Process pair protection for complex applications September 16, 2003
Techniques using process-pair protection of complex applications are disclosed which provide fast and stateful application failover.
6603808 Dual mode phone line networking modem utilizing conventional telephone wiring August 5, 2003
A networking modem capable of full duplex communication over a telephone line is adapted for use as a component of a computer system. The modem comprises a digital signal processor (DSP) capable of implementing a plurality of digital modulation and demodulation techniques, including
6597073 Circuit and method for providing power supply redundancy July 22, 2003
The circuit includes a first power supply coupled to power supply sensor, which is in turn coupled to a first switch and to a third switch. A second power supply is coupled to a second power supply sensor, which is in turn coupled to a second switch and a fourth switch. A first disk driv
6581162 Method for securely creating, storing and using encryption keys in a computer system June 17, 2003
A secure environment for entering and storing information necessary to conduct encryption processes. In a computer system according to the invention, session keys, passwords, and encryption algorithms are maintained in a secure memory space such as System Management Mode (SMM) memory
6578141 Configuration sizer for determining a plurality of price values and performance values for a plu June 10, 2003
A computer system is implemented according to the invention when an computer process allows a user to determine a desired computer configuration by in part determining performance relative to price candidate configurations.
6577324 Video and audio multimedia pop-up documentation by performing selected functions on selected top June 10, 2003
An audiovisual help documentation system for applications running on a multimedia computer workstation or personal computer includes a graphical documentation interface which allows a user to easily access audiovisual or textual documentation related to the application. A pop-up menu mod
6567880 Computer bridge interfaces for accelerated graphics port and peripheral component interconnect d May 20, 2003
A core logic chip set is provided in a computer system to provide a bridge between host and memory buses and an accelerated graphics port ("AGP") bus adapted for operation of two AGP devices, or one AGP device and one peripheral component interconnect ("PCI") device. A common AGP bus hav
6567464 Fast retrain based on communication profiles for a digital modem May 20, 2003
A digital modem for operating in a splitterless environment that supports fast retrain based on communication profiles. The modem includes a memory that stores a plurality of communication profiles, ADSL communication logic that sends and receives information via a phone line and that
6557675 Tunable vibration damper for processor packages May 6, 2003
The present invention relates to a method and apparatus that minimizes shock/vibrational motion in interposer sockets. The ability to control shock/vibration can ensure successful operation and substantially increase socket lifetime. The present invention discloses a device for maintaini
6549538 Computer method and apparatus for managing network ports cluster-wide using a lookaside list April 15, 2003
In accordance with the present invention a method is provided for managing TCP port numbers used by applications running on a cluster. Using that method, ranges of TCP port numbers are locked (reserved) by a processor node of a cluster. An application running on one of those processor no
6546453 Proprammable DRAM address mapping mechanism April 8, 2003
A computer system contains a processor that includes a software programmable memory mapper. The memory mapper maps an address generated by the processor into a device address for accessing physical main memory. The processor also includes a cache controller that maps the processor ad
6545872 Heat sink for edge connectors April 8, 2003
A heat sink assembly for use with edge connectors, e.g., card edge connectors, of cards or printed circuit boards. The heat sink assembly provides a relatively large heat transfer capacity to control temperatures in contacts of the edge connectors which increases the current rating of
6542995 Apparatus and method for maintaining secured access to relocated plug and play peripheral device April 1, 2003
A computer system, bus interface unit, and method are provided for securing certain Plug and Play peripheral devices connected to an ISA bus. Those devices include any device which contains sensitive information or passwords. The device may be encompassed by or interfaced through adapter
6542946 Dual mode differential transceiver for a universal serial bus April 1, 2003
A computer system has a USB bus to which one or more USB-compatible devices can connect. One or more of the USB devices has an electrical interface that includes two transmitters and, if desired, a receiver for bidirectional data transmission. The transmitters preferably are dual out
6542926 Software partitioned multi-processor system with flexible resource sharing levels April 1, 2003
Multiple instances of operating systems execute cooperatively in a single multiprocessor computer wherein all processors and resources are electrically connected together. The single physical machine with multiple physical processors and resources is subdivided by software into multiple
6535904 Method and apparatus for conducting a transaction between homogeneous and/or heterogeneous trans March 18, 2003
A protocol for a transaction involving two homogeneous or two heterogeneous computing systems involves starting a transaction on one of the two systems, sending a request for participation in the transaction to an application resident on the other of the two systems, together with an
6535903 Method and apparatus for maintaining translated routine stack in a binary translation environmen March 18, 2003
A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an applica
6532546 Computer system for dynamically scaling busses during operation March 11, 2003
Apparatus and method are disclosed for down scaling performance of a multibus multiprocessor computer system. One or more busses associated with one or more failed processors or devices are disabled to allow operation from remaining busses. If errors or power failure are detected in
6530007 Method and apparatus for supporting heterogeneous memory in computer systems March 4, 2003
A memory controller capable of supporting heterogeneous memory configurations enables seamless communications between a bus and memory modules having different characteristics. Thus, owners of computer systems need no longer replace entire memory arrays to take advantage of new memor
6529984 Dual phase arbitration on a bus March 4, 2003
A multiphase IEEE 1394 network of nodes requires all nodes to broadcast their current understanding of the phase of the bus (e.g., odd or even). Even if a node is not requesting ownership of the bus, it must send a message that indicates which phase that node believes to be the current
6529044 Conditional clock gate that reduces data dependent loading on a clock network March 4, 2003
A conditional clock gate is implemented that equalizes load conditions on clocked transistor gates to provide a better quality clock signal in a clock distribution network. The conditional clock gate may be implemented as either a NAND gate or a NOR gate. According to one embodiment, a
6526442 Programmable operational system for managing devices participating in a network February 25, 2003
A programmable operational system for managing devices participating in a network including a collection of notices, operation logic that filters the collection of notices based on at least one criteria and that generates at least one operation indicative of a state change of the net
6522662 Method and apparatus for providing a 10BASE-T compatible home network over a single twisted-pair February 18, 2003
A device for seamlessly providing 10BASE-T compatible data communications over an ordinary single twisted pair home phone line between multiple computers, between computers and peripherals, and between multiple peripherals. Each component that is to communicate over the home phone li
6517375 Technique for identifying multiple circuit components February 11, 2003
A technique for identifying multiple circuit components. More specifically, a technique for identifying the location of electrical components, such as memory cartridges which have been disposed on a substrate, is described.
6516410 Method and apparatus for manipulation of MMX registers for use during computer boot-up procedure February 4, 2003
A system for execution of code during power-on-self test (POST), the system including a mass storage device for storing computer programs; a microprocessor connected to the mass storage device, the microprocessor including an execution unit; a general purpose register connected to the
6510522 Apparatus and method for providing access security to a device coupled upon a two-wire bidirecti January 21, 2003
A computer system, bus interface unit, and method are provided for securing certain devices connected to an I.sup.2 C bus. Those devices include any device which contains sensitive information or passwords. For example, a device controlled by a I.sup.2 C-connected device bay controller m
6510469 Method and apparatus for providing accelerated content delivery over a network January 21, 2003
Improved techniques for rapid and efficient delivery of objects from a network (e.g., the Internet) to users. The improved techniques can be utilized in a variety of apparatuses, including a proxy system or an acceleration apparatus. Such a proxy system operates to produce an acceler
6510211 Method and apparatus for remote FAX forwarding control January 21, 2003
A facsimile machine provides firmware to remotely activate and deactivate fax forwarding. The firmware enables a user to remotely activate or deactivate fax forwarding through an email, fax, or a telephone. The facsimile machine may be set by the user to activate and deactivate fax f
6507909 Method for executing trusted-path commands January 14, 2003
A method for executing trusted commands, in which a trusted command is first received from a user at a user terminal and parsed by untrusted code; then passed to a trusted computing base for execution. The trusted computing base displays to the user for confirmation indication of what is
6505305 Fail-over of multiple memory blocks in multiple memory modules in computer system January 7, 2003
A computer system has a memory controller for controlling accesses to multiple memory modules, each having multiple memory blocks, and a fail-over circuit for failing-over individual memory blocks from multiple memory modules. The digital information stored in an individual memory bl
6505278 Method for flashing ESCD and variables into a ROM January 7, 2003
A computer system for flashing Extended System Configuration Data (ESCD) and associated variables to a flash read-only memory (ROM) is provided. During Power-On-Self-Test (POST) code, a ROM image is copied from an ESCD sector of a read-only memory to an ESCD original buffer and an ESCD w
6505260 Computer system with adaptive memory arbitration scheme January 7, 2003
A computer system includes an adaptive memory arbiter for prioritizing memory access requests, including a self-adjusting, programmable request-priority ranking system. The memory arbiter adapts during every arbitration cycle, reducing the priority of any request which wins memory ar
6505258 Comprehensive interface between bios and device drivers to signal events January 7, 2003
A system is disclosed for allowing surprise insertion and removal of a peripheral device from the bays of a portable computer system. The peripheral device may be inserted or removed when the portable computer system is powered off, powered on, or in standby or sleep mode. The periph
6505256 Automatic synchronization of state colors across a web-based system January 7, 2003
A network provides color translation between a server side application and a web browser application. A color object created on the server side is reduced into the individual color components defining the color property for the object. These discrete color components are then converted i
6505164 Method and apparatus for secure vendor access to accounts payable information over the internet January 7, 2003
Improved techniques for remotely accessing account information through the Internet are disclosed. The remote access techniques provide security measures so that unauthorized access is unlikely even though the Internet is utilized. Assuming access is authorized, the requested account
6505153 Efficient method for producing off-line closed captions January 7, 2003
Disclosed is a five-step process for producing closed captions for a television program, subtitles for a movie or other uses for time-aligned transcripts. An operator transcribes the audio track while listening to the recorded material. The system helps him/her to work efficiently and
6504577 Method and apparatus for display of interlaced images on non-interlaced display January 7, 2003
A home entertainment appliance includes a computer system and a television system. A video monitor or television monitor of the home entertainment system shows a sequence of video frames generated in the appliance based upon at least one received sequence of interlaced video fields each
6502237 Method and apparatus for performing binary translation method and apparatus for performing binar December 31, 2002
A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an applica
6502203 Method and apparatus for cluster system operation December 31, 2002
A method and system of quorum negotiation utilizing power mains. Unlike current systems, this communication is provided as a secondary channel, with the primary channel being a standard network system. By using this technique, if the heartbeat is lost over the primary communication syste
6502153 Computer system having condition sensing for indicating whether a processor has been installed December 31, 2002
A system for providing a signal indicating whether a process is installed and providing improved voltage regulation. A contact is selected and isolated from an array of ground contacts and is further coupled with circuit for generating an INSTALL signal. A capacitor and pull up resistor
6502003 Method and system for controlling a CD-ROM drive in an operating system-independent reduced powe December 31, 2002
A portage computer case whether in a closed state or open state permits a user to exercise control and monitor certain operating features. The user may toggle a control switch to place the computer system in a secondary operational mode, determine when a computer system is in a secondary
6501442 Method and apparatus for graphical display of multiple network monitors over multiple intervals December 31, 2002
A method and apparatus for displaying multiple communication network monitors having multiple monitoring intervals on a single graphical display. A user, through an input device, selects an object relating to a network monitor to be displayed on a graph and a processor retrieves netw
6498716 DC main power distribution December 24, 2002
The present invention is a power distribution assembly for distributing power about a rack mounted server system. In particular, each chassis of a rack mounted server system is provided power through a power distribution assembly that is hinged to a back of the rack of the server system.
6498523 Circuit for powering up a microprocessor December 24, 2002
A circuit for generating a double-edged POWERGOOD signal to a P6 processor after power-up. After a power supply circuit asserts a signal which indicates that computer system power supply voltages are stable and within threshold levels, the circuit drives the POWERGOOD signal high. A firs
6498460 Prioritization-based power management protocol in a computer system December 24, 2002
A power management scheme for a computer system prioritizes battery charging. The scheme includes determining when the output of a power adapter, which powers a computer and a battery subsystem, has reached or is about to reach a threshold which may be the power budget for the comput
6496945 Computer system implementing fault detection and isolation using unique identification codes sto December 17, 2002
A computer system implementing a fault detection and isolation technique that tracks failed physical devices by identification (ID) codes embedded in each component of the computer for which the ability to detect faults and isolate failed devices is disclosed. The computer system compris
6496938 Enhanced PCI clock control architecture December 17, 2002
A clock control technique allows reducing the power consumption of devices connected to a computer bus. Individual idle devices can be disconnected from the bus clock by a device clock controller and placed in a low-power state without waiting for all devices on the bus to go idle. When
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