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Compaq Computer Corporation Patents
Compaq Computer Corporation
Houston, TX
No. of patents:

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Patent Number Title Of Patent Date Issued
6205521 Inclusion map for accelerated cache flush March 20, 2001
A cache memory controller in which data processing systems having active power management may efficiently flush a cache during a shut down operation. A cache map divides the cache into a number of blocks and an inclusion bit is stored for each block. The block inclusion bit is set wh
6205507 Memory coherency in a processor-to-bus cycle in a multi-processor system March 20, 2001
In a method and system for use in connection with performing a processor-to-bus cycle in a multi-processor computer system, the processor-to-bus cycle is interrupted before completion and an operation to save data in memory is performed. Thereafter, the interrupted processor-to-bus c
6205474 Access mechanism for parallel status update for multiple servers March 20, 2001
Techniques used in obtaining information in parallel from one or more server systems as requested by a client computer system are disclosed. Multiple requests for information from one or more server systems are made in parallel providing information to the client system asynchronously
6205441 System and method for reducing compile time in a top down rule based system using rule heuristic March 20, 2001
The present invention applies one or more pruning heuristics to the expression, the binding, and/or the substitute during a database query optimization process. The heuristics identify certain rules that can be eliminated by either not applying the rules and/or not implementing the r
6205424 Two-staged cohort selection for speaker verification system March 20, 2001
Speech signals from speakers having known identities are used to create sets of acoustic models. The acoustic models along with their corresponding identities are stored in a memory. A plurality of sets of cohort models that characterize the speech signals are selected from the store
6205124 Multipoint digital simultaneous voice and data system March 20, 2001
A multipoint conferencing system communicates with a first remote digital simultaneous voice and data (DSVD) modem and a second DSVD modem. The multipoint conferencing system has a first DSVD modem adapted to communicate with the first remote DSVD modem and a second DSVD modem adapte
6205020 Modular desktop computer having enhanced serviceability March 20, 2001
A computer which includes modular structures incorporated therein provides enhanced serviceability. In a preferred embodiment, the computer has a chassis, a lid, a front bezel, an option card module, a system board module, a drive module, and a power supply module. The lid secures the
6204839 Capacitive sensing keyboard and pointing device March 20, 2001
A combination keyboard and pointing device is incorporated in a portable computer and includes a dielectric base member on a top side of which a spaced series of electrically conductive pad member portions of a capacitance-based proximity sensing system are formed. Manually depressib
6202256 Hinge system for a portable computer March 20, 2001
The hinge system for a portable computer for pivotably securing a top cover to a base unit includes a first base unit hinge member for mounting to the base unit. The first base unit hinge member has proximal and distal mounting portions which are angled relative to each other. The proxim
6202212 System for changing modalities March 13, 2001
A method and apparatus allows users to quickly effect a modal change in an appliance having first and second modes. The apparatus captures a user actuation indicative of a modal change. The user actuation may be a mouse button closure, a keyboard button closure, or a remote control butto
6202127 Apparatus for spatial and temporal sampling in a computer memory system March 13, 2001
An apparatus for sampling states of a computer system having a hierarchical memory arranged at a plurality of levels, the hierarchical memory storing data at addresses. The apparatus includes a selector for selecting memory transactions based on first state and transaction information. T
6202126 Victimization of clean data blocks March 13, 2001
A method for preventing inadvertent invalidation of data elements in a system having a separate probe queue and fill queue for each central processing unit, is provided wherein a central processing unit stores a clean data element, that would otherwise have been discarded, in a victim
6202101 System and method for concurrently requesting input/output and memory address space while mainta March 13, 2001
A computer is provided having a bus interface unit coupled between a processor bus, a peripheral bus, and a memory bus. The bus interface unit includes a processor controller linked to the processor bus for controlling the transfer of cycles from the processor to the peripheral bus a
6202070 Computer manufacturing system architecture with enhanced software distribution functions March 13, 2001
The present application discloses a system of software distribution in computer manufacturing which manages and distributes software from release by a software engineering group to installation at a remote manufacturing site or testing facility. The distribution system disclosed seeks to
6201789 Network switch with dynamic backpressure per port March 13, 2001
A network switch including a plurality of network ports for communicating data packets, each port including logic for receiving a backpressure indication and for transmitting a jamming sequence to terminate transmission of a data packet being received. The switch includes a memory fo
6201580 Apparatus for supporting multiple video resources March 13, 2001
A multiplexing apparatus for use in a computer system is disclosed. The multiplexing system is typically designed for multiplexing various sources of video signal inputs for subsequent processing. The multiplexing apparatus includes at least one analog video input connector, but pref
6201418 Differential sense amplifier with reduced hold time March 13, 2001
A sense amplifier includes cross-coupled n-transistors that provide, from a predetermined time during one sample period to the start of the next precharge period, a path from a discharging internal node to the low supply voltage VSS. The n-transistors provide a discharge path from the
6200170 Tower building-block biased latching system March 13, 2001
Racks of modules especially useful for retaining disk drives, tape drives, controllers, computers and the like are fabricated via use of tower building blocks. Each block contains a latch arrangement for securing it to another block, a base unit or a cap unit with the latch effecting
6199179 Method and apparatus for failure recovery in a multi-processor computer system March 6, 2001
Multiple instances of operating systems execute cooperatively in a single multiprocessor computer wherein all processors and resources are electrically connected together. The single physical machine with multiple physical processors and resources is subdivided by software into multiple
6199169 System and method for synchronizing time across a computer cluster March 6, 2001
A system for time synchronization in a computer cluster is provided. For the system of the present invention a master node sends a SYNC message including a first time stamp to a slave node. The slave node adds a second time stamp and returns the SYNC message to the master node. The maste
6199167 Computer architecture with password-checking bus bridge March 6, 2001
A computer password security method employing a south bridge circuitry where the user password is compared to a secured password stored in secured memory which is directly accessible to the south bridge circuitry, removing any threat of data bus and/or unprotected memory snooping.
6199134 Computer system with bridge logic that asserts a system management interrupt signal when an addr March 6, 2001
A computer system includes a South bridge logic that connects an expansion bus to one or more secondary expansion busses and peripheral devices. The South bridge logic includes internal control devices that are targets for masters on the expansion bus. The target devices couple to the ex
6199133 Management communication bus for networking devices March 6, 2001
A management communication bus for enabling management of network devices in a network system. The network system includes at least one bus master device and at least one slave device, where the bus master and slave devices are distributed within the network devices. Each network device
6199131 Computer system employing optimized delayed transaction arbitration technique March 6, 2001
A computer system includes a bus bridge which provides an interface between a main memory and a peripheral bus such as a PCI bus. A peripheral bus interface unit is provided which supports delayed transactions. When a PCI bus master effectuates a read cycle to read data from main memory
6199124 Arbitration system based on requester class and relative priority including transmit descriptor March 6, 2001
In accordance with principles of the invention, there is provided an arbitration system for multiple requesters of a shared data transfer resource, such as a system bus or a peripheral bus. The disclosed system arbitrates among multiple classes of requesters which are divided into mu
6199123 Computer system for supporting increased PCI master devices without the requiring additional bri March 6, 2001
A PCI-based computer system is provided with an expanded number of PCI master devices, in effect a second level of PCI arbitration. The expansion is made available without requiring additional bridge chips. Multiple PCI devices may arbitrate for control of the PCI bus via the primary PCI
6199118 System and method for aligning an initial cache line of data read from an input/output device by March 6, 2001
A computer is provided having a bus interface unit coupled between a CPU bus, a PCI bus and/or a graphics bus. The bus interface unit includes controllers linked to the respective busses and further includes a plurality of queues placed within address and data paths linking the vario
6199095 System and method for achieving object method transparency in a multi-code execution environment March 6, 2001
A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an applica
6198262 Selective dual input low dropout linear regulator March 6, 2001
A circuit and method for controlling current drawn from two different voltage sources while maintaining regulation of a fixed output voltage during controlled switching of different sleep states required by the microprocessor and system board.
6195777 Loss resilient code with double heavy tailed series of redundant layers February 27, 2001
An encoded loss resilient message, includes a first number of first data items, a second number of second data items, and a third number of third data items. Respective portions of the first data items correspond to different numbers of associated second data items in a first distributio
6195748 Apparatus for sampling instruction execution information in a processor pipeline February 27, 2001
An apparatus is provided for sampling instructions in a processor pipeline of a computer system. The pipeline has a plurality of processing stages. Instructions are fetched into a first stage of the pipeline. A subset of the fetched instructions are identified as selected instructions. E
6195713 Polling and displaying updated audio disk track number in a portable computer February 27, 2001
A computer system incorporating capabilities for displaying the audio disk track number when the computer system is playing an audio disk. The computer system determines if a disk is present in the disk drive. If a disk is present, the computer system determines if an audio disk is p
6195698 Method for selectively restricting access to computer systems February 27, 2001
A computerized method selectively accepts access requests from a client computer connected to a server computer by a network. The server computer receives an access request from the client computer. In response, the server computer generates a predetermined number of random characters. T
6195683 Video teleconferencing for networked workstations February 27, 2001
A video teleconferencing method and apparatus for computer workstations connected by a digital data network includes a transmission source means for a local workstation to send audio and video teleconference data across the network to one or more remote workstations, and, a receiver for
6195437 Method and apparatus for independent gain control of a microphone and speaker for a speakerphone February 27, 2001
A method and apparatus for controlling acoustic gain during a non-speakerphone audio mode of computer system independent of acoustic gain during a speakerphone mode of the computer system is provided. The BIOS code of the computer system detects whether the computer system is in a sp
6193069 Apparatus for packaging processing system elements for mailing and shipping February 27, 2001
The present invention provides integrated packaging for storing or transporting a circuit assembly. In an embodiment of the invention, a housing comprises a first side portion attached to the circuit assembly, a second side portion and means for coupling the first side portion to the
6192470 Configuration sizer for selecting system of computer components based on price/performance norma February 20, 2001
A computer system is implemented according to the invention when an computer process allows a user to determine a desired computer configuration by in part determining performance relative to price candidate configurations.
6192460 Method and apparatus for accessing data in a shadow set after a failed data operation February 20, 2001
Disclosed is a method and apparatus for accessing data in a computer system after a failed data operation in which I/O process state information is unknown. The failed data operation may cause data inconsistency among multiple devices associated with a shadow set for storing data. The
6192447 Method and apparatus for resetting a random access memory February 20, 2001
A resettable memory apparatus includes a random access memory including a plurality of memory locations, each memory location stores a plurality of bits of data. A single register has a plurality of bits, there is one bit for each of the plurality of memory locations. A reset signal rese
6192394 Inter-program synchronous communications using a collaboration software system February 20, 2001
A new system for communicating between computer programs is disclosed which includes a collaboration software program having a directory publishing procedure and a message forwarding procedure. In an example embodiment, the disclosed system provides a user of a network application progra
6192082 Digital television data format conversion with automatic parity detection February 20, 2001
A digital television (DTV) data format converter of a system automatically detects whether a serial data stream includes parity data and converts the serial DTV data stream to a parallel DTV data stream. The DTV data format converter transmits the parallel DTV data stream converted from
6191943 Docking station with thermoelectric heat dissipation system for docked portable computer February 20, 2001
A portable computer docking base has incorporated therein a thermoelectric cooling system used to provide auxiliary operating heat dissipation for a portable notebook computer operatively docked to the base. The cooling system includes a thermoelectric (Peltier effect) heat pump unit dis
6189083 Method and apparatus for accessing a cache memory utilization distingushing bit RAMs February 13, 2001
A prediction mechanism is provided for determining a bank of a secondary cache and a tag sub-store corresponding to a data element requested by a central processing unit.The mechanism employs a bit number select logic for determining unique bit number locations of differences between sel
6189058 Crossbar connect switch mechanism for hot plugability February 13, 2001
The present invention makes it possible to safely hot plug a PCI expansion slot connected to a 64 bit, 66 Megahertz PCI bus. The PCI bus comprises a plurality of signal lines connecting a PCI Controller to the expansion slot. On each signal line there is a quick switch disposed thereon t
6189050 Method and apparatus for adding or removing devices from a computer system without restarting February 13, 2001
A method and apparatus provide a mechanism for a personal computer to allow the insertion and removal of devices to and from device ports without re-starting the operating system of the computer. Device drivers are pre-loaded during the start-up process of the computer system for devices
6188973 Automatic mapping, monitoring, and control of computer room components February 13, 2001
A system and method for automatically mapping on a computer display a graphical representation of a physical arrangement of a plurality of computer components in one or more cabinets, each cabinet having one or more shelves for housing the computer components. The status of the compo
6185663 Computer method and apparatus for file system block allocation with multiple redo February 6, 2001
A shared persistent memory (e.g., disk) file system provides persistent memory block allocation with multiple redo logging of memory blocks. The file system employs a three part block state indicator (V,A,U). V is a volume indication. A is allocation sequence indication. U is update
6185654 Phantom resource memory address mapping system February 6, 2001
A phantom-resource memory address mapping system reduces access latency in a memory configured as a stacked-hybrid or filly-interleaved hierarchy of memory resources. The address mapping system comprises memory access circuitry having a topology that combines an interleaved-based transla
6185628 Controllerless modem with general purpose computer executing modem controller code and virtualiz February 6, 2001
A computer system implements a standard modem without the use of a microcontroller. Instead, a digital signal processor is provided on an expansion card, but with direct links to the computer system itself. The code usually implemented in the microcontroller is instead implemented as
6185334 Method for reconstructing a dithered image February 6, 2001
A method of reconstructing an image from a dithered image. A predefined set of filters having different regions of support is established. Each filter is defined by a number of filter coefficients and an impulse response function which defines the filter response for a region of support
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