| Patent Number |
Title Of Patent |
Date Issued |
| 6229538 |
Port-centric graphic representations of network controllers |
May 8, 2001 |
| A port-centric controller system for a computer including a plurality of network ports implemented with a plurality of network controllers and a driver system capable of operating each of the network ports in either a stand-alone mode or a team mode and that monitors the status of each o |
| 6226789 |
Method and apparatus for data flow analysis |
May 1, 2001 |
| A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an applica |
| 6226734 |
Method and apparatus for processor migration from different processor states in a multi-processo |
May 1, 2001 |
| Multiple instances of operating systems execute cooperatively in a single multiprocessor computer wherein all processors and resources are electrically connected together. The single physical machine with multiple physical processors and resources is subdivided by software into multiple |
| 6226717 |
System and method for exclusive access to shared storage |
May 1, 2001 |
| A system and method exclusively accesses a shared storage location using a shared algorithm. Competing processors follow the algorithm for reserving exclusive access to the shared storage location. Those competing processors that have not successfully reserved exclusive access honor the |
| 6226709 |
Memory refresh control system |
May 1, 2001 |
| A memory system has a plurality of interleaved memory ranks that use SDRAMs requiring a periodic refresh, and an arbiter which controls access to the memory ranks and restricts access to a memory rank being refreshed. The memory ranks are interleaved on a memory module. Counting refresh |
| 6226703 |
Method and apparatus for reducing the apparent read latency when connecting busses with fixed re |
May 1, 2001 |
| An apparatus is provided for reducing read latency for an I/O device residing on a bus having a short read latency timeout period. The apparatus includes a I/O bridge on an I/O bus having a longer read latency timeout which modifies read transactions into two separate transactions, a |
| 6226700 |
Computer system with bridge logic that includes an internal modular expansion bus and a common m |
May 1, 2001 |
| A computer system includes a CPU and a memory device coupled by a North bridge logic unit to an expansion bus, such as a PCI bus. A South bridge logic connects to the expansion bus and couples various secondary busses and peripheral devices to the expansion bus. The South bridge logic |
| 6226699 |
Method and apparatus for clock selection and switching |
May 1, 2001 |
| A circuit for isolating a device from a bus includes a local clock, a clock multiplexer, and control logic. The clock multiplexer has a first input terminal coupled to the local clock, a second input terminal coupled to the first clock line of the bus, a control input terminal, and an ou |
| 6226630 |
Method and apparatus for filtering incoming information using a search engine and stored queries |
May 1, 2001 |
| A new system for organizing received messages for a user does not require the user to examine and categorize each received message, and enables the user to conveniently and efficiently modify filtering rules used to define folders that organize received messages. The system includes a re |
| 6226629 |
Method and apparatus determining and using hash functions and hash values |
May 1, 2001 |
| A method and apparatus that determines and uses two nearly uniform independent hash functions. The hash functions are created using only linear arithmetic and 4-byte machine register operations and, thus, can be created very quickly. The first uniform hashing function hi and the second |
| 6226409 |
Multiple mode probability density estimation with application to sequential markovian decision p |
May 1, 2001 |
| The invention recognizes that a probability density function for fitting a model to a complex set of data often has multiple modes, each mode representing a reasonably probable state of the model when compared with the data. Particularly, an image may require a complex sequence of an |
| 6224996 |
Battery housing wall interweave with all of system enclosure to reduce height of portable comput |
May 1, 2001 |
| A technique for reducing the height of a portable computer by reducing the effective number of housing walls across the height relates specifically to the system height over the battery slot. An enclosure of the portable computer, and specifically, a wall of the enclosure in the computer |
| 6223301 |
Fault tolerant memory |
April 24, 2001 |
| A computer system includes memory modules, a central processing unit and a memory controller. The memory controller is configured to access the memory modules in response to interaction with the central processing unit and define a fault tolerant memory array with the memory modules. Eac |
| 6223284 |
Method and apparatus for remote ROM flashing and security management for a computer system |
April 24, 2001 |
| A remote flash ROM and security package is formed and delivered to a system ROM of a target computer system for remote flashing of the ROM and remote configuration of security settings for the computer system. The remote flash ROM and security package includes flash ROM and security cont |
| 6223283 |
Method and apparatus for identifying display monitor functionality and compatibility |
April 24, 2001 |
| A monitor includes a file that identifies one or more compatible monitors and/or a list of features of the monitor. A processing unit, such as a computer, that does not specifically support the particular monitor may nonetheless configure itself to operate effectively with the monitor. I |
| 6223239 |
Dual purpose apparatus, method and system for accelerated graphics port or system area network i |
April 24, 2001 |
| A multiple use core logic chipset is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus and host and memory buses, or as a bridge between a system area network interface and the host bus and the system memory bus. The |
| 6222945 |
Selective filtering of a dithered image for the purpose of inverse dithering |
April 24, 2001 |
| A method for selecting a filter from among a plurality of ordered filters within an inverse dithering system is disclosed. In response to receipt of a number of filter parameters associated with the plurality of ordered filters and a selected portion of a dithered image, a determination |
| 6222846 |
Method and system for employing a non-masking interrupt as an input-output processor interrupt |
April 24, 2001 |
| A computer system is provided that has an input-output processor having a non-masking interrupt. In addition to the central processing unit, the computer system has a host bus, a host operating system, at least one input-output bus connected to the host bus. At least one input-output |
| 6222840 |
Method and system for performing concurrent read and write cycles in network switch |
April 24, 2001 |
| A system for performing concurrent read and write cycles in a network switch. The network switch includes several network ports, a data bus and a switch manager to execute a concurrent read and write cycle on the data bus by asserting a first port number to identify a source port followe |
| 6220713 |
Projection lens and system |
April 24, 2001 |
| Projection lenses and projection lens systems are telecentric between an illumination subsystem and a set of imagers. The lenses and systems can exhibit color fringing correction, uniform imager illumination, athermalization, and component articulation for improved imaging. The lense |
| 6219770 |
Method and apparatus for managing copy on write operations in a virtual memory |
April 17, 2001 |
| A method and apparatus operating within an object-oriented virtual memory management system. In the virtual memory management system, each page is referenced by traversing a series of mapping tables. Each mapping table is associated with one of a plurality of Partitioned Memory Objects ( |
| 6219742 |
Method and apparatus for artificially generating general purpose events in an ACPI environment |
April 17, 2001 |
| A hardware implementation of the General Purpose Event status register supports the ability to assert, under software control, individual General Purpose Event status bits in a General Purpose Event register in an ACPI environment. Software control over the General Purpose Event register |
| 6219698 |
Configuring client software using remote notification |
April 17, 2001 |
| To maintain communications between first and second processing systems interconnected by a communications network, computer programing having first and second sets of instructions are stored at the first processing system. The computer programing is initialized at the first processing |
| 6219235 |
Electronic assembly for standard rack enclosures |
April 17, 2001 |
| An apparatus for receiving cables includes a chassis assembly including a base with a defined opening, and a bulkhead coupled to the base and located adjacent to the defined opening. The bulkhead includes a plurality of apertures capable of receiving an increased number of ports. A metho |
| 6219041 |
Universal user interface for a system utilizing multiple processes |
April 17, 2001 |
| A computer convergence device, operable in a at least two modes, such as a computer mode and a video mode and when in the video mode the computer convergence device is operable in at least two states. The computer convergence device includes a universal graphic user interface for pro |
| 6216216 |
Method and apparatus for providing processor partitioning on a multiprocessor machine |
April 10, 2001 |
| In a multiprocessor computer system, a method and apparatus for partitioning the processors therein. The host processors are partitioned, leaving at least one host processor for providing operating system functions, and allocating one or more target processors to perform other functi |
| 6216192 |
Dynamic resource allocation across bus bridges |
April 10, 2001 |
| A system and method to permit access requests from a mezzanine bus through different bridges to perform in similar ways in disclosed. The access requests are serviced even if the bridges are configured differently, therefore allowing hardware and software management by allowing software |
| 6216190 |
System and method for optimally deferring or retrying a cycle upon a processor bus that is desti |
April 10, 2001 |
| A computer is provided having a bus interface unit coupled between a CPU bus, a peripheral bus, and a memory bus. The bus interface unit includes a processor controller linked to the CPU bus for controlling the transfer of cycles from the CPU to the peripheral bus and memory bus. Those c |
| 6216183 |
Apparatus and method for securing information entered upon an input device coupled to a universa |
April 10, 2001 |
| A computer system, bus interface unit and method are provided for securing passwords entered upon a USB input device, such as a USB keyboard. The bus interface unit includes a USB host controller coupled between a USB bus on which the keyboard is configured and another bus on which the s |
| 6215504 |
Line drawing using operand routing and operation selective multimedia extension unit |
April 10, 2001 |
| A routable operand and selectable operation processor multimedia extension unit is employed to draw lines in a video system using an efficient, parallel technique. A first series of integral y pixel values and error values are calculated according to Bresenham's line drawing algorithm. |
| 6212606 |
Computer system and method for establishing a standardized shared level for each storage unit |
April 3, 2001 |
| A computer system and method using a standardized shareability scheme for establishing a shared level for each of a plurality of storage units located in the computer system. The computer system includes a plurality of hosts and controllers coupled to a peer network (storage area network |
| 6212590 |
Computer system having integrated bus bridge design with delayed transaction arbitration mechani |
April 3, 2001 |
| A computer system includes a secondary bus bridge device in a portable computer and a another secondary bus bridge device in an expansion base to which the portable computer connects (docks). A peripheral in the expansion base may initiate a delayed cycle to read or write data to mem |
| 6212567 |
Method and apparatus for performing raw cell status report frequency mitigation on receive in a |
April 3, 2001 |
| A mechanism for mitigating the rate at which status reports associated with raw cell data transfers occur during receive operations in a network node is presented. The network node has an adapter for coupling a network and a host system, the host system including a host memory. The adapt |
| 6212560 |
Dynamic proxy server |
April 3, 2001 |
| A dynamic proxy server (DPS) including client logic that is capable of communicating with a plurality of other server modules via corresponding internal HTTP ports, proxy logic that is capable of communicating with the other server modules via the client logic, and server logic including |
| 6212557 |
Method and apparatus for synchronizing upgrades in distributed network data processing systems |
April 3, 2001 |
| A method and apparatus for upgrading the naming service of a distributed network data processing system uses controlled upgrades of replicated directories in clearinghouses on a node-by-node basis. |
| 6212530 |
Method and apparatus based on relational database design techniques supporting modeling, analysi |
April 3, 2001 |
| A computer method and apparatus for generating and maintaining a structured collection of documents describing a desired system is provided. A conceptual model of the desired system includes entities and relationships among the entities. An entity-relationship diagram is representative o |
| 6212493 |
Profile directed simulation used to target time-critical crossproducts during random vector test |
April 3, 2001 |
| A technique for verification of a complex integrated circuit design, such as a microprocessor, using a randomly generated test program to simulate internal events and to determine the timing of external events. The simulation proceeds in two passes. During a first pass, the randomly |
| 6212263 |
5 volts single power supply ADSL analog front end design |
April 3, 2001 |
| A combination x digital subscriber line (xDSL) and analog modem including a computer bus interface, codecs, an analog front end (AFE) for xDSL communications coupled to a plain old telephone service (POTS) line and a direct access arrangement (DAA) for analog communications also coupled |
| 6212232 |
Rate control and bit allocation for low bit rate video communication applications |
April 3, 2001 |
| A method and apparatus is described for encoding a sequence of video frames at a target bit rate. A controller controls the bit r ate by providing values for a coding frame rate and quantization parameter to a frame encoder. A set of operating regions, including a first operating region |
| 6211881 |
Image format conversion with transparency color adjustment |
April 3, 2001 |
| Improved image format conversion techniques that provide improved conversion from an image format supporting transparency to an image format not supporting transparency. The techniques replace a transparency color in an original image format prior to format conversion. Consequently, the |
| 6210211 |
Method and apparatus for retaining an electrical connector |
April 3, 2001 |
| In one aspect of the present invention, an apparatus for retaining an electrical connector is provided. The apparatus includes a tray adapted to receive an electrical device having a flexible connector coupled thereto. The tray is moveable between first and second positions. A spring ext |
| 6209067 |
Computer system controller and method with processor write posting hold off on PCI master memory |
March 27, 2001 |
| A computer system including a memory controller provides a series of queues between a processor and a peripheral component interconnect (PCI) bus and a memory system. Memory coherency is maintained in two different ways. Before any read operations are accepted from the PCI bus, both of t |
| 6209065 |
Mechanism for optimizing generation of commit-signals in a distributed shared-memory system |
March 27, 2001 |
| A mechanism optimizes the generation of a commit-signal by control logic of the multiprocessor system in response to a memory reference operation issued by a processor to a local node of a multiprocessor system having a hierarchical switch for interconnecting a plurality of nodes. The |
| 6209052 |
System and method for suppressing processor cycles to memory until after a peripheral device wri |
March 27, 2001 |
| A computer is provided having a bus interface unit coupled between a CPU bus, a peripheral bus (i.e., PCI bus and/or graphics bus), and a memory bus. The bus interface unit includes controllers linked to the respective buses, and a plurality of queues placed within address and data paths |
| 6209044 |
Method and apparatus for controlling a display monitor in a PC/TV convergence system |
March 27, 2001 |
| A computer system comprising a display monitor including an audio function and a computer coupled to the display monitor including a computer controller for controlling the audio function in the monitor. The computer is operable in a computer mode, a television mode, and a combination |
| 6209023 |
Supporting a SCSI device on a non-SCSI transport medium of a network |
March 27, 2001 |
| A network provides a method of virtualizing SCSI semantics onto a non-SCSI transport medium. The network includes a plurality of hosts or initiators, a SCSI bus coupled to a plurality of SCSI devices, and a bridge having a non-SCSI front end coupled to the non-SCSI transport medium and a |
| 6208968 |
Computer method and apparatus for text-to-speech synthesizer dictionary reduction |
March 27, 2001 |
| A computerized method and apparatus for reducing the size of a dictionary used in a text-to-speech synthesis system are provided. In an initial phase, the method and apparatus determine if entries in the dictionary, each containing a grapheme string and a corresponding phoneme string, ca |
| 6208513 |
Independently mounted cooling fins for a low-stress semiconductor package |
March 27, 2001 |
| In a semiconductor package, a die has electrical circuits formed on a first side surface. A lead frame for connecting the electrical circuits to a power source is connected to the electrical circuits of the die. A package body made of a dielectric material is formed around the die and th |
| 6208508 |
Space-saving docking station for vertically supporting an opened notebook computer |
March 27, 2001 |
| A space-saving docking station is usable to support a notebook computer docked thereto in a generally vertical, hinge-side up opened orientation on a desktop area with the computer lid display screen exposed and facing the computer user. The docking station includes a generally wedge-sha |
| 6208326 |
Apparatus and associated method for selecting video display parameter of a computer-system, vide |
March 27, 2001 |
| Apparatus, and an associated method, selects parameters determinative of video display characteristics of video displays displayable upon a video monitor. The parameters, such as brightness and contrast parameters, are stored at the video display monitor. The video display monitor is |
