| Patent Number |
Title Of Patent |
Date Issued |
| 7622806 |
Laser mark on an IC component |
November 24, 2009 |
| A laser mark is inscribed on an IC component, which character stroke consists of a plurality of laser paths inscribed by a laser beam. The width of the character stroke is greater than the widths of the laser paths. In addition, at least two of the laser paths, moving in opposite dir |
| 7615853 |
Chip-stacked package structure having leadframe with multi-piece bus bar |
November 10, 2009 |
| The present invention provides a chip-stacked package structure with leadframe having multi-piece bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided bet |
| 7586200 |
Light emitting diode chip with reflective layer thereon |
September 8, 2009 |
| A light emitting diode including a substrate, a semiconductor layer, multiple electrodes, a passivation layer, multiple under bump metallurgy (UBM) layers and a reflective layer is provided. The semiconductor layer is disposed on the substrate. The electrodes and the passivation layer |
| 7582953 |
Package structure with leadframe on offset chip-stacked structure |
September 1, 2009 |
| The present invention provides a package structure with lead-frame on stacked chips, comprising: a lead-frame, composed of a plurality of outer leads arranged in rows facing each other and a plurality of inner leads arranged in rows facing each other formed by a plurality of wires, w |
| 7579676 |
Leadless leadframe implemented in a leadframe-based BGA package |
August 25, 2009 |
| A leadless leadframe has a plurality of bottom leads and a plurality of top soldering pads formed in different layers. After encapsulation and before solder ball placement, a half-etching process is performed to remove the bottom leads to make the top soldering pads electrically isol |
| 7576416 |
Chip package having with asymmetric molding and turbulent plate downset design |
August 18, 2009 |
| A chip package having asymmetric molding includes a lead frame, a chip, an adhesive layer, bonding wires and a molding compound. The lead frame includes a turbulent plate and a frame body having inner lead portions and outer lead portions. The turbulent plate is bended downwards to form |
| 7560306 |
Manufacturing process for chip package without core |
July 14, 2009 |
| A manufacturing process for chip package without core is disclosed. First of all, a conductive layer with a first surface and a second surface is provided. A first film is formed onto the first surface, and the conductive layer is patterned to form a patterned circuit layer. A solder |
| 7554197 |
High frequency IC package and method for fabricating the same |
June 30, 2009 |
| A high frequency IC package mainly includes a substrate, a bumped chip, and a plurality of conductive fillers where the substrate has a plurality of bump holes penetrating from the top surface to the bottom surface. The active surface of the chip is attached to the top surface of the |
| 7538435 |
Wafer structure and bumping process |
May 26, 2009 |
| A wafer structure including a semiconductor substrate, elastic elements, under bump metallurgic (UBM) layers and bumps is provided. The semiconductor substrate has an active surface, and it includes pads disposed on the active surface. The elastic elements are disposed on the pads re |
| 7538419 |
Stacked-type chip package structure |
May 26, 2009 |
| A stacked-type chip package structure including a substrate, a first chip, bonding wires, a second chip and B-stage conductive bumps is provided. The first chip is disposed on the substrate, and it has first bonding pads disposed on an active surface thereof. Besides, the first bonding |
| 7538020 |
Chip packaging process |
May 26, 2009 |
| A bumping process including the following steps is provided. A main body with a plurality of contacts thereon is provided. A protective layer with a plurality of first openings is formed on the main body. The first openings in the protective layer expose the respective contacts. An u |
| 7528495 |
Chip structure |
May 5, 2009 |
| A chip structure including a substrate, at least one chip bonding pad, a passivation layer, at least one compliant bump, and at least one redistribution conductive trace is provided. The substrate has an active surface whereon the chip bonding pad is disposed. The passivation layer i |
| 7514299 |
Chip package structure and manufacturing method thereof |
April 7, 2009 |
| A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surfac |
| 7504714 |
Chip package with asymmetric molding |
March 17, 2009 |
| A chip package with asymmetric molding including a lead frame, a chip, an adhesive layer, bonding wires and an encapsulant, is provided. The lead frame includes a frame body and at least a turbulent plate. The frame body has inner lead portions and outer lead portions. The turbulent plat |
| 7498251 |
Redistribution circuit structure |
March 3, 2009 |
| A method of manufacturing a redistribution circuit structure is provided. First, a substrate is provided. The substrate has a plurality of pads and a passivation layer. The passivation layer has a plurality of first openings exposing a portion of each of the pads, respectively. A first |
| 7477065 |
Method for fabricating a plurality of elastic probes in a row |
January 13, 2009 |
| A method of forming a plurality of elastic probes in a row is disclosed. Firstly, a substrate is provided, then, a shaping layer is formed on the substrate so as to offer two flat surfaces in parallel. A photoresist layer is formed on the substrate and on the shaping layer. Then, the |
| 7446407 |
Chip package structure |
November 4, 2008 |
| A chip package structure includes a substrate, a chip, a first B-stage adhesive, bonding wires, a heat sink and a molding compound. The substrate comprises a first surface, a second surface and a through hole. The chip is arranged on the first surface of the substrate and electricall |
| 7446400 |
Chip package structure and fabricating method thereof |
November 4, 2008 |
| A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface, first bonding pads and second bonding pads, wherein the first bonding pads and the second bonding pads are disposed on the active surface |
| 7443013 |
Flexible substrate for package of die |
October 28, 2008 |
| The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a plurality of first |
| 7436074 |
Chip package without core and stacked chip package structure thereof |
October 14, 2008 |
| A chip package without a core, including a patterned circuit layer, a chip, a solder mask, a molding compound and multiple outer terminals, is provided. The patterned circuit layer has a first surface and a second surface opposite to each other. The chip disposed on the first surface is |
| 7420267 |
Image sensor assembly and method for fabricating the same |
September 2, 2008 |
| An assembly device of an image sensor chip is disclosed. A flexible circuit has a die-attached portion, a plurality of bendable portions, and a plurality of bonding portions where the bendable portions extend from the die-attached portion and are connected to the corresponding bonding |
| 7405144 |
Method for manufacturing probe card |
July 29, 2008 |
| A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned photoresist layer. |
| 7385282 |
Stacked-type chip package structure |
June 10, 2008 |
| A stacked-type chip package structure including a substrate, a first chip, bonding wires, a second chip and B-stage conductive bumps is provided. The first chip is disposed on the substrate, and it has first bonding pads disposed on an active surface thereof. Besides, the first bonding |
| 7372286 |
Modular probe card |
May 13, 2008 |
| A modular probe card comprises a printed circuit board, an interposer, and a probe head where the printed circuit board has a plurality of first contact pads, the probe head has a plurality of second contact pads. The interposer is disposed between the printed circuit board and the probe |
| 7372135 |
Multi-chip image sensor module |
May 13, 2008 |
| A multi-chip image sensor module includes a flexible module board, an image sensor chip, a transparent cover, and at least an IC chip. The flexible module board has a first die-attached portion, a second die-attached portion, at least one bent portion, and at least one bonding portio |
| 7370416 |
Method of manufacturing an injector plate |
May 13, 2008 |
| A method of manufacturing an injector plate is provided where a wafer is provided and a release layer is disposed on the wafer. Then a photo resist is formed over the release layer. After photolithography processing, a plurality of plugs are formed from the photo resist. A titanium l |
| 7368809 |
Pillar grid array package |
May 6, 2008 |
| A pillar grid array package (PGA) includes a substrate, a chip disposed on top of the substrate, and a plurality of stud bumps disposed on bottom of the substrate. The stud bumps are formed in an array and each has a flattened top to electrically connect to a printed circuit board, PCB, |
| 7361984 |
Chip package structure |
April 22, 2008 |
| A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is disposed therebetwee |
| 7361984 |
Chip package structure |
April 22, 2008 |
| A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is disposed therebetwee |
| 7316065 |
Method for fabricating a plurality of elastic probes in a row |
January 8, 2008 |
| A method of forming a plurality of elastic probes in a row is disclosed. Firstly, a substrate is provided, then, a shaping layer is formed on the substrate so as to offer two flat surfaces in parallel. A photoresist layer is formed on the substrate and on the shaping layer. Then, the |
| 7170160 |
Chip structure and stacked-chip package |
January 30, 2007 |
| A chip structure including a chip, a first passivation layer, a redistribution layer and a second passivation layer is provided. The chip has a wire bonding area adjacent to one side or two sides adjacent to each other of the chip, wherein the chip has multiple first bonding pads dis |
| 7170160 |
Chip structure and stacked-chip package |
January 30, 2007 |
| A chip structure including a chip, a first passivation layer, a redistribution layer and a second passivation layer is provided. The chip has a wire bonding area adjacent to one side or two sides adjacent to each other of the chip, wherein the chip has multiple first bonding pads dis |
| 7140101 |
Method for fabricating anisotropic conductive substrate |
November 28, 2006 |
| A method for fabricating an anisotropic conductive substrate is disclosed. A back holder has metal pins on a surface thereof. A liquid compound is formed on the surface of the back holder with metal pins. The liquid compound is pressed to deform the metal pins into electrodes in the |
| 7129730 |
Probe card assembly |
October 31, 2006 |
| A modularized probe head assembly mainly includes a probe head, an interposer and a probe head carrier with guide pins. The probe head has a plurality of first through holes. The interposer has a plurality of second through holes corresponding in location to the first through holes. |
| 7088118 |
Modularized probe card for high frequency probing |
August 8, 2006 |
| A modularized probe head for high frequency probing is provided. The probe head mainly includes a probe head, a mounting board and an interposer between the probe head and the mounting board. The probe head has a plurality of cavities on its back surface. A plurality of decoupling co |
| 7005054 |
Method for manufacturing probes of a probe card |
February 28, 2006 |
| A method to make probes of a probe card includes providing a blocking plate on an electroplating tank. The blocking plate has a plurality of openings according to the layout of contact pads on a probe head. There are bumps on the contact pads of the probe head. Continuous electroplat |
| 6960491 |
Integrated circuit packaging for improving effective chip-bonding area |
November 1, 2005 |
| A packaging process for improving effective chip-bonding area is disclosed in the present invention. An A-stage liquid paste is formed on a substrate and partially cured to become a B-stage film layer. The B-stage film layer is maintained without fully cured passing through a chip-attach |
| 6946860 |
Modularized probe head |
September 20, 2005 |
| A modularized probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having an active surface and an opposing back surface. The back surface of the silicon substrate is attached on a |
| 6853205 |
Probe card assembly |
February 8, 2005 |
| A probe card assembly is disclosed. The probe card assembly comprises a stiffener ring combining respectively with an upper printed circuit board and a lower printed circuit board. A plurality of coaxial transmitters are installed in the stiffener ring, and connect to the upper and lower |
| 6812720 |
Modularized probe card with coaxial transmitters |
November 2, 2004 |
| A modularized probe card with coaxial transmitter is disclosed. At least a coaxial transmitter is modularized and installed between a first printed circuit board and a second printed circuit board. The coaxial transmitter has a first connector and a second connector correspondingly conne |
| 6703075 |
Wafer treating method for making adhesive dies |
March 9, 2004 |
| A wafer treating method for making adhesive dies is provided. A liquid adhesive with two-stage property is coated on a surface of a wafer. Then, the wafer is pre-cured to make the liquid adhesive transform a thermo-bonding adhesive film having B-stage property which has a glass trans |
| 6689638 |
Substrate-on-chip packaging process |
February 10, 2004 |
| A SOC (Substrate-On-Chip) packaging process is disclosed. A layer of two-stage thermosetting mixture with solvent is coating on an upside of a substrate. Thereafter, the substrate is heated for removing solvent so that the two-stage thermosetting mixture becomes a B-stage dry adhesive |
| 6686615 |
Flip-chip type semiconductor device for reducing signal skew |
February 3, 2004 |
| A flip chip type semiconductor device for reducing signal skew includes: a chip with bonding pads, and a plurality of bumping pads on the chip. Between each bonding pad and corresponding bumping pads is connected with a metal redistribution trace covered by a passivation layer. Each meta |
| 6621710 |
Modular probe card assembly |
September 16, 2003 |
| A modular probe card assembly comprises a silicon substrate with probes modularly assembled on a main board. At least a socket is installed around silicon substrate and electrically connects to probe needles by a flexible printed wiring film. A plurality of detachable coaxial wires elect |
