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Broadcom Corporation Patents
Assignee:
Broadcom Corporation
Address:
Irvine, CA
No. of patents:
3386
Patents:




Patent Number Title Of Patent Date Issued
RE38876 System for, and method of, processing quadrature amplitude modulated signals November 15, 2005
Analog signals encoded with quadrature amplitude modulation (QAM) pass through a coaxial cable at a particular baud rate. These signals have a carrier frequency individual to the TV station being received. They are mixed with signals from a variable frequency oscillator to produce signal
RE37826 Ethernet system September 3, 2002
Four (4) unshielded twisted pairs of wires connect a hub and a computer in an Ethernet system: one (1) pair for transmission only, another for reception only and the other two (2) for transmission and reception. The signals in the wires are in packets each having timing signals defining
7620796 System and method for acceleration of streams of dependent instructions within a microprocessor November 17, 2009
A system and method for accelerated processing of streams of dependent instructions, such as those encountered in the G.726 codec, in a microprocessor or microprocessor-based system/chip. In a preferred implementation, a small RISC-like special purpose processor is implemented within
7620371 Transmitter signal strength indicator November 17, 2009
A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to wideband RF signals prior to transmission without requiring conversion to an intermediate frequency. Th
7620099 WCDMA terminal baseband processing module having multi-path scanner module November 17, 2009
A baseband processing module according to the present invention includes a multi-path scanner module. The multi-path scanner module is operable to receive timing and scrambling code information regarding an expected multi-path signal component of a WCDMA signal. Then, the multi-path
7620013 Method and system for decoding control channels using repetition redundancy November 17, 2009
Methods and systems for decoding control channels using repetition redundancy may include generating enhanced soft bits by combining soft bits generated from the two GSM SACCH blocks. Combining may comprise averaging soft bits in one GSM SACCH block and corresponding soft bits from t
7619997 Beamforming and/or MIMO RF front-end and applications thereof November 17, 2009
An RF front-end includes a transmit adjust module, a PA module, an antenna coupling circuit, a LNA module, and a receive adjust module. The transmit adjust module adjusts coordinates of up-converted analog signals when in a first transmit mode and adjusts coordinates of a plurality of
7618849 Integrated circuit package with etched leadframe for package-on-package interconnects November 17, 2009
Methods, systems, and apparatuses for integrated circuit packages, and for package stacking, are provided. An electrically conductive frame is attached to a first surface of a substrate. The electrically conductive frame includes a perimeter ring portion, a plurality of leads, and a
7617442 Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check November 10, 2009
Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. These constructed LDPC codes can be implemented in multiple-input-multiple-output (MIMO) communication systems. One LDPC code cons
7617441 Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check November 10, 2009
Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. These constructed LDPC codes can be implemented in multiple-input-multiple-output (MIMO) communication systems. One LDPC code cons
7617439 Algebraic construction of LDPC (Low Density Parity Check) codes with corresponding parity check November 10, 2009
Algebraic method to construct LDPC (Low Density Parity Check) codes with parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. A novel approach is presented by which identity sub-matrices undergo cyclic shifting, thereby generating CSI sub-matrices that are arranged form
7617433 Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices November 10, 2009
Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is decoded processing the columns and rows of the individual sub-matrices of the low density parity check matrix corresponding to the
7617416 System, method, and apparatus for firmware code-coverage in complex system on chip November 10, 2009
Presented herein is a system, method, and apparatus for firmware code-coverage in complex system on chip. A circuit for analyzing code coverage of firmware by test inputs comprises an input and a memory. The input receives an address from a code address bus. The memory stores recorde
7617380 System and method for synchronizing translation lookaside buffer access in a multithread process November 10, 2009
A system and method for synchronizing translation lookaside buffer (TLB) access in a multithread processor is disclosed. When a first exception is found while searching the TLB, the exception is handled. While the exception is handled, thread processors are restricted from requesting
7617342 Universal serial bus dongle device with wireless telephony transceiver and system for use therew November 10, 2009
A universal serial bus (USB) dongle device includes a wireless telephony transceiver that receives an inbound RF signal and that generates inbound data based on the inbound RF signal and receives outbound data and that generates an outbound RF signal in response thereto. A USB plug is
7617291 System and method for supporting TCP out-of-order receive data using generic buffer November 10, 2009
A method and system for handling received out-of-order network data using generic buffers for non-posting TCP applications is disclosed. When incoming out-of-order data is received and there is no application buffer posted, a TCP data placement may notify a TCP reassembler to terminate a
7617096 Robust quantization and inverse quantization using illegal space November 10, 2009
A quantizer for quantization of a vector comprises a codevector generator that generates a set of candidate codevectors and a memory for storing an illegal space definition representing illegal vectors. The quantizer also includes a legal status tester that determines legal candidate
7616955 Method and system for bits and coding assignment utilizing Eigen beamforming with fixed rates fo November 10, 2009
A method and system for bits and coding assignment utilizing Eigen beamforming with fixed rates for a closed loop WLAN is provided. Aspects of the method for communicating information in a communication system may comprise transmitting data via a plurality of radio frequency (RF) cha
7616941 Method and system for improving efficiency over power control for linear and class AB power ampl November 10, 2009
Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA
7616938 Mixer offset cancellation without generating I/Q imbalance November 10, 2009
An offset cancellation scheme in which offset cancellation current is sourced into one differential branch of a driver circuit and sinked from the opposite differential branch. The source/sink arrangement allows for offset cancellation current to be introduced into the circuit, but the
7616931 System and method for reducing phase distortion in a linear transmitter November 10, 2009
The invention decreases phase distortion in a transmitter by balancing C load in the power amplifier input such that a PGA won't have phase distortion.
7616929 Cross-core calibration in a multi-radio system November 10, 2009
A Radio Frequency (RF) transceiver includes a first RF transceiver group, a second RF transceiver group, local oscillation circuitry, and calibration control circuitry. Each of the RF transceiver group has an RF transmitter and an RF receiver. The local oscillation circuitry selectiv
7616725 Signal delay structure in high speed bit stream demultiplexer November 10, 2009
A signal delay structure and method of reducing skew between clock and data signals in a high-speed serial communications interface includes making a global adjustment to the clock signal in the time domain to compensate for a component of the skew that is common between the clock an
7616701 Zero excess bandwidth modulation November 10, 2009
ZEB (zero excess bandwidth) modulation. The modulation rate of a signal is increased to the entirety of a communication channel's available bandwidth. Spectral zeroes at the edges of the available bandwidth now coincide with spectral zeroes at the edges of the Nyquist band and lead t
7616621 Efficient time-division multiplexed addressing protocol November 10, 2009
A method for operating in a network that includes one or more of the following: assigning a respective active member address to each of a plurality of first slave nodes participating in a piconet; receiving a request to join the piconet; determining that no more different active memb
7616620 Method for suppressing silence in voice traffic over a wireless communication medium November 10, 2009
A method and system for increasing the efficiency of providing bandwidth for voice traffic to a data provider via wireless communication mediums is provided. This is generally accomplished by not transmitting any data during the silence periods and playing out background noise (i.e.,
7616414 ESD protection circuit for high speed signaling including T/R switches November 10, 2009
An ESD protection circuit for a transistor having a drain and source coupled to high-speed signaling pins of an integrated circuit includes a first string of clamping elements and a second string of clamping elements. The first string of clamping elements has a collective capacitance
7616144 Resistor ladder interpolation for PGA and DAC November 10, 2009
A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at their respective first
7616069 Method and system for fast PLL close-loop settling after open-loop VCO calibration November 10, 2009
Aspects of a method and system for a fast phase-locked loop (PLL) close-loop settling after an open-loop voltage controlled oscillator (VCO) calibration are provided. A fractional-N PLL synthesizer may comprise a VCO, a phase-frequency detector (PFD), a D flip-flop, a divider, a char
7616068 Frequency synthesizer for integrated circuit radios November 10, 2009
An integrated circuit radio transceiver and method therefor includes capacitive loop filter with selectable capacitive elements that are operable to adjust a signal level provided to a voltage controlled oscillator to control a frequency of an output signal of the oscillator. A plura
7616055 Transmitter apparatus with extended gain control November 10, 2009
A transmitter includes a first variable gain amplifier (VGA) and a second VGA coupled to an output of the first VGA. The first and second VGAs each comprise a plurality of parallel gain stages. Gains of the first and second VGAs are equal to the sum of the gains of the activated parallel
7614024 Method to implement metal fill during integrated circuit design and layout November 3, 2009
Embodiments of the present invention provide a system and method with which to implement metal fill during design using tools such as a place and route tools or layout tools. Unlike prior known solutions where metal fill was performed after design and layout, performing metal fill during
7613351 Video decoder with deblocker within decoding loop November 3, 2009
Methods and systems for processing an encoded video stream are disclosed. Aspects of the method may comprise generating a plurality of temporal or spatial prediction pixels based on mode information within the encoded video stream. A plurality of prediction errors may be generated from a
7613236 Transmit power adjustment based on estimated electrical length of a loop November 3, 2009
A method for estimating electrical length of a loop in a digital subscriber line (DSL) system begins by estimating an electrical length of a loop for each of a plurality signals based on a known power level of the plurality of signals, a known frequency for each of the plurality of s
7613167 Method and system for upstream priority lookup at physical interface November 3, 2009
A traffic prioritization system performs a coarse classification of upstream bursts at the physical interface of a headend communications device. The headend device monitors and controls communications with a plurality of remote communications devices throughout a widely distributed
7613161 System for suppressing silence in voice traffic over a wireless communication medium November 3, 2009
A method and system for increasing the efficiency of providing bandwidth for voice traffic to a data provider via wireless communication mediums is provided. This is generally accomplished by not transmitting any data during the silence periods and playing out background noise (i.e.,
7613133 Method, system and computer program product for processing packets at forwarder interfaces November 3, 2009
A system and method for processing information transport elements, such as ethernet packets, at interfaces to a forwarder. Modules that implement processing logic are allocated per interface and per direction (i.e., inbound or outbound). At any given interface, a series of modules would
7612779 Video data processing circuits and systems comprising programmable blocks or components November 3, 2009
The invention refers to a video data processing system and a video data processing circuit, comprising at least two functional blocks of which at least a first functional block is programmable so that different functions can be provided by said first functional block.
7610603 Multistream video communication with staggered access points October 27, 2009
A system and method that provide reduced latency in a video signal processing system. Various aspects of the present invention may comprise transmitting a first video information stream representative of a unit of video information. For example, the transmitted first video information
7610456 Automatically detecting types of external data flash devices October 27, 2009
Methods for identifying devices may include receiving by one or more memory devices, one or more of a plurality of read memory device ID commands. The one or more memory devices may respond to the received one or more of the plurality of read memory device ID commands. The response m
7610441 Multiple mode content-addressable memory October 27, 2009
According to embodiments of the invention a multi-mode memory device is provided. The memory device includes at least one content-addressable memory (CAM). The memory device further includes a first match-in bus for receiving input into a first CAM of the at least one CAM, wherein the
7610439 Method and system for hardware implementation of resetting an external two-wired EEPROM October 27, 2009
Methods and systems for hardware controlling of an electrically erasable programmable read only memory (EEPROM) are described herein. Aspects of the invention may include generating a clock signal at a frequency suitable for EEPROM operation and resetting an EEPROM utilizing the gene
7610325 System(s), method(s), and apparatus for detecting end of slice groups in a bitstream October 27, 2009
Presented herein are system(s), method(s), and apparatus for detecting end of slice groups in a video bitstream. In one embodiment, there is presented a circuit for extracting a data structure from one or more data words. The circuit comprises a multiplexer, a bit pointer, a first logic
7610271 Method and apparatus for performing a binary search on an expanded tree October 27, 2009
A method and apparatus for searching an electronically stored table of information including a plurality of table entries and facilitating high speed searching of a table to provide a longest matching entry. The table searching method uses at least one memory unit having a table of i
7610198 Robust quantization with efficient WMSE search of a sign-shape codebook using illegal space October 27, 2009
A method of searching a signed codebook to quantize a vector includes weighting a shape codevector in a set of shape codevectors with a weighting function for a Weighted Mean Square Error (WMSE) criteria, to produce a weighted shape codevector. The method further includes correlating
7610149 Downloading map segment(s) to a cell phone based upon its GPS coordinates and mobility October 27, 2009
A wireless terminal displays its location and navigation information (map segment) on its display. The wireless terminal accesses a Global Positioning System (GPS) receiver of the wireless terminal to determine its location coordinates. The wireless terminal determines a maximum data
7610029 Method for active Gm-C filter gain control October 27, 2009
An integrated circuit chip include a transmitter configured for transmitting an electromagnetic signal, a receiver configured for receiving an electromagnetic signal, and an amplifier operatively coupled to the receiver. The amplifier includes a plurality of variable-gain Gm-C filter
7610026 Transmitter non-data-related direct current (DC) offset cancellation scheme October 27, 2009
The present invention provides a transmitter architecture operable to cancel non-data-related direct current (DC) components therein. One method to cancel transmitter non-data-related DC offsets includes generating a baseband digital null signal. Then the digital null signal is conve
7609757 DSL rate adaptation October 27, 2009
A method for enhancing the bit rate and/or margin at which quadrature amplitude modulation (QAM) communication is performed includes the steps of varying a spectral allocation and constellation size with which communication is performed, so as to define a combination of spectral allo
7609747 Radio frequency communication network having adaptive communication parameters October 27, 2009
Improved apparatus for a radio communication network having mobile transceiver units in communication with base transceiver units. The radio communication network is adaptive in that in order to compensate for the wide range of operating conditions, a set of variable network parameters

 
 
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