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Apple Computer, Inc. Patents
Assignee:
Apple Computer, Inc.
Address:
Cupertino, CA
No. of patents:
2106
Patents:




Patent Number Title Of Patent Date Issued
5504747 Economical payload stream routing in a multiple-ring network April 2, 1996
The present invention is directed to a system for routing data between rings. A routing symbol is provided, and as it crosses a bridge, the local target address of the bridge is dropped, and the local source address of the bridge node (in the far side ring) is added to the routing symbol
5504652 Unitary heat sink for integrated circuits April 2, 1996
A unitary heat sink including a planar contact portion for contacting the top of an IC. The heat sink is constructed from a material having a thermal conductivity of at least 150 watts per meter Degree Kelvin (W/m.degree.K.) but preferably is constructed from aluminum having a conduc
5504458 CMOS class AB amplifier for driving capacitive and resistive loads April 2, 1996
The class AB amplifier is configured to provide low quiescent current while achieving high internal switching rates. The buffer is connected to a large external capacitance which provides external compensation. The amplifier includes an input stage which converts differential voltages to
5502663 Digital filter having independent damping and frequency parameters March 26, 1996
A filter capable of having its damping and frequency parameters independently varied. The filter can be represented in either a digital or an analog computation network. The network comprises four multipliers for multiplying by a frequency term twice and a damping factor twice. In ad
5500937 Method and apparatus for editing an inked object while simultaneously displaying its recognized March 19, 1996
A method and apparatus for manipulating inked objects in a computer system includes the steps of displaying a first recognized object on a computer screen and displaying a first ink object on the screen which was previously recognized as the first recognized object. The first ink object
5500924 Method for vector plotting a bitmap with a reduced number of lines March 19, 1996
From a matrix of elements representing an image, coordinates of each end of lines in a parallel array are generated. The lines in the array join adjacent elements in the same binary state. The coordinates are communicated to a vector graphics device which draws the array of parallel
5500827 Method and apparatus for improved DRAM refresh operation March 19, 1996
The present invention facilitates the Dynamic Random Access Memory (DRAM) refresh function in a less obtrusive manner than in the prior art. The present invention facilitates the refresh function during idle time when the DRAM is not busy handling read or write transactions. If insuffici
5497436 System and method for bit-masked color signal scaling March 5, 1996
A system for bit-masked color signal scaling comprises a processing unit, a display device, and a memory wherein a scaling unit, an image memory, a multiplication image memory, an approximation image memory, an approximation multiplication image memory, and a scaled image memory resi
5497422 Message protection mechanism and graphical user interface therefor March 5, 1996
A digitally signed message, protected with a chain of certificates from the sender's immediate certifier up through an ultimate certifier, is transmitted to a recipient together with the entire certificate chain. The entire certificate chain is stored in a single signer file accessible b
5496106 System and method for generating a contrast overlay as a focus assist for an imaging device March 5, 1996
A system for generating and displaying a contrast false color overlay as a focus assist includes a signal divider, an automatic gain control unit, an adder, a signal reducer and a signal combiner. The signal divider receives a signal representing an image and divides the signal into a re
5495592 System for finding and setting address portion of variable-length character string by XOR-ing po February 27, 1996
The invention is an instruction for locating the address of a specific character or value within a byte string of variable length. An offset into a portion of the string is specified and the portion of the string is searched for a first occurrence of the specific character beginning at t
5495481 Method and apparatus for accelerating arbitration in a serial bus by detection of acknowledge pa February 27, 1996
Methods and circuitry for arbitrating for control of a serial bus are described. According to one embodiment, one or more nodes of a serial bus are provided with a mechanism for discriminating between data packets and acknowledge packets. If a packet transmitted, repeated, or received by
5495246 Telecom adapter for interfacing computing devices to the analog telephone network February 27, 1996
A telecommunications adapter interfaces computing devices to the analog telephone network, achieving a tightly integrated digital telecommunications link with the analog telephone network. The telecommunications adapter takes advantage of certain host resources including, preferably,
5493666 Memory architecture using page mode writes and single level write buffering February 20, 1996
A memory architecture including a memory cache which uses a single level of write buffering in combination with page mode writes to attain zero wait state operation for most memory accesses by a microprocessor. By the use of such a memory architecture, the speed advantages of more expens
5493657 High speed dominant mode bus for differential signals February 20, 1996
A bus circuit for implementing a high speed dominant logic bus for a differential signal. The bus circuit is useful in a communication network having a plurality of multi-port nodes that are coupled by point-to-point links that communicate differential signals. Each port in the node
5493636 System and method for shading graphic images using an accessibility factor to simulate tarnish a February 20, 1996
A system for shading graphic images for realistic rendering representative of tarnish accumulation has a display device, a central processing unit, an input device, and a memory means. The memory includes image components, shading routines, accessibility routines, display routines, and a
5493570 End of packet detector and resynchronizer for serial data buses February 20, 1996
An interface device for a point-to-point connected serial bus in which bus clock and bus data transmissions on the bus cease between transmissions of packets of data, includes a low latency resynchronizing circuit and an end of packet detector which is independent of control data within
5491477 Anti-rotation mechanism for direct manipulation position input controller for computer February 13, 1996
An apparatus for inputting and controlling the position of a pointer on a computer screen without permitting any rotation of the apparatus relative to the marker is described. The apparatus comprises a pantagraph device, namely a plate, connect by two arms to a gripable element, and by a
5490234 Waveform blending technique for text-to-speech system February 6, 1996
A concatenator for a first digital frame with a second digital frame, such as the ending and beginning of adjacent diphone strings being concatenated to form speech is based on determining an optimum blend point for the first and second digital frames in response to the magnitudes of sam
5490053 Methods and apparatus for auxiliary trickle power supply February 6, 1996
Circuit arrangements and methods are disclosed for providing trickle voltages and currents when a main power supply is unavailable or, alternatively, for providing auxiliary power. In one embodiment, a trickle power supply consists of a bilaterally conducting semiconductor diode devi
5489920 Method for determining the optimum angle for displaying a line on raster output devices February 6, 1996
The present invention is a method for determining the optimum angle for displaying a line on raster output devices. The preferred embodiment defines the possible adjustments of a line as it is being displayed at a raster resolution as a penalty which comprises of a weighted sum of a
5488685 Method and apparatus for providing visual cues in a graphic user interface January 30, 1996
A user interface includes an object oriented graphic user interface having overlapping windows and provides an access window having topics, index and look for button functions for selection by a user. Through the use of the topics, index or look for functions, a help inquiry is defined.
5487054 Method and apparatus for setting a clock in a computer system January 23, 1996
A method for resetting a real-time clock of a pen-based computer system characterized by the steps of: displaying an image of an analog clock face with an hour hand and a minute hand on the screen of a pen-based computer system; determining whether a clock-setting stroke has been made wi
5486929 Time division multiplexed video recording and playback system January 23, 1996
A system and method for recording video signals onto analog magnetic tape, and for the playback of those recorded signals. Such a system includes a digital luminance signal generator, a first digital chrominance signal, and a second digital chrominance signal compatible with a predetermi
5485578 Topology discovery in a multiple-ring network January 16, 1996
The present invention is a system for discovering the topology of a network. A source node may issue ping symbols that are addressed to specific, potentially existing, target nodes. An echo symbol is always returned. The type of ping symbol determines over how many bridges the ping s
5485550 Method and apparatus for fuzzy logic rule execution January 16, 1996
A fuzzy logic system for processing a vector of signals includes a rule partition table stored in an electronic memory, a rule identifier, and a rule processor. The rule partition table is organized to include identifiers, each corresponding to a unique combination of partitions of s
5485488 Circuit and method for twisted pair current source driver January 16, 1996
A mechanism and method for efficiently communicating information regarding particular communication rate ("speed signal") between two or more communication stations (of a communication network). The transmitter operates on the IEEE P1394 High Performance Serial Bus to supply both dif
5485458 Bus interconnect circuit including port control logic for a multiple node communication network January 16, 1996
A bus interconnect device including port control logic for a communication network having a plurality of multi-port nodes that are connected with point-to-point links. Each node includes a transceiver, turn around logic that controls the transceiver, and a dominant logic physical bus tha
5485076 High efficiency auxiliary switching power supplies January 16, 1996
Method and apparatus for producing an auxiliary voltage in a switching power supply. One or more auxiliary windings are coupled to the main inductor of the switching power supply. A synchronous switch is used in conjunction with the auxiliary winding to provide rectification and addi
5483656 System for managing power consumption of devices coupled to a common bus January 9, 1996
The power management system tracks the total amount of power drawn from a bus by devices connected to the bus and to the bus itself, based on the individual operational status of each device. The power manager system also tracks the total amount of power supplied to the bus. From this
5483655 Method for extended file access January 9, 1996
A method of extended file access that allows a program running on a computer to access file types, beyond the "standard" file types whose formats have been pre-defined to the operating system, by placing the extended file data in a range of addresses outside the range of addresses of
5481743 Minimal instruction set computer architecture and multiple instruction issue method January 2, 1996
A minimal instruction set computer architecture (hyperscalar computer architecture) comprises a central memory, an instruction buffer, a control unit, an I/O control unit, a plurality of functional units, a plurality of register files, and a data router. In the hyperscalar computer a
5481739 Vector quantization using thresholds January 2, 1996
Methods and apparatus for vector quantization. A threshold generator generates an i threshold (Threshold.sub.i) to be associated with each i quantized vector of n quantized vectors in a vector quantization codebook. The vector quantization codebook and the thresholds are used by a vector
5481735 Method for modifying packets that meet a particular criteria as the packets pass between two lay January 2, 1996
A method and apparatus in a computer system coupled to a network for altering information in said network by the computer system. A process is inserted between two lower layers of the ISO/OSI model. The process then receives a packet from a first layer of the ISO/OSI model, and determine
5481713 Method and apparatus for patching code residing on a read only memory device January 2, 1996
A method and apparatus for generating patching resources in an information processing system having operating instructions on a Read Only Memory Device. The present invention simplifies the patch generation and installation processes. A patch resource is generated and used by a patch
5479602 Content-based depictions of computer icons December 26, 1995
A means and method for generating and displaying a contentbased depiction of a standard icon on the display of a computer is described. The depiction is generated upon the occurrence of predetermined events, such as the closure of the document or file associated with the icon, and is
5479596 Method and apparatus for formatting paragraphs December 26, 1995
A method for formatting paragraphs on a screen of a computer system including the steps of: a) entering a word on a screen of a computer system using a pointing mechanism; b) finding an associated paragraph, if any, that the word is to be associated with; c) adding the word to the as
5473762 Method and system for pipelining bus requests December 5, 1995
A system for pipelining bus requests includes a bus, at least one node coupled to the bus, and a bus coordinator coupled to the node. The node uses a single bus request signal to both request control of the bus from the bus coordinator, and to retain control of the bus. In response to an
5473759 Sound analysis and resynthesis using correlograms December 5, 1995
A system for reconstructing a signal waveform from a correlogram is based upon the recognition that the information in each channel of the correlogram is equivalent to the magnitude of the Fourier transform of a signal. By estimating a signal on the basis of its Short-Time Fourier Tr
5473264 Methods and apparatus for electrically terminating a high speed communications pathway December 5, 1995
A circuit arrangement and methods for sensing whether line terminator devices are present at terminal ends of high speed communications pathways, and enabling a switching terminator in accordance therewith, are disclosed. In one embodiment, the communications pathway comprises a Small
5471573 Optimized scan conversion of outlines for generating raster images November 28, 1995
An arbitrary curve formulated as a quadratic B-spline with a plurality of second order Bezier curves is approximated. Applying a forward differencing to the parametric equation of the second degree Bezier curves, a second order difference coefficient is derived. By defining the error
5471503 Scanning method for receiving a transmission in a communication system with slow frequency hoppi November 28, 1995
A scanning method for receiving a signal in a frequency hopped communication system that transmits a packet having N segments that are encoded with an error correction code that allows recovery of a packet even if e segments are erasures. A receiving station continuously scans the fi
5469692 Methods for configuring, packaging and reconfiguring personal computers November 28, 1995
Housings for personal computers are assembled at a first site and then shipped in bulk to one or more configuring sites. At the configuring sites, electrical components are inserted into the housing, and the thus-configured computers are packaged in individual containers, along with
5469540 Method and apparatus for generating and displaying multiple simultaneously-active windows November 21, 1995
The display system includes at least one central processing unit (CPU) which is coupled through appropriate input/output (I/O) circuitry to input devices, such as a keyboard, digital pad, mouse and/or trackball. The CPU is coupled to a hard disk drive for the storage of programs and data
5469435 Bus deadlock avoidance during master split-transactions November 21, 1995
Signal transactions are conducted between nodes coupled to a bus, without causing bus deadlock during split transactions. Deadlock avoidance is achieved by rendering a node effectively unavailable at such times to serve as a bus slave for a new bus master. When the "locking" node serves
5469194 Apparatus and method for providing different input device orientations of a computer system November 21, 1995
In a computer system having an input device for controlling a position of a cursor on a display screen, a method of compensating for a physical orientation of the input device relative to the display screen. Initially, the physical orientation of the input device in relation to the displ
5469190 Apparatus for converting twenty-four bit color to fifteen bit color in a computer output display November 21, 1995
Apparatus for converting representations of color pixels in a twenty-four bit color format to representations in a fifteen bit color format including an individual circuit for data representing each component of a color, each of the individual circuits including apparatus for selectively
5468920 Printed circuit board having raised conductor pads November 21, 1995
A printed circuit board is installable into a slot of a cardedge connector such that contacts of the connector ride along electrically conductive, raised pads of the card. Each pad includes frontal edge segments which are inclined generally rearwardly toward a center axis of the pad so t
5467464 Adaptive clock skew and duty cycle compensation for a serial data bus November 14, 1995
The de-skewer utilizes a delay line to generate a set of delayed versions of an input clock signal. A bank of flip-flops compares pulses within the delayed clock signals to a synchronization pulse provided within an input data signal. A detector receives outputs from the flip-flops and s
5467087 High speed lossless data compression system November 14, 1995
A data compression process and system that identifies the data type of an input data stream and then selects in response to the identified data type at least one data compression method from a set of data compression methods that provides an optimal compression ratio for that particular

 
 
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