| Patent Number |
Title Of Patent |
Date Issued |
| 6143981 |
Plastic integrated circuit package and method and leadframe for making the package |
November 7, 2000 |
| Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad |
| 6143588 |
Method of making an integrated circuit package employing a transparent encapsulant |
November 7, 2000 |
| A method of making an integrated circuit package for EPROM, CCD, and other optical integrated circuit devices is disclosed. First, a substrate base having metallized vias extending there through is provided. Second, an integrated circuit die is affixed to a first surface of the substrate |
| 6132081 |
Method for calibrating optical sensor used to measure the temperature of a substrate during rapi |
October 17, 2000 |
| The present invention provides a method of forming titanium silicide by subjecting a silicon substrate having titanium formed thereon to a thermal process, such as rapid thermal process. The silicon substrate and the titanium are being heated to at least a selected annealing temperature, |
| 6124637 |
Carrier strip and molded flex circuit ball grid array and method of making |
September 26, 2000 |
| A grid array assembly method and apparatus uses a flex circuitry substrate and includes providing a series of conforming flex circuitry substrates, the flex circuitry substrates include bonding pads and metallization on a first surface and, holes in the substrate which define a contact p |
| 6117705 |
Method of making integrated circuit package having adhesive bead supporting planar lid above pla |
September 12, 2000 |
| A package for an integrated circuit is described, as are methods of making the package. The package includes a substrate having a generally planar first surface on which a metal die pad is formed. An integrated circuit die is attached to the metal die pad. An adhesive head surrounds the |
| 6117193 |
Optical sensor array mounting and alignment |
September 12, 2000 |
| A method and apparatus for mounting an optical sensor to, and in optical alignment with, a lens or other imaging-forming element of an optical device includes attaching a fixture to the lens, the fixture having mounting features located thereon at predetermined positions measured rel |
| 6092281 |
Electromagnetic interference shield driver and method |
July 25, 2000 |
| A package for a device includes a substrate having a common voltage plane and a mounting region. The device is mounted to the mounting region. An electrically conductive dam structure is disposed on the upper surface of the substrate circumscribing the perimeter of the mounting region. T |
| 6091141 |
Bump chip scale semiconductor package |
July 18, 2000 |
| A bump chip scale semiconductor package. In the bump chip scale semiconductor package, the chip bumps are directly formed on the chip pads of a semiconductor chip. The above chip bumps are used as the signal input and output terminals of the package and are used as surface mounting j |
| 6090715 |
Masking process for forming self-aligned dual wells or self-aligned field-doping regions |
July 18, 2000 |
| A masking process for forming first and second ion-doped regions on a substrate of a semiconductor device. An oxide layer and a first nitride layer are formed on the substrate in order. The first nitride layer is etched using a photolithography process to form a first predetermined p |
| 6034429 |
Integrated circuit package |
March 7, 2000 |
| A package for an integrated circuit is described, as is a method of making the package. The package is comprised of a substrate having a substantially planar first surface on which an integrated circuit die is placed. An imperforate adhesive bead on the first surface of the substrate |
| 6028354 |
Microelectronic device package having a heat sink structure for increasing the thermal conductiv |
February 22, 2000 |
| A thermally enhanced package for an integrated circuit, the integrated circuit having a surface with bond pads formed thereon, includes a heat sink structure attached to a central region of the integrated circuit surface inward of the bond pads. The package further includes a substrate |
| 6020218 |
Method of manufacturing ball grid array semiconductor package |
February 1, 2000 |
| Provided with a method of manufacturing a ball grid array semiconductor package using a flexible circuit board strip, which is directed to prevent minute conductive traces in the outer part of a circuit pattern formed in the flexible circuit board and thus minimize the short-circuits by |
| 6013554 |
Method for fabricating an LDD MOS transistor |
January 11, 2000 |
| A method for fabricating an LDD MOS transistor includes the steps of forming a gate conductor on a gate oxide layer formed on a substrate, forming a heavily doped source/drain region in the substrate using the gate conductor as a mask, thermally oxidizing the surface of the gate cond |
| 5985695 |
Method of making a molded flex circuit ball grid array |
November 16, 1999 |
| A grid array assembly method uses a flex circuitry substrate and includes providing a series of conforming flex circuitry substrates, the flex circuitry substrates include bonding pads and metallization on a first surface and, holes or vias in the substrate which define a contact pad |
| 5981314 |
Near chip size integrated circuit package |
November 9, 1999 |
| A plurality of integrated circuit chip (IC chip) packages are fabricated simultaneously from a single insulating substrate having sections. In each section, an IC chip is attached. Bonding pads on the IC chip are electrically connected to first metallizations on a substrate first sur |
| 5977624 |
Semiconductor package and assembly for fabricating the same |
November 2, 1999 |
| A chip size semiconductor package with a light, thin, simple and compact structure having a reduced size of its semiconductor chip while having an increased number of pins and without degrading its functions. For the package, it is possible to use either the semiconductor chip having bon |
| 5971734 |
Mold for ball grid array semiconductor package |
October 26, 1999 |
| A mold for BGA semiconductor packages which includes a height adjusting member adapted to adjust the height of the top cavity insert of the top mold or the bottom cavity insert of the bottom mold, an elastic member disposed between the height adjusting member and associated insert, c |
| 5962810 |
Integrated circuit package employing a transparent encapsulant |
October 5, 1999 |
| An integrated circuit package for EPROM, CCD, and other optical integrated circuit devices has a substrate base having metallized vias extending there through. An integrated circuit die is affixed to a first surface of the substrate, and is electrically connected to the metallized vias. |
| 5953589 |
Ball grid array semiconductor package with solder balls fused on printed circuit board and metho |
September 14, 1999 |
| A ball grid array semiconductor package using a flexible circuit board, in which the flexible circuit board has no conductive via hole nor solder mask while having a thin structure formed at only one surface thereof with a circuit pattern having a small length. The flexible circuit board |
| 5950074 |
Method of making an integrated circuit package |
September 7, 1999 |
| A package for an integrated circuit is described, as is a method of making the package. An exemplary method of making a package for an integrated circuit die includes a first step of providing an insulating substrate having a substantially planar first surface. A conductive path extends |
| 5949655 |
Mounting having an aperture cover with adhesive locking feature for flip chip optical integrated |
September 7, 1999 |
| A mounting for a flip chip integrated circuit device having a light sensitive cell is disclosed. The mounting includes an insulating substrate having an aperture between its first and second surfaces. A flip chip integrated circuit device is placed on the first surface of the substrate. |
| 5939784 |
Shielded surface acoustical wave package |
August 17, 1999 |
| A package for surface acoustical wave (SAW) device includes an electrically insulative substrate having a first surface with an electrically conductive layer formed thereon. A first surface of the SAW device is attached to the electrically conductive layer. An electrically conductive |
| 5908317 |
Method of forming chip bumps of bump chip scale semiconductor package |
June 1, 1999 |
| A method of forming chip bumps of a bump chip scale semiconductor package, such a package and a chip bump are disclosed. In the bump chip scale semiconductor package produced by the above method, the chip bumps are directly formed on the chip pads of a semiconductor chip. The above chip |
| 5905633 |
Ball grid array semiconductor package using a metal carrier ring as a heat spreader |
May 18, 1999 |
| A ball grid array semiconductor package includes a semiconductor chip mounted to the top side of a printed circuit board (PCB), having a copper circuit pattern at a position outside a chip mounting zone. A plurality of bond wires electrically connect the chip to the copper circuit patter |
| 5897334 |
Method for reproducing printed circuit boards for semiconductor packages including poor quality |
April 27, 1999 |
| A method for reproducing a PCB strip for semiconductor packages, wherein a poor quality PCB unit included in the PCB strip is replaced with a normal quality one, thereby achieving a reduction in the amount of package materials used and an improvement in the process efficiency. The invent |
| 5872399 |
Solder ball land metal structure of ball grid semiconductor package |
February 16, 1999 |
| A solder ball land metal structure of a ball grid array semiconductor package capable of obtaining a maximum contact area between a solder ball land metal element and a solder ball fused on the land metal element. A solder mask defined type land metal structure according to the present |
| 5867368 |
Mounting for a semiconductor integrated circuit device |
February 2, 1999 |
| A mounting for a semiconductor integrated circuit device, such as a charge coupled device ("CCD") or an erasable programmable read only memory device ("EPROM"), includes an insulating substrate having an aperture between its first and second surfaces. A first surface of the integrated ci |
| 5866939 |
Lead end grid array semiconductor package |
February 2, 1999 |
| The invention relates to a grid array type lead frame having a plurality of leads classified into groups by length forming a lead end grid array semiconductor package. The leads extend to respective lead ends, in each of which at least one different plane direction-converting lead part |
| 5859475 |
Carrier strip and molded flex circuit ball grid array |
January 12, 1999 |
| A grid array assembly method and apparatus uses a flex circuitry substrate and includes providing a series of conforming flex circuitry substrates, the flex circuitry substrates include bonding pads and metallization on a first surface and, holes in the substrate which define a contact p |
| 5858815 |
Semiconductor package and method for fabricating the same |
January 12, 1999 |
| A process for manufacturing chip size semiconductor package with a light, thin, and compact structure having a reduced size of its semiconductor chip while having an increased number of pins For the package, it is possible to use either the semiconductor chip having bond pads arranged on |
| 5858149 |
Process for bonding semiconductor chip |
January 12, 1999 |
| An improved process for bonding a semiconductor chip to a substrate is disclosed. In the process, a gold bump is formed on an aluminum bond pad of the chip thus forming a flip chip. A screen with an opening is placed on the substrate prior to dotting insulating epoxy on the opening. The |
| 5854511 |
Semiconductor package including heat sink with layered conductive plate and non-conductive tape |
December 29, 1998 |
| A semiconductor package provided with a heat sink adapted to discharge heat from the package. The package has an oxidation film formed on an upper surface portion of the heat sink to which a semiconductor chip is attached, thereby improving the bonding between the semiconductor chip and |
| 5796163 |
Solder ball joint |
August 18, 1998 |
| An improved interconnection ball joint for a ball grid array integrated circuit package includes a substrate base having a first surface to which an integrated circuit die is affixed, and an opposite second surface. A metallized via extends through the substrate. The via has a central ho |
| 5795818 |
Integrated circuit chip to substrate interconnection and method |
August 18, 1998 |
| An interconnection between bonding pads on an integrated circuit chip and corresponding bonding contacts on a substrate are formed. To form the interconnection, a metallization is formed on each of the substrate bonding contacts. Metal ball bond bumps are formed on selective ones of |
