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Amkor Technology, Inc. Patents
Assignee:
Amkor Technology, Inc.
Address:
Chandler, AZ
No. of patents:
602
Patents:


1 2 3 4 5 6 7 8 9 10 11 12 13










Patent Number Title Of Patent Date Issued
6441485 Apparatus for electrically mounting an electronic device to a substrate without soldering August 27, 2002
An apparatus for mounting an electronic device on a substrate without soldering is disclosed. The apparatus includes a body and a plurality of cantilever beams extending from the body. The apparatus is mounted on the substrate. The electronic device is placed within the apparatus. In one
6437449 Making semiconductor devices having stacked dies with biased back surfaces August 20, 2002
A semiconductor device has multiple, stacked dies in which the back surfaces of each die can be biased to the same or a different electrical potential. The device includes a substrate having a plurality of electrically conductive leads arrayed around an electrically conductive die-mo
6437427 Lead frame used for the fabrication of semiconductor packages and semiconductor package fabricat August 20, 2002
A lead frame for a semiconductor package including a rectangular lead frame body having a central opening, a plurality of leads arranged at and along each of two or four facing sides of the lead frame body, the leads extending in flush with the lead frame body, and a semiconductor chip
6433277 Plastic integrated circuit package and method and leadframe for making the package August 13, 2002
Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad
6432737 Method for forming a flip chip pressure sensor die package August 13, 2002
A plurality of pressure sensor dice are attached to an array of pressure sensor die attach sites located on a custom substrate having holes. The pressure sensor dice are then electrically connected to the pressure sensor die attach sites using standard flip chip techniques.The resulting
6429515 Long wire IC package August 6, 2002
An encapsulated integrated circuit package includes a large number of traces spaced a significant distance from the integrated circuit. Bond pads of the integrated circuit are electrically connected to corresponding traces by corresponding long wires. Since the long wires are interme
6429513 Active heat sink for cooling a semiconductor chip August 6, 2002
Semiconductor packages and other electronic assemblies having an active heat sink are disclosed, along with methods of making the same. The active heat sink includes a cavity partially filled with a heat activated liquid. Heat generated during operation of a chip boils the heat activated
6428641 Method for laminating circuit pattern tape on semiconductor wafer August 6, 2002
A method for laminating a circuit pattern tape over a wafer, involving the steps of preparing a circuit pattern tape formed with an adhesive layer, along with a wafer, detecting at least one reference position of the prepared circuit pattern tape and at least one reference position of th
6426277 Methods and a device for heat treating a semiconductor wafer having different kinds of impuritie July 30, 2002
A method and a device for locally heating a semiconductor wafer having a first region of a first impurity and a second region of a second impurity having a diffusion rate different from that of the first impurity. A field oxide layer, a P well and an N well, gate oxide layers, gate elect
6424315 Semiconductor chip having a radio-frequency identification transceiver July 23, 2002
A miniature radio-frequency identification (RFID) transceiver and a method for making the same are provided. The RFID transceiver is small in size and physically rugged. The RFID transceiver includes an integrated circuit and a radio-frequency antenna that is fixed to the integrated circ
6424031 Stackable package with heat sink July 23, 2002
A stackable package for an integrated circuit (e.g., a flip chip) is disclosed. The package includes a molded plastic package body having a first side, an opposite second side, and side surfaces extending vertically between the first and second sides. A plurality of leads extend from
6424023 Leadframe for molded semiconductor package and semiconductor package made using the leadframe July 23, 2002
A leadframe and molded semiconductor package made using the leadframe are disclosed. The leadframe includes leads extending from a dam bar toward a central chip mounting region. A pseudo tie bar extends diagonally from three of the four corners of the dam bar toward the chip mounting reg
6423576 Microelectronic device package having a heat sink structure for increasing the thermal conductiv July 23, 2002
A thermally enhanced package for an integrated circuit, the integrated circuit having a surface with bond pads formed thereon, includes a heat sink structure attached to a central region of the integrated circuit surface inward of the bond pads. The package further includes a substrate
6420776 Structure including electronic components singulated using laser cutting July 16, 2002
A structure comprises a substrate with electronic components formed on a first surface of the substrate. The structure includes a scribe line on a first surface of the substrate. The structure includes a trench formed by a laser on the second or back-side surface of the substrate, thus
6420204 Method of making a plastic package for an optical integrated circuit device July 16, 2002
A method of making a package for an integrated circuit device having an optical cell is disclosed. The package includes a base of molded encapsulant material. A metal leadframe is embedded in the plastic base at the upper surface of the base. Encapsulant material covers the lower and
6420201 Method for forming a bond wire pressure sensor die package July 16, 2002
A plurality of pressure sensor dice are attached to an array of pressure sensor die attach sites located on a substrate. The pressure sensor dice are then electrically connected to the pressure sensor die attach sites using standard wire bond techniques.The resulting array of pressure se
6417576 Method and apparatus for attaching multiple metal components to integrated circuit modules July 9, 2002
Apparatus for attaching multiple metal components to integrated circuit modules reduces manufacturing time for module assemblies having metal shields and/or heat sinks that must be applied to multiple modules within a manufacturing assembly. The metal components are manufactured in an
6415505 Micromachine package fabrication method July 9, 2002
Micromachine chips are tested for validity while the micromachine chips are still in wafer form. Any defective micromachine chips are marked or otherwise identified. Coupons are attached to the micromachine chips. The coupons are attached only to the micromachine chips which have been te
6414396 Package for stacked integrated circuits July 2, 2002
Embodiments of integrated circuit packages for housing a plurality of integrated circuits are disclosed, along with methods of making the packages. One integrated circuit package comprises a substrate having a first surface having first metallizations thereon, an opposite second surf
6407458 Moisture-resistant integrated circuit chip package and method June 18, 2002
A novel, moisture-resistant integrated circuit chip package is disclosed. In one embodiment, the integrated circuit chip package includes a substrate having a chip side and a backside. A first conductive layer is formed on the chip side of the substrate, and has a pattern forming con
6407381 Wafer scale image sensor package June 18, 2002
An image sensor package includes an image sensor having bond pads and an active area on an upper surface of the image sensor. The image sensor package further includes a window support on the upper surface of the image sensor. The window support entirely encloses the upper surface in
6406934 Wafer level production of chip size semiconductor packages June 18, 2002
The invention provides a manufacturing process for making chip-size semi-conductor packages ("CSPs") at the wafer-level without the added size, cost, and complexity of substrates in the packages or the need to overmold them with plastic. One embodiment of the method includes the prov
6404046 Module of stacked integrated circuit packages including an interposer June 11, 2002
A module of electrically interconnected integrated circuit packages and methods of making the module are disclosed. The module includes at least first and second integrated circuit packages, each of which are comprised of a package body formed of an encapsulant material. A plurality of l
6400033 Reinforcing solder connections of electronic devices June 4, 2002
A method and apparatus for reinforcing the solder connections between a semiconductor device and a substrate includes the provision of a rigid frame having a central opening through it, a planar top surface, a bottom surface opposite and parallel to the top surface, and a thickness betwe
6399463 Method of singulation using laser cutting June 4, 2002
A wafer is singulated from the back-side surface of the wafer using laser ablation, thus protecting the front-side surface of the wafer and, more particularly, the integrated circuits and/or functional units on the front-side surface. Since, according to the invention, no saw blade is
6399418 Method for forming a reduced thickness packaged electronic device June 4, 2002
An electronic device, such as a sensor die, is packaged by first forming a hole through a substrate. The hole is made large enough to position the entire electronic device within the hole. A tape is then applied to the second surface of the substrate to cover a second side of the hole,
6396130 Semiconductor package having multiple dies with independently biased back surfaces May 28, 2002
A thin, thermally efficient, lead frame-type of semiconductor package incorporating multiple dies includes a plurality of electrically conductive leads held together in a spaced, planar relationship about a central opening defined by the leads, and a plurality of thick, plate-like he
6396043 Thin image sensor package fabrication method May 28, 2002
A thin image sensor package includes an image sensor having an active area which is responsive to radiation. The image sensor is mounted to a substrate which is transparent to the radiation. The image sensor is mounted such that the active area of the image sensor faces the substrate.
6395578 Semiconductor package and method for fabricating the same May 28, 2002
Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed. An embodiment of a semiconductor package includes a semiconductor chip having a first
6389689 Method of fabricating semiconductor package May 21, 2002
A method of fabricating a semiconductor package is provided, which realizes a small-size semiconductor package without performance deterioration, to meet a tendency to miniaturization of electronic products in which semiconductor packages are mounted, such as communication apparatus and
6389687 Method of fabricating image sensor packages in an array May 21, 2002
Image sensor packages are fabricated simultaneously to minimize the cost associated with each individual image sensor package. To fabricate the image sensor packages, windows are molded in molding compound to form a molded window array. A substrate includes a plurality of individual
6372540 Moisture-resistant integrated circuit chip package and method April 16, 2002
A novel, moisture-resistant integrated circuit chip package is disclosed. In one embodiment, the integrated circuit chip package includes a rigid substrate having a chip side and a backside. A first conductive layer is formed on the chip side of the substrate, and has a pattern forming
6369454 Semiconductor package and method for fabricating the same April 9, 2002
A semiconductor package and a method of making the package are disclosed. The package includes a semiconductor chip having first surface with a conductive pad thereon. A first end of a bond wire is connected to each of the pads. Encapsulant covers the fist surface of the chip, the pads,
6356453 Electronic package having flip chip integrated circuit and passive chip component March 12, 2002
A package includes both a flip chip mounted active Chip component and a passive chip component. The flip chip bumps between the bond pads of the active chip component and the substrate are low impedance. Further, by mounting the active chip component as a flip chip, the area on the s
6342406 Flip chip on glass image sensor package fabrication method January 29, 2002
Electrically conductive interior traces and exterior traces are formed on interior and exterior surfaces, respectively, of a window. The interior traces are electrically connected to the exterior traces by electrically conductive vias extending through the window. To mount the window to
6340846 Making semiconductor packages with stacked dies and reinforced wire bonds January 22, 2002
This invention provides a method for making a semiconductor package with stacked dies that substantially reduces risk of fracturing of the dies and prevents breakage of the wire bonds caused by wire sweep. One embodiment of the method includes the provision of a substrate and a pair of
6340623 Method of fabricating semiconductor device January 22, 2002
In a method of fabricating a semiconductor device, a plurality of MOS devices are formed on a semiconductor substrate each with a source, a drain, and a gate electrode. A first insulating layer is formed on the semiconductor substrate with the MOS devices. A moat pattern is formed on
6339252 Electronic device package and leadframe January 15, 2002
The present invention includes a package for housing an integrated circuit device. The present invention also includes leadframes and methods for making such packages. In one embodiment, the package includes an integrated circuit device on a metal die pad. A metal ring is between the
6339004 Method of forming shallow trench isolation for preventing torn oxide January 15, 2002
A method of forming a trench for semiconductor device isolation includes the steps of making a trench at a device isolation area of a silicon wafer by etching the silicon wafer and within through a mask pattern, forming a liner oxide on the silicon wafer with the trench through thermal
6338985 Making chip size semiconductor packages January 15, 2002
A method for making low cost chip size semiconductor packages ("CSPs") includes preparing a substrate having a first surface with metal pads and lands thereon, and an opposite second surface having openings in it through which the lands are exposed. A solder mask is formed over the f
6337228 Low-cost printed circuit board with integral heat sink for semiconductor package January 8, 2002
A low-cost printed circuit board for a semiconductor package having the footprint of a ball grid array package has an integral heat sink, or "slug," for the mounting of one or more semiconductor chips, capable of efficiently conducting away at least five watts from the package in typ
6331451 Methods of making thin integrated circuit device packages with improved thermal performance and December 18, 2001
Methods of making integrated circuit device packages and substrates for making the packages are disclosed. An embodiment of a method of making a substrate includes providing an unpatterned sheet of polyimide material having a first surface and an opposite second surface. A planar metal
6329606 Grid array assembly of circuit boards with singulation grooves December 11, 2001
A grid array assembly is provided employing a thin copper or steel carrier frame having apertures extending longitudinally of the frame. A series of semi-flexible substrate printed circuit boards are mounted in seriatim to peripheral edges of the apertures, the circuit boards including b
6326235 Long wire IC package fabrication method December 4, 2001
A method of forming an encapsulated integrated circuit package includes forming a large number of traces spaced a significant distance from the integrated circuit. Intermediate bonding pads are formed between the integrated circuit and the traces. Bond pads of the integrated circuit are
6320251 Stackable package for an integrated circuit November 20, 2001
Package embodiments for integrated circuits or other electronic devices are disclosed, along with methods of making and interconnecting the packages. The packages include a package body formed of molded encapsulant. Leads extend from a first end that is embedded at a lower surface of the
6319755 Conductive strap attachment process that allows electrical connector between an integrated circu November 20, 2001
A method of making an integrated circuit package is disclosed. A conductive first adhesive is applied onto a leadframe pad of a leadframe. A conductive second adhesive is applied on an input portion of the leadframe, such as a leadframe member that is integral with inner portions of
6309943 Precision marking and singulation method October 30, 2001
A method includes identifying and determining a position of a scribe grid on a front-side surface of a wafer with a camera. Based on this information, a laser is fired to form an alignment mark on the back-side surface of the wafer. Advantageously, the alignment mark is positioned wi
6309916 Method of molding plastic semiconductor packages October 30, 2001
In the manufacture of semiconductor packages having molded plastic bodies, the plating of all of the surfaces of the molding tool that comes into contact with the molten resin during molding with a nodular thin dense chromium ("NTDC") coating prevents the surfaces from adhering to the
6303997 Thin, stackable semiconductor packages October 16, 2001
A thin, stackable semiconductor package having improved electrical and heat dissipating performance comprises a semiconductor chip having an integrated circuit and a plurality of input/output pads on a surface thereof. A lead frame having a plurality of inner leads with upper and a l
6291884 Chip-size semiconductor packages September 18, 2001
A wafer-level method for mass production of surface-mounting, chip-size ("CS") ball grid array ("BGA"), land grid array ("LGA"), and lead-less chip carrier ("LCC") semiconductor packages includes the wire-bond or flip-chip attachment of ceramic substrates to the active surface of cor
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